Test structure design for model-based electromigration

As VLSI technology features are pushed to the limit with every generation and with the introduction of new materials and increased current densities to satisfy performance demands, failure risk due to Electromigraton (EM) is ever-increasing. In this paper, we present experimental results using a novel set of test structures to validate a new model-based EM risk assessment approach. In this method, EM risk can be assessed for any interconnect geometry through an exact solution of the fundamental stress equations. This approach eliminates the need for complex look-up tables for different geometries and can be implemented in CAD tools very easily as we demonstrate on real design examples.