An event-based Network-on-Chip debugging system for FPGA-based MPSoCs

Nowadays, Multiprocessor Systems-on-Chip (MPSoCs) have high computation power due to the parallel processing using multiple processing elements (PEs). However, the communication costs increase with the number of PEs. Networks-on-Chip (NoCs) are the most promising solution for addressing the communication issues. This paper discusses the implementation of a user interactive NoC debugger. The system consists of two main parts; an on-chip hardware debugging system and an off-chip C++based computer application. The data debugging is transaction based and allows fault detection and reliable data analysis such as data logging, utilization report and dataflow visualization. The NoC debugger was implemented on a runtime reconfigurable and adaptive routable NoC and tested with a traffic generation technique.