Reducing bit error rate using CRC verification in turbo codes

In this paper, MAX Log MAP decoding algorithm is applied in turbo decoding process to reduce the computational complexity in LTE standard. In addition, an algorithm is proposed to reduce the bit error rate in turbo codes by applying Cyclic Redundancy Check and Flip and Check algorithm. The data bits have been transmitted through Rayleigh fading channel and the performance of proposed decoding algorithm is estimated. The performance of this algorithm has been analyzed using Bit Error Rate by varying the Signal to Noise Ratio (Eb/No). The code rate is 1/3, number of iterations has been increased from 1 to 8 and the size of the block is varied from 40 to 6144. The algorithm has been implemented and simulated using MATLAB software.