A 280-/300-GHz Three-Stage Amplifiers in 65-nm CMOS With 12-/9-dB Gain and 1.6/1.4% PAE While Dissipating 17.9 mW | IEEE Journals & Magazine | IEEE Xplore

A 280-/300-GHz Three-Stage Amplifiers in 65-nm CMOS With 12-/9-dB Gain and 1.6/1.4% PAE While Dissipating 17.9 mW


Abstract:

This letter reports the design of terahertz amplifiers using the concept of maximum achievable gain (Gmax) of a transistor embedded in a linear, lossless, reciprocal netw...Show More

Abstract:

This letter reports the design of terahertz amplifiers using the concept of maximum achievable gain (Gmax) of a transistor embedded in a linear, lossless, reciprocal network. Implemented in a 65-nm CMOS, by adopting the optimized Gmax-core, 280and 300-GHz amplifiers achieve peak gain of 12 and 9 dB, peak power-added efficiency (PAE) of 1.6% and 1.4%, and gain per stage of 4 and 3 dB, respectively, while dissipating 17.9 mW, which is the best performance up to date in terms of operating frequency, gain per stage, and PAE in CMOS process.
Published in: IEEE Microwave and Wireless Components Letters ( Volume: 28, Issue: 1, January 2018)
Page(s): 79 - 81
Date of Publication: 06 December 2017

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