DA‐Based Circuits for Inner‐Product Computation

In DSP application, distributed arithmetic (DA)‐based implementation has been shown to provide area, power, performance efficiency for both ASIC as well as FPGA‐based implementations. DA‐based implementation has been widely used to implement multiple DSP functions, such as FIR filters, DCT, FFT, DWT, Walsh‐Hadamard transforms, image and video processing functions such as color space conversion, interpolation, and scaling. This chapter introduces the mathematical concepts which lead to the DA architecture for inner‐product computation, and shows how the baseline DA architecture compares with the conventional multiply‐and‐accumulate (MAC) implementation. It can be noted that area, power, performance advantage of DA over conventional MAC‐based implementation is heavily dependent on the characteristics of the weighted‐sum computation, in terms of number of terms, bit‐precision of the input data and the coefficients and the desired coefficient programmability. The chapter then presents techniques for optimization of area, performance and power consumption of the DA implementation, respectively.