Selective area growth of GaAs on Si patterned using nanoimprint lithography

Heteroepitaxial selective area growth (SAG) of GaAs on patterned Si substrates is a potential low-cost approach to integrate III-V and Si materials for tandem or multijunction solar cells. The use of nanoscale openings in a dielectric material can minimize nucleation-related defects and allow thinner buffer layers to be used to accommodate lattice mismatch between Si and an epitaxial III-V layer. For photovoltaic applications, the cost of patterning and growth, as well as the impact on the performance of the Si bottom cell must be considered. We present preliminary results on the use of soft nanoimprint lithography (SNIL) to create patterned nucleation templates for the heteroepitaxial SAG of GaAs on Si. We demonstrate that SNIL patterning of passivating layers on the Si substrate improves measured minority carrier properties relative to unprotected Si. Cost modeling of the SNIL process shows that adding a patterning step only adds a minor contribution to the overall cost of a tandem III-V/Si solar cell, and can enable significant savings if it enables thinner buffer layers.