FPGA implementation of a multilayer Artificial Neural Network using System-on-Chip design methodology

Artificial Neural Networks (ANNs) find applications in engineering solutions to complex problems. The usefulness of ANNs in real-time embedded applications can be enhanced if feasible architectures for their hardware implementation can be customized to provide an attractive tradeoff between area and performance. In this paper, we present a real-time embedded hardware implementation of a feed-forward neural network which employs backpropagation algorithm for training. Custom modules are designed for the activation functions, the neurons and a finite state machine that co-ordinate activities for training. The proposed ANN is implemented on a Virtex-5 Field Programmable Gate Array. Use of System-on-Chip design methodology enables design reuse while improving the performance metrics.