A new test structure methodology for MOS hot carrier reliability

Source bus resistance, which causes body effect, from a test structure can not be negligible. The body effect on the test structure is closely related to the saturation current (Id/sub sat/) degradation, which is a more meaningful quantity for many circuit applications as this has a strong correlation to switching speed. It is found that the Id/sub sat/ degradation can be improved, depending on the test structure. So, in this study, the new test structure is built to minimize the body effect and extends the deep submicron MOS device lifetime. Concept for the new test structure is that higher drive devices such as W/L=10/0.25, 10/0.3(/spl mu/m//spl mu/m) are assigned to the closest pin of the common source and lower drive devices such as W/L=0.4/10, 0.6/10 and 1/10(/spl mu/m//spl mu/m) are possibly assigned to farther pin from the common source. Further, the common source is assigned to the center from the old test structure to minimize the resistance at both ends. As a result, it is promising to evaluate the HCI effective lifetime accurately and is proved to be useful to characterize MOS devices more accurately. Hence HCI reliability with the new test structure is not only promising for characterization automation, but will be used for VLSI/ULSI designs, proposing a new approach to estimate more accurate lifetime of the saturation drain current degradation for MOSFETs.