Test chip for the evaluation of surface-diffusion phenomena in sputtered aluminum planarization processes

A test chip has been designed and fabricated for the evaluation of surface-diffusion phenomena. It allows the confirmation of the correct sample cross-section bevel angle and orientation for scanning electron microscope (SEM) inspection of step coverage. These features eliminate ambiguities that may otherwise arise in the interpretation of the SEM images. The chip design provides arrays of vias with multiple combinations of size and spacing to enable characterization and modeling of the aluminum planarization phenomena for a full range of deposition parameters. It also incorporates electrically readable test structures that allow relating the SEM images of step coverage to corresponding electrical properties, such as electromigration, of the deposited metal. The overall objective is to permit the selection of deposition parameters that simultaneously produce visually acceptable step-coverage images and optimized electrical properties of the film.<
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