The insulated-gate field-effect transistor

Some theoretical characteristics of the "Insulated-Gate Field-Effect Transistor" are discussed and the results compared with experimental units that have recently been fabricated. These units consist of a control electrode insulated from a thin conducting channel in the surface of a silicon substrate by an oxide film, as compared to the conventional reverse biased p-n junction unipolar transistor gate. The use of an insulated type gate yields several important advantages, viz: 1. Transistors may be fabricated in which the mechanism of control is either depletion of channel charge, enhancement of channel charge, or a combination of both, providing freedom in circuit design. 2. The continuous transfer characteristic from the negative gate-bias region to the positive bias region allows operation at zero bias. 3. The oxide thickness provides a new design parameter; the thicker oxide units operate at higher speed and power level. 4. Gate leakage current is extremely low; time constant measurements yield an input resistance of 10
⁺¹³
- 10
⁺¹⁶
ohms. Units fabricated to date have the following typical characteristics: Input Impedance: 7µµf, 10
⁺¹⁵
ohms Transconductance: 2800 µohms Cut-off bias: -8 volts (depletion unit) Rise Time: 10 nanoseconds (10% - 90 %) The planar construction of these zero junction devices coupled with their highly uniform characteristics have yielded great promise for integrated circuit applications. Progress made toward integrating these elements into large scale logic arrays on a single crystal semiconductor substrate is discussed.