Cryogenic Modeling for Open-Source Process Design Kit Technology

Models and design guidelines for silicon complementary metal oxide semiconductor (CMOS) devices operating at cryogenic temperatures are needed due to a recent spike in interest in cryogenic applications, ranging from quantum computing to readout integrated circuits. Demanding readout integrated circuit (IC) and quantum computing applications require highly reliable and complex CMOS circuitry operating well and reliably at low temperatures, such as 4K and 77K. In the case of quantum computing, Silicon (Si) CMOS circuits may need to work in a 4K ambient, or in an ambient with a temperature even lower than this. To enable circuit design, and demonstrate designs achievable with finetuned models at 4K, we measure and SPICE-type compact model CMOS devices from the 130nm Skywater technology node, at the ubiquitously used quantum computing temperature of 4K. This 130nm process is the open-source process design kit technology, currently being offered by Google and Skywater. The goal of this work is to pave the way to democratize circuit design in this niche region of operation for users of an open-foundry process such as this 130nm node, by providing standard SPICE compatible cryogenic device models. Additionally, we demonstrate the design of a two-stage amplifier circuit working at 4K developed utilizing the developed cryogenic models.