IEEE Approved Draft Standard for Access and Control of Instrumentation Embedded within a Semiconductor Device

This standard describes a methodology for accessing instrumentation embedded within a semiconductor device without defining the instruments or their features themselves, via the IEEE 1149.1 Test Access Port (TAP) and/or other signals. The elements of the methodology include a hardware architecture for the on-chip network connecting the instruments to the chip pins, a hardware description language to describe this network, and a software language and protocol for communicating with the instruments via this network.