Low-power high-linearity area-efficient multi-mode GNSS RF receiver in 40nm CMOS

the integration of Global Navigation Satellite Systems (GNSS) receiver with other wireless functionalities, e.g., GSM, WCDMA, LTE, Bluetooth, and WiFi, brings up new design challenges due to constrained silicon area and power consumption, and especially the interferences from other wireless functionalities. A dual-channel multi-mode GNSS RF receiver, for reception of GPS-L1, GLONASS-B1, Compass-B1, and Galileo-E1, is proposed to address these challenges. A novel frequency plan and a reconfigurable complex band-pass filter enable the two multi-mode reception channels to share most circuit blocks and thus reduce the power consumption and silicon area. An N-path filter and adaptive gain control is implemented in the RF front-end to reject the out-of-band interferences for high linearity. Designed in a 40nm CMOS, the proposed multi-mode GNSS RF receiver, including the RF front-end, baseband filter and ADC, PLL, and VCO, achieves a total noise figure of 1.7dB, out-of-band (1710MHz) input 1dB compression point of −16.5dBm, while consuming a total power of 13.2mW.

I. Introduction

Global Navigation Satellite Systems (GNSS) have gradually developed into the second generation, i.e. GNSS-II, which more effectively integrate concurrent navigation systems, including the Global Positioning System (GPS), the Russian “GLONASS” system, the planned European Union's “Galileo” positioning system, the Chinese navigation system “Compass” and so on. Taking the advantage of Integrated Circuits (IC) and System-on-Chip (SoC), such navigation system could be embedded into daily electronic devices such as the Portable Navigation Devices (PND) and handheld Smart-Phones, providing real-time autonomous geo-spatial positioning (altitude, longitude and latitude) with global coverage. In fact, Global Navigation Satellite Systems (GNSS) receiver has become an essential functionality in most mobile applications.