Hot spot mitigation using single-phase microchannel cooling for microprocessors | IEEE Conference Publication | IEEE Xplore

Hot spot mitigation using single-phase microchannel cooling for microprocessors


Abstract:

The placement and arrangement of the different components on a microprocessor chip is examined to mitigate the hot spots that may arise on the device during its operation...Show More

Abstract:

The placement and arrangement of the different components on a microprocessor chip is examined to mitigate the hot spots that may arise on the device during its operation. The power dissipation of the individual components on a microprocessor is spatially and temporally non-uniform, possibly resulting in high thermal gradients and, as a consequence, high thermal stresses. These hot spots arise because the power dissipated by some components accounts for a major fraction of the total power of the device. The device then develops large temperature gradients and localized hot spots. These hot spots can cause device failures and a loss in performance that results when the clock frequency slows with voltage scaling to cope with thermal emergencies. It can also lead to lower yield. An alternate approach is to minimize the thermal gradient in the device by developing a new co-architectural (thermal and performance) design that redistributes some of the components in the device. From an architectural point of view, the approach must incorporate constraints on components that cannot be separated and include a performance penalty based on the impact of rearranging the repositionable components on the device. In this paper, a computational model is developed to compare the baseline design for a typical microprocessor to an optimized device. A microchannel heat sink is used for the thermal management of the system. The thermal and electrical designs are coupled in the optimization study. The numerical simulations prove the effectiveness of the new design even when a performance penalty is included for the design changes within the microprocessor.
Date of Conference: 02-05 June 2010
Date Added to IEEE Xplore: 01 July 2010
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Conference Location: Las Vegas, NV, USA

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