<![CDATA[ IEEE Transactions on Power Electronics - new TOC ]]>
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TOC Alert for Publication# 63 2021April 12<![CDATA[Table of Contents]]>367C17336122<![CDATA[IEEE Power Electronics Society]]>367C2C294<![CDATA[Adaptive Energy Estimation for Supercapacitor Based on a Real-Time Voltage State Observer in Electric Vehicle Applications]]>367733773412180<![CDATA[Three-Port Bidirectional Operation Scheme of Modular-Multilevel DC–DC Converters Interconnecting MVDC and LVDC Grids]]>367734273481599<![CDATA[SOC Estimation of Li-ion Batteries With Learning Rate-Optimized Deep Fully Convolutional Network]]>367734973531562<![CDATA[A Noninvasive Feeder Impedance Estimation Method for Parallel Inverters in Microgrid Based on Load Harmonic Current]]>367735473592200<![CDATA[A Dual Frequency Tuning Method for Improved Coupling Tolerance of Wireless Power Transfer System]]>367736073652045<![CDATA[Monte Carlo Simulation With Incremental Damage for Reliability Assessment of Power Electronics]]>367736673711563<![CDATA[Quadruple Boost Multilevel Inverter (QB-MLI) Topology With Reduced Switch Count]]>367737273773284<![CDATA[Performance Improvement of a Three-Phase Interleaved DC–DC Converter Without Requiring Antisaturation Control for Postfault Conditions]]>367737873832936<![CDATA[Statistical Characterization for Loss Distributions of Power Semiconductor Devices]]>on-state voltage of power semiconductor devices. This method includes a specially designed testing sequence for multiple devices under test, as well as the statistical representation of loss-related characteristics. By the proposed method, the loss-related characteristics of multiple transistors and freewheeling diodes can be evaluated in multiple times, and the testing conditions are closer to the working conditions of devices in practical use compared to the conventional double-pulse test. Based on the experimental results, the probability density function for the switching energy and on-state voltage can be further generated, which enables more correct prediction for the thermal and reliability performances of power semiconductor devices.]]>367738473881998<![CDATA[Optimized Kilowatt-Range Boost Converter Based on Impulse Rectification With 52 kW/l and 98.6% Efficiency]]>3). A loss breakdown summarizes major efficiency bottlenecks to be overcome by future advances in power electronics.]]>367738973941535<![CDATA[Parameter Identification of the Series Inductance in DAB Converters]]>367739573992714<![CDATA[Overvoltage Estimation by Stray Inductances During Turn-off of a 500 kV/25 kA DC Circuit Breaker]]>off and has three contributions. First, it reveals that snubber circuit inductance, the internal and external stray inductances of an MOV could cause a significant overvoltage across a DCCB, which exceeds 47.5% of its nominal clamping voltage. The overvoltage mechanism is clearly analyzed based on the working principle of a DCCB, providing theoretical equations to estimate the overvoltage magnitude. Second, a nonlinear model of an MOV is proposed to simplify the calculation and provide an accurate estimation result. Third, a new arrangement of series submodules with discrete MOVs is proposed to suppress the overvoltage. A hybrid 500 kV/25 kA DCCB prototype with series insulated gate bipolar transistors (IGBTs) is implemented to validate the proposed analysis. The series-IGBT rating voltage is 1440 kV, and the MOV with a nominal clamping voltage of 800 kV is used to protect IGBTs. However, a 25 kA turn-off experiment clearly shows that the overvoltage increased to 1203 kV by an external stray inductance of 39.5 μH and di/dt of 1480 A/μs. The relative error between measurements and simulations is within 3%. Besides, simulations on the new arrangement show the overvoltage is decreased by 23.4% than before.]]>367740074065490<![CDATA[Compact Rectifiers With Ultra-wide Input Power Range Based on Nonlinear Impedance Characteristics of Schottky Diodes]]>λ/8 transmission line is introduced to compensate the imaginary part of diode impedance. A λ/4 transmission line is applied to reverse the diode impedance variation with respect to the input power. Two rectifiers operating at 2.45 GHz are fabricated and measured. Rectifier I shows a RF-dc power conversion efficiency exceeding 50% over an input power range of 23.3 dB (from 6.5 to 29.8 dBm), with maximum efficiency 74.5% at 27 dBm input power. Rectifier II shows an input power range exceeding 50% over 31 dB (−1 to 30 dBm) with maximum efficiency of 68.5% at 28 dBm.]]>367740774111247<![CDATA[Performance of GaN Power Devices for Cryogenic Applications Down to 4.2 K]]>367741274161217<![CDATA[Overtemperature Protection Circuit for GaN Devices Using a <italic>di/dt</italic> Sensor]]>on has been shown to reduce as the junction temperature increases. This article demonstrates the first noncontact overtemperature protection circuit for GaN power devices that exploits this effect and overcomes the complication that this inverse proportionality is affected by load current. A variant of a previously reported magnetic field “Infinity Sensor,” named after its figure-of-eight topology and high bandwidth (>200 MHz), measures di/dt. Using the sensor signal as the only input, a detection circuit finds peak di/dt, and a high-speed integrator derives instantaneous load current. The reference voltage for the decision-making part of the circuit is automatically adjusted as a function of load current, in order to counteract the dependence of di/dt on load current. Experimental results on a 400 V, 2 kW buck converter show the protection circuit successfully activating within ±5 °C of a preprogrammed junction temperature setting, independently of load current, for settings of 100, 120, and 140 °C.]]>367741774283742<![CDATA[Online ESR Monitoring of DC-Link Capacitor in Voltage-Source-Converter Using Damping Characteristic of Switching Ringings]]>u_{c}/Δi_{c}), but the performance is affected by operating conditions (especially at light-load), quasi-resonance effect and sensor amplitude error. To overcome these difficulties, an online ESR monitoring method is proposed using the damping characteristic of dc capacitor switching ringings. The intrinsic high-frequency (HF) resonance incidents between the power device fast switching and converter parasitic parameters are utilized in this article. First, the mechanism of dc capacitor switching ringing is analyzed by the HF resonance equivalent circuit. The analytic relationship between the damping characteristic and the ESR is established. Then, the condition monitoring (CM) scheme, noncontact HF sensor, and half-power bandwidth algorithm for ESR estimation are presented. Finally, an experimental study is carried out to validate the feasibility and effectiveness. The damping of switching ringing is inherently sensitive to the ESR of dc capacitor under the condition of resonance. Both theoretical analysis and experimental results confirm that the proposed method can achieve mΩ-level accuracy and good robustness under different conditions.]]>367742974414615<![CDATA[Reliability Assessment Of AlGaN/GaN HEMTs on the SiC Substrate Under the RF Stress]]>367744274505791<![CDATA[Temperature Influence on the Accuracy of the Transient Dual Interface Method for the Junction-to-Case Thermal Resistance Measurement]]>[1], determines the junction-to-case thermal resistance of power electronics with the separate point of two transient thermal impedance curves under different contact conditions. However, the influence of the junction temperature is not considered and this underestimates the actual value with earlier separation point. This phenomenon is presented first with experimental results at different junction temperatures. Electro-thermal finite element simulations and simulation with semiconductor physical behavior in the devices simulations are performed to explain the root reason. After that, the improved TDIM with the junction temperature compensation is proposed to improve the accuracy. The experimental results show that the improved TDIM improves the accuracy of about 9.5% for 600-V discrete IGBT devices.]]>367745174604746<![CDATA[Enhanced Fault Diagnosis Using Broad Learning for Traction Systems in High-Speed Trains]]>367746174691498<![CDATA[Real-Time Parameter Estimation of a Fuel Cell for Remaining Useful Life Assessment]]>367747074792284<![CDATA[Estimating Electric Motor Temperatures With Deep Residual Machine Learning]]>367748074882646<![CDATA[Heat-Flux-Based Condition Monitoring of Multichip Power Modules Using a Two-Stage Neural Network]]>367748975007026<![CDATA[A Novel Bond Wire Fault Detection Method for IGBT Modules Based on Turn-on Gate Voltage Overshoot]]>on gate voltage overshoot. The degree of bond wires lift-off will change the stray inductance of the gate charge loop circuit, and therefore has a strong influence on turn-on gate voltage overshoot before miller platform, which can be used as an effective bond wire fault indicator. A double pulse test platform is built to verify the resolution and sensitivity of the proposed precursor for bond wire degradation. The dependences on bus voltages, load currents, junction temperatures are discussed and tested. The experimental results show that the gate turn-on voltage overshoot of IGBT increases with the increasing severity of bond wire faults, which agrees with the theoretical analysis. The proposed turn-on gate voltage overshoot-based method has a high sensitivity for identifying bond wire fault at the incipient stage. It offers an effective technique for detecting bond wire degradation for practical applications.]]>367750175124046<![CDATA[Extension of ZVS Region of Series–Series WPT Systems by an Auxiliary Variable Inductor for Improving Efficiency]]>367751375253734<![CDATA[An Impedance Decoupling-Based Tuning Scheme for Wireless Power Transfer System Under Dual-Side Capacitance Drift]]>367752675365370<![CDATA[Analysis, Design, and Implementation of a Spatially Nested Magnetic Integration Method for Inductive Power Transfer Systems]]>LCC series compensation circuit is selected to implement the proposed method with an optimal efficiency design. A 4-kW prototype with a 160 mm airgap is implemented to demonstrate the validity of the proposed method. The experimental results show that the compact structure retains the outstanding performance and avoids significant cross coupling for lateral, vertical, and axial misalignment. The maximum conversion efficiency of the proposed system is 96.7% at full output power and stays above 91.6% throughout the misalignment range.]]>367753775495662<![CDATA[Adaptive Bidirectional Inductive Power and Data Transmission System]]>SAE TIR J2954.]]>367755075637829<![CDATA[Unmanned Aerial Vehicle Wireless Charging System With Orthogonal Magnetic Structure and Position Correction Aid Device]]>367756475755728<![CDATA[A Novel Three-Phase Dual-Output Neutral-Point-Clamped Three-Level Inverter]]>367757675866730<![CDATA[–1 MV DC Filter and High-Voltage DC Measurement System for ITER Neutral Beam Injector System]]>6) gas not only for insulation purpose but also as a refrigerant to forcibly ventilate vertically in order to allow the dc filter circuit, which is heat generation source, and the dc measuring instruments, which need to minimize the effect of temperature drift, to coexist. We also addressed another issue caused by the limited space in the one-package structure, where the stray capacitance of the dc voltage divider tends to become large and then lowers the measurement accuracy for transient voltage variation. As a countermeasure, the dc voltage divider is composed of much larger capacitance than the stray capacitance and additional damping resistance to avoid LC resonance with wiring inductance. The actual-product tests demonstrated the followings; the dc measurement system has satisfied high measurement accuracy of 0.5% and fast responsivity of 3.3 μs retaining decay rate within −3 dB; the temperature rise of the dc voltage dividers and the DCCTs is reasonably suppressed; the dc measurement system and the dc filter circuit withstood DC −1.2 MV.]]>367758775995936<![CDATA[Quasi-Two-Level PWM-Operated Modular Multilevel Converter With Nonlinear Branch Inductors]]>367760076112736<![CDATA[Analysis of Voltage Sharing of Series-Connected SiC MOSFETs and Body-Diodes]]>MOSFETs have gained strong attention in medium-voltage power conversion applications. To increase the blocking voltage level, series-connection of SiC MOSFETs is an attractive solution but may suffer a severe voltage unbalance issue. To gain insights into the voltage unbalance issue, this article presents a detailed study of the impact of parasitic capacitors on the voltage sharing of series-connected SiC MOSFETs and body-diodes. The parasitic capacitors are categorized into two groups for analysis: 1) parasitic capacitors from gate terminal; 2) parasitic capacitors from drain/source terminals. The study reveals that gate parasitic capacitors affect gate miller-plateau voltage and ultimately the dv/dt during the turn-off. The voltage sharing will be worse under higher turn-off current or larger gate resistor. The drain/source parasitic capacitors will introduce additional capacitance across device drain-source terminals which results in an unbalanced voltage sharing. The position of switching unit and the heatsink connection schemes will affect the distribution of drain/source parasitic capacitors to cause different voltage sharing results. The drain/source parasitic capacitors will also cause voltage unbalance of series-connected body-diodes under different conditions. To verify the analysis, the voltage sharing between two series-connected 10 kV SiC MOSFETs is tested under different parasitic capacitors conditions.]]>367761276247067<![CDATA[Resonant Modular Multilevel DC–DC Converters for Both High and Low Step-Ratio Connections in MVDC Distribution Systems]]>367762576404113<![CDATA[High-Efficiency <italic>LLC</italic> Resonant Converter With Reconfigurable Voltage Multiplying Rectifier for Wide Output Voltage Applications]]>LLC resonant converter for wide output voltage applications. The RVMR can operate as voltage-doubler mode or voltage-quadrupler mode according to the primary switching strategy. Two operation modes split a wide output voltage range into two narrow ranges. Therefore, the RVMR enables the LLC resonant tank to be designed in a narrow output voltage range, which results in a narrow switching frequency range, high efficiency, and high power density. A smooth mode transition can be achieved by adopting a phase-shift control to general pulse frequency modulation control without any additional switch. The proposed RVMR LLC converter can improve its efficiency by 2.9% and reduce component volume by 26% compared to the conventional full-bridge LLC resonant converter. A 750-W prototype with 400 V input, 100–300 V output voltage, and 2.5 A max output current has been built and tested to verify the effectiveness of the proposed converter.]]>367764176514150<![CDATA[Three-Phase Step-Up Multilevel Inverter With Self-Balanced Switched-Capacitor]]>367765276646038<![CDATA[A Novel Analysis, Design, and Optimal Methodology of High-Frequency Oscillation for Dual Active Bridge Converters With WBG Switching Devices and Nanocrystalline Transformer Cores]]>dv/dt of fast switching devices and stray capacitances of transformer in dual active bridge (DAB) presents a significantly challenge. In this article, a comprehensive analysis, design, and optimal methodology of HFO for DAB with wideband gap (WBG) switching devices and nanocrystalline transformer cores is proposed. The stray parameters equivalent circuit of DAB is built and the key influencing factors to mitigated the HFO are identified by establishing a time-domain analytical model. Based on the theoretical analysis, this article points out for the first time that the traditional method of decreasing the stray capacitance of the transformer to eliminate HFO is not suitable for high dv/dt occasions when using WBG switching devices. Correspondingly, a novel elimination method of HFO by equating the voltage changing time of dv/dt to the oscillation cycle is proposed, through which the minimum voltage spike amplitude (VSA) of HFO can be achieved mathematically. A 6.6-kW DAB prototype with three different transformers is developed and an approximately 95% reduction of the VSA can be achieved when the proposed HFO elimination method is adopted, which verifies the effectiveness of the proposed method.]]>367766576788067<![CDATA[Implementation of a Novel Very Low Frequency Cosine-Rectangular Voltage Generator for Insulation Testing of Power Cables]]>367767976928137<![CDATA[Inductor Current Ripple Analysis and Reduction for Quasi-Z-Source Inverters With an Improved ZSVM6 Strategy]]>$m$ and ST duty ratio $d_{rm sh}$. In this article, the instantaneous inductor current ripples and the maximum current ripple in the qZSI with the ZSVM6 strategy under all operational conditions are explored in detail. The operational conditions are categorized into several cases according to the relationship among the duty ratios of the active states, null states, and ST states. More importantly, an improved ZSVM6 strategy is proposed to reduce the inductor current ripple for the qZSI, in which the maximum inductor current ripple is limited by making full use of the operational states. The proposed ZSVM6 strategy keeps the total ST time in a switching cycle while maintaining the axis-symmetry feature of the inductor current, but reduces the current ripple. Simulations and experimental results confirm effectiveness of the proposal when compared with the conventional ZSVM6 strategy for ripple current reduction.]]>367769377044553<![CDATA[Interharmonic Emission in AC–DC Converters Exposed to Nonsynchronized High-Frequency Voltage Above 2 kHz]]>367770577157040<![CDATA[Improved Power Quality Transformerless Single-Stage Bridgeless Converter Based Charger for Light Electric Vehicles]]>367771677242412<![CDATA[Modular Multilevel Converter With Sensorless Diode-Clamped Balancing Through Level-Adjusted Phase-Shifted Modulation]]>3677725773511375<![CDATA[A Multiport Modular DC–DC Converter With Low-Loss Series LC Power Balancing Unit for MVDC Interface of Distributed Photovoltaics]]>on with zero-voltage switching, which contributes to the low-cost and low-loss characteristic of the converter. Simulations and experiments are carried out to verify the validity of the theory.]]>367773677495763<![CDATA[Small-Signal Stability Analysis and Current Control Reference Optimization Algorithm of DFIG-Based WT During Asymmetric Grid Faults]]>367775077684984<![CDATA[A Single-Stage Multi-Port Buck-Boost Inverter]]>367776977825475<![CDATA[A Direct Carried-Based PWM Scheme With Reduced Switching Harmonics and Common-Mode Voltage for Current Source Converter]]>367778377968385<![CDATA[Segmented Differential Power Processing Converter Unit and Control Algorithm for Photovoltaic Systems]]>367779778097120<![CDATA[High-Frequency Resonance Analysis and Reshaping Control Strategy of DFIG System Based on DPC]]>367781078194721<![CDATA[Transient Damping Method for Improving the Synchronization Stability of Virtual Synchronous Generators]]>367782078313468<![CDATA[Large-Signal Stability of Grid-Forming and Grid-Following Controls in Voltage Source Converter: A Comparative Study]]>367783278403425<![CDATA[Single-Inductor Boost Converter With Ultrahigh Step-Up Gain, Lower Switches Voltage Stress, Continuous Input Current, and Common Grounded Structure]]>u/dt issues and achieve reliable output. The operational principles of steady-state mode and small-signal mode are presented to analyses the SLBC in detail. Based on these, performance comparisons with other typical converters and 250-W experiment prototype are implemented to validate the feasibility and effectiveness of the SLBC.]]>367784178523022<![CDATA[A Novel Active Equalization Method for Series-Connected Battery Packs Based on Clustering Analysis With Genetic Algorithm]]>367785378656667<![CDATA[SoC-Based Droop Coefficients Stability Region Analysis of the Battery for Stand-Alone Supply Systems With Constant Power Loads]]>367786678795504<![CDATA[Improved Frequency-Domain Steady-State Modeling of the Dual-Active-Bridge Converter Considering Finite ZVS Transition Time Effects]]>367788078914135<![CDATA[Accurate Harmonic Calculation for Digital SPWM of VSI With Dead-Time Effect]]>367789279025790<![CDATA[Analysis and Suppression of Common-Mode EMI Noise in 1 MHz 380 V-12 V DCX Converter With Low NFoM Devices]]>dv/dt static points are constructed. Unlike most of the present suppressing methods, it can maintain high efficiency as well. Additionally, the ISOP structure provides more opportunities for optimizing control strategies to achieve the cancelation effect and further reducing the CM noise by the interleaving within a cell and the interleaving among cells. The excellence of the aforementioned methods is verified by experiments on 1-MHz 380 V–12 V 1.8-kW SRC DCX prototypes with a peak efficiency of 98.3%. The proposed methods ultimately reduce the CM noise by 50 dB.]]>367790379135087<![CDATA[Transformerless Stacked Active Bridge Converters: Analysis, Properties, and Synthesis]]>367791479262420<![CDATA[The Sustained Oscillation Modeling and Its Quantitative Suppression Methodology for GaN Devices]]>RC snubber to suppress the sustained oscillation in this article, which is very simple and cheap but effective. First, the sustained oscillation modeling based on a double pulse circuit is carried out. Then, the RC region is established quantitatively according to the root locus analysis results, which makes up for the defects of these qualitative methods before. Furthermore, it is first found that the sustained oscillation can be fully suppressed due to the existence of dipoles. Finally, the oscillation suppression effect within the RC region is compared with that outside the region by the simulation and experimental results, which are consistent with the theoretical analysis. Additionally, the possible negative influence of the added RC snubber is also discussed in this article, which shows that it has a little impact on the switching speed and energy loss, while the sustained oscillation is well suppressed.]]>367792779414099<![CDATA[An Accurate Datasheet-Based Full-Characteristics Analytical Model of GaN HEMTs for Deadtime Optimization]]>367794279554637<![CDATA[Extended Analysis of the Asymmetrical Half-Bridge Flyback Converter]]>$LLC$ converter. The majority of papers dealing with this topology consider an approximated voltage gain similar to that of an isolated buck converter operating in continuous conduction mode, i.e., proportional to the duty cycle and, practically, load independent. On the contrary, the true voltage gain is nonmonotonic at high duty-cycle values. Anytime the converter is designed for a resonant operation, as is advisable to eliminate any reverse recovery problem of the rectifier diode, the voltage gain not only increases, but also becomes a function of the switching frequency. This article investigates the converter's voltage gain in detail, deriving a theoretical framework capable of capturing its real behavior and dependencies. The proposed analytical model has been verified through simulations as well as experimental measurements taken on a 160-W prototype working at 400 kHz.]]>367795679641999<![CDATA[Quasi-Resonant Bridgeless PFC Converter With Low Input Current THD]]>367796579723641<![CDATA[A Novel Bidirectional Isolated DC-DC Converter With High Voltage Gain and Wide Input Voltage]]>367797379855484<![CDATA[A Dual Active Bridge Derived Hybrid Switched Capacitor Converter Based Two-Stage 48 V VRM]]>367798679996596<![CDATA[Three-Port Bidirectional DC/DC Converter for DC Nanogrids]]>367800080115194<![CDATA[A Bidirectional DC–DC Converter With High Voltage Conversion Ratio and Zero Ripple Current for Battery Energy Storage System]]>367801280275219<![CDATA[Dual-Active-Bridge Isolated DC–DC Converter With Variable Inductor for Wide Load Range Operation]]>367802880434719<![CDATA[Fast Commutation Error Compensation Method of Sensorless Control for MSCMG BLDC Motor With Nonideal Back EMF]]>367804480545387<![CDATA[Dual Reference Frame Based Current Harmonic Minimization for Dual Three-Phase PMSM Considering Inverter Voltage Limit]]>367805580663626<![CDATA[A Robust Predictive Torque and Flux Control for IPM Motor Drives Without a Cost Function]]>367806780753116<![CDATA[Adaptive Sliding-Mode-Based Speed Control in Finite Control Set Model Predictive Torque Control for Induction Motors]]>367807680873725<![CDATA[A Novel Matrix Transformation for Decoupled Control of Modular Multiphase PMSM Drives]]>367808881016709<![CDATA[An Online Prediction of Capacity and Remaining Useful Life of Lithium-Ion Batteries Based on Simultaneous Input and State Estimation Algorithm]]>367810281135550<![CDATA[Model Predictive Control With Reduced Common-Mode Current for Transformerless Current-Source PMSM Drives]]>$LC$/$CL$ resonance is prone to be induced at the rectifier and inverter sides, respectively. In this article, the model predictive control (MPC) scheme is proposed to tackle the CM resonance and filter resonance simultaneously. In the low-speed region, besides restraining the peak-to-peak (PTP) magnitude of the CMV at the rectifier side, the third-order harmonic of the CMV generated by the inverter is extracted and then penalized in the cost function to further suppress the CM current. With the increase of the motor speed, the control objective of the inverter side controller switches to the PTP magnitude of CMV suppression because of the alleviation of the CM resonance. The capacitor voltage of both rectifier and inverter sides are regulated via the cost function as well, which can mitigate the current harmonic distortion and improve system stability. The simulation with 1MVA rated power and the scaled-down experiment shows that the proposed scheme can suppress both the CM resonance and the $LC$/$CL$ resonance effectively with a low switching frequency.]]>367811481277007<![CDATA[Innovative Fault-Tolerant Three-Phase SPMSM Drive Without Split Capacitors, Auxiliary Legs, or TRIACs]]>367812881405669<![CDATA[Elimination of DC-Link Voltage Ripple in PMSM Drives With a DC-Split-Capacitor Converter]]>3678141815410354<![CDATA[Research on Internal Model Control of Induction Motors Based on Luenberger Disturbance Observer]]>367815581708506<![CDATA[Sensorless Synchronous Motor Drives: A Review of Flux Observer-Based Position Estimation Schemes Using the Projection Vector Framework]]>367817181804458<![CDATA[Parasitic Capacitance Modeling of Copper-Foiled Medium-Voltage Filter Inductors Considering Fringe Electrical Field]]>367818181922926<![CDATA[Thermally-Compensated Magnetic Core Loss Model for Time-Domain Simulations of Electrical Circuits]]>$^{circ }$C. Finally, a temperature-feedback loop within the transformer is successfully closed inside of a system-level simulation, allowing for a more precise determination of the core and winding steady-state temperatures.]]>367819382053967<![CDATA[A Soft-Switching Transformer-Less Step-Down Converter Based on Resonant Current Balance Module]]>N converter. The proposed converter can operate in discontinuous conduction mode (DCM) or continuous conduction mode (CCM) mode by choosing different operation frequencies, and achieve zero current switching or zero voltage switching (ZVS), respectively. Also, by using frequency doubling technique in the half-bridge, the switching losses are reduced by half under the same conditions. A 15.8-W experimental prototype with 100 V input voltage and 25 V output voltage has been implemented in the laboratory, verifying the feasibility of the soft-switching transformer-less step-down converter.]]>367820682183486<![CDATA[Novel Low-Side/High-Side Gate Drive and Supply With Minimum Footprint, High Power Density, and Low Cost for Silicon and Wide-Bandgap Transistors]]>off voltage for a secure off-state, resilience to spurious turn on, and rapid transition through the saturation mode. We present a gate driver configuration with compact and very efficient supply of the high and low sides of power transistor bridges with asymmetric bipolar control voltages without the need for costly and lossy isolated dc–dc converter and only low-voltage active components. The underlying negative voltage gate driver supply circuit consists of only a few cost-efficient components, its electrical potential is referenced to the source of the controlled semiconductor power switch, and its operation is synchronized with the gate driver output. It outcompetes the established use of isolated dc–dc converters in gate circuits with negative voltage needs with respect to cost, size, reliability, and efficiency. Importantly, the proposed negative voltage supply allows bootstrapping without the need for controllable high-voltage semiconductors for the sake of further cost reduction. We present detailed design rules of the circuit and experimentally validate circuit and control. In the automotive prototype implementation, size of the gate driver supply was reduced by 61%, cost by 57%, and loss by more than 16%.]]>367821982295115<![CDATA[Characterization of Low-Inductance SiC Module With Integrated Capacitors for Aircraft Applications Requiring Low Losses and Low EMI Issues]]>367823082425264<![CDATA[Selection Methodology for Si Power MOSFETs Used to Enhance SiC Power MOSFET Short-Circuit Capability With the BaSIC(EMM) Topology]]>MOSFETs from 3.5 to 7.4 μs while producing a 17% increase in the net on-state resistance. However, a SC time of 10 μs could not be achieved. In this article, a systematic procedure for selection of the Si power MOSFET used in the BaSIC(EMM) topology is described based on information published by manufacturers of Si power MOSFETs in their datasheets. A tradeoff curve between the Si EMM drain saturation current at 150 °C versus its on-resistance at 25 °C is proposed in this article for determination of the best Si EMM product. The proposed methodology allowed identification of a superior Si EMM device. It was experimentally validated that a SC with-stand time of 11 μs, under a gate bias of 20 V applied to the 1.2-kV SiC power MOSFET at a drain bias of 800 V, was achievable with an increase in on-resistance of only 3.6%. These experimental results demonstrate a greatly improved tradeoff curve between SC time and increase in on-resistance.]]>367824382525796<![CDATA[A Postprocessing-Technique-Based Switching Loss Estimation Method for GaN Devices]]>$ V-I$) alignment process to reduce errors from probe propagation delay, and the linear interpolation process for further improvement of alignment accuracy. In addition, a modified SPICE model is proposed to investigate the influence of parasitic parameters on switching losses by the circuit simulation. Based on the theoretical switching characteristics, the switching loss estimation method is finally validated experimentally on a commercial 40-V/10-A GaN HEMT in a double-pulse test.]]>367825382666490<![CDATA[Full Custom Design of an Arbitrary Waveform Gate Driver With 10-GHz Waypoint Rates for GaN FETs]]>367826782795700<![CDATA[A Novel Controlled Punch-Through IGCT for Modular Multilevel Converter With Overvoltage Bypass Function]]>367828082906946<![CDATA[A Dynamic Compensated and 95% High-Efficiency Supply Buffer in RGB Virtual Pixel MicroLED Display for Reducing Ghosting by 73% and Achieving Four Times Screen Resolution]]>367829182993566<![CDATA[Short-Circuit Capability Prediction and Failure Mode of Asymmetric and Double Trench SiC MOSFETs]]>MOSFETs with a double and asymmetric trench structure are proposed under single-pulse short-circuit stress. A short-circuit prediction model is established to evaluate short-circuit withstand time and corresponding critical energy of devices under various dc bus voltages. This model can provide quick predictive guidance even if there are few test results, and the predicted values are consistent with practical values. Furthermore, two failure modes are investigated in a short-circuit test. For asymmetric trench SiC MOSFETs, failure modes are gate damage at lower dc bus voltages and thermal runaway at higher dc bus voltages; whereas failure mode for double trench SiC MOSFETs is thermal runaway at all dc bus voltages. In addition, the internal thermal-electro stress of the device is analyzed until it fails during short-circuit condition, and proves that failure mode depends on the dc bus voltage and peak short-circuit current of the device. Finally, the top view of failed devices confirms the two failure modes of trench SiC MOSFETs by the postdecapsulation.]]>367830083074801<![CDATA[Temperature-Independent Gate-Oxide Degradation Monitoring of SiC MOSFETs Based on Junction Capacitances]]>MOSFETs and should be monitored carefully to avoid unexpected power converter failures. Various precursors have been introduced in the literature for gate-oxide degradation monitoring. However, those proposed precursors are temperature dependent and it is highly challenging to eliminate temperature effects. In this article, two new temperature-independent precursors (Miller capacitance and gate–source capacitance changes) are proposed for gate-oxide degradation monitoring of SiC MOSFETs. During the accelerated aging tests under high electric field and high temperature, a consistent change in Miller capacitance and gate–source capacitance is reported for both common source and Kelvin source SiC MOSFETs. Also, the temperature sensitivity of each precursor is investigated. The proposed precursors enable the monitoring of gate-oxide degradation without decoupling the impact of package degradation. Based on the findings, a simple early warning in situ circuit is proposed to monitor gate-oxide aging. A comprehensive precursor comparison is provided to show the merits of the proposed precursors. Finally, the experimental results are presented to validate the efficacy of the in situ monitoring circuit.]]>367830883246159<![CDATA[A Robust Control for D-STATCOM Under Variations of DC-Link Capacitance]]>367832583333471<![CDATA[Fixed-Frequency Hybrid Conduction Mode Control for Three-Level Boost PFC Converter]]>on-time to achieve fixed-frequency quadrangular CRM operation. At lower input voltage, low inductor current enters DCM so that TLB PFC experiences hybrid operation modes depending on varying ac input. Analyses and experiment results in this article confirm that the proposed HCM control can achieve huge reductions of switching losses and peak current stress, improving efficiency in wide-range input voltage and load at the cost of acceptable PF drop. Moreover, a simple voltage-balancing scheme is implemented to the proposed control and verified effective to resolve the inherent topology issue.]]>367833483468059<![CDATA[A Novel Method to Evaluate the Influence of Vienna Rectifier Neutral-Point Voltage Fluctuation on Input Current Quality]]>367834783584690<![CDATA[A Sensorless Model-Based Digital Driving Scheme for Synchronous Rectification in 1-kV Input 1-MHz GaN <italic>LLC</italic> Converters]]>LLC converters with 1-kV input, the switching speed of eGaN high-electron mobility transistors (HEMTs) is as fast as 6 ns, which results in dv/dt up to 200 kV/μs. It poses serious challenge for synchronous rectification (SR). A sensorless model-based SR driving scheme for high voltage applications is proposed to optimize the efficiency at steady state and the complementary control as an interlock mechanism is applied during the transients to ensure safety. A mathematic model is built to determine the turn-on instant and conduction time related to the switching frequency and load condition so that the driving signals are adjusted adaptively. The proposed method provides reliable gate driving signals without any detection circuits and is immune to high frequency noise. The transient response is analyzed and the tolerance effects of the resonant components are analyzed quantitatively. This control is fully transparent to design engineers compared to SR drive ICs, and is convenient to implement in high voltage and high frequency applications. A 1-MHz prototype with 1-kV input and 32 V/3 kW output is built, which achieves the power density of 103 W/in^{3} and peak efficiency of 95.92% with an improvement of 2.0% at full load compared to the conventional SR driving scheme.]]>367835983693917<![CDATA[An Innovative, Adaptive Faulty Signal Rectifier Along with a Switching Controller for Reliable Primary Control of GC-VSIs in CPS-Based Modernized Microgrids]]>367837083876292<![CDATA[Low-Complexity Multistep Model Predictive Current Control for Linear Induction Machines]]>367838883983684<![CDATA[Multimode Constant Power Control Strategy for LCC Resonant Capacitor Charging Power Supply Based on State Plane Analysis]]>367839984126997<![CDATA[A Double-Modulation-Wave PWM With Reduced Dependency on Current Polarities for Dead-Time-Effect Elimination in Three-Level T-Type Converters]]>367841384275319<![CDATA[Flux-Weakening Control of Dual Three-Phase PMSM Based on Vector Space Decomposition Control]]>$alpha beta $ subplane is employed for voltage feedback in the FW control loop. As the fundamental components are mapped to $alpha beta $ subplane while the fifth and seventh harmonics are projected to harmonic z_{1}z_{2} subplane, the FW current from this new control in $alpha beta $ subplane is sixth harmonic-free regardless of the fifth and sixth harmonics being resulted from the nonsinusoidal back electromotive force (EMF) or inverter nonlinearity. The proposed control is compared with the conventional FW feedback control extended for DT-PMSM, where the FW control is applied to the two sets of three-phase windings separately. The experimental results show that the proposed FW control based on VSD is superior to the conventional FW control in terms of reduction in current unbalance and harmonic currents.]]>367842884382682<![CDATA[Wireless Control of Modular Multilevel Converter Submodules]]>367843984533127<![CDATA[Parameter Robustness Improvement for Repetitive Control in Grid-Tied Inverters Using an IIR Filter]]>367845484635389<![CDATA[A Coordinated Voltage–Frequency Support Scheme for Storage Systems Connected to Distribution Grids]]>367846484753314<![CDATA[Analysis of a Hybrid Variable-Frequency-Duty-Cycle-Modulated Low-<inline-formula><tex-math notation="LaTeX">$Q$</tex-math></inline-formula> <inline-formula><tex-math notation="LaTeX">$LLC$</tex-math></inline-formula> Resonant Converter for Improving the Light-Load Efficiency for a Wide Input Voltage Range]]>$Q$LLC resonant converter is a critical problem for wide input voltage and load range applications. Parasitic capacitances such as rectifier diode junction capacitance ($C_j$) degrade the soft switching performance. Compact size, high density, and high transformer turns-ratio requirements for microinverter applications add significant distributed capacitance ($C_d$) of the low-profile transformer, worsening the output regulation and zero-voltage-switching (ZVS) capability at light loads. Wide switching frequency requirement for regulation at light loads, which increases core losses and turn-off switching losses in power MOSFETs, further degrades the power conversion efficiency. The conventional phase-shift modulation causes a high circulating current and loss of ZVS at light loads. Therefore, a hybrid adjustable switching-frequency-duty-cycle modulation technique for improving the light load efficiency is proposed and analyzed for a full-bridge $LLC$ resonant converter. Accurate loss analysis for the proposed modulation scheme, including the effect of parasitic capacitances, is performed using time-domain equations. The proposed methodology precalculates the optimal duty cycle at light load conditions for the required input voltage range such that minimum power losses are incurred. Variation in switching frequency at the preselected duty-cycle value regulates the output voltage. ZVS over a wide range of operating conditions is observed. An experimental prototype for a 20–40 V input, 380-V/300-W output $LLC$ converter is tested for the validation of theoretical analysis.]]>367847684937147<![CDATA[Research on Realizing Space Vector Equivalent Modulation Output by Dual Carrier Modulation of Current Source Inverter]]>n-level space vector modulation strategy. Different from the strategies of traditional unity theory, the proposed method analyzes the relationship directly according to the switching states of SVPWM in three-phase multilevel current-source converters. By constructing the equivalent relationship between the output level of each phase and switching states, the carriers can control the working status of the switches directly. In addition, this method is generalized to the topologies and modulation strategies under n-level, which fully reflects the correctness and universality of the proposed method. Finally, the results of simulation and experiment verify the correction of the method.]]>367849485057415<![CDATA[Nonlinear Gain Position Control Using Only Position Feedback for Permanent Magnet Stepper Motors]]>367850685161660<![CDATA[Hybrid Improved Carrier-Based PWM Strategy for Three-Level Neutral-Point-Clamped Inverter With Wide Frequency Range]]>367851785389908<![CDATA[Dynamic Analysis of Multimode Buck–Boost Converter: An LPV System Model Point of View]]>367853985516104<![CDATA[Virtual Oscillator Control of Distributed Power Filters for Selective Ripple Attenuation in DC Systems]]>current mode virtual oscillator, is proposed to control the distributed power filters in dc systems. This communication-free solution only requires local dc bus voltage measurements as its control input. With the proposed control algorithm, the power filters can automatically share the target ripples based on their storage capacities, realizing modular and fault tolerant design. One typical application is that they can be placed on the dc subgrid of a hybrid ac/dc microgrid to attenuate the second-order harmonics from ac side. A frequency adaption mechanism is further embedded within the controller; hence, it can process any ripples at an unknown frequency for more general applications. To eliminate the circulating current caused by the power line dynamics, virtual impedance is employed to modify the feedback voltage measurement of the virtual oscillator. The proposed control algorithm has been verified by both simulation and down-scaled experiments.]]>367855285603951<![CDATA[IEEE Power Electronics Society]]>367C3C353<![CDATA[Administrative Committee]]>367C4C445