A 240-GHz 4-TX 4-RX 2-D-MIMO FMCW Radar Transceiver in 130-nm SiGe BiCMOS

A 240-GHz 4-transmitter (TX) 4-receiver (RX) 2-D multiple-input–multiple-output (MIMO) frequency-modulated continuous-wave (FMCW) radar transceiver was designed in a 130-nm SiGe bipolar CMOS (BiCMOS) technology with <inline-formula> <tex-math notation="LaTeX">$f_{T}/f_{\text {max}}$ </tex-math></inline-formula> of 250/370 GHz using patch antennas on a single <inline-formula> <tex-math notation="LaTeX">$4.032\times4.032~\text {mm}^{{2}}$ </tex-math></inline-formula> chip. The differential RF inputs, located at the emitters of the direct conversion mixer quad transistors of each RX channel are dc-coupled and current-matched to the differential on-chip patch antenna. At 240 GHz, measurements reveal an RX conversion gain of 24.8 dB, a single-sideband noise figure of 14.9 dB, and an output power of −2 dBm.


I. INTRODUCTION
R ADAR imaging applications benefit from the economies of scale offered by CMOS and SiGe bipolar CMOS (BiCMOS) technologies, supported by an approximate tripling in the number of yearly silicon-integrated radar publications on IEEE Xplore in the past 15 years [1]. Multiple-inputmultiple-output (MIMO) frequency-modulated continuouswave (FMCW) radars in silicon technologies are demonstrated up to the D-band, for example, as multichip assemblies [2], [3], [4], [5], [6], [7]. In the 244-246-GHz industrial, medical, and scientific band, multichip solutions will struggle to achieve an unambiguous half-space, as λ/2 = 612 µm, smaller than typical single-channel J -band FMCW radar transceiver chip dimensions [8], [9], [10], [11], [12], [13]. For a 2-D-MIMO application, signal-to-noise ratio (SNR) improvements using external lenses [8], [9] are not feasible. Furthermore, improving gain of the on-chip antenna using large arrays [13] or selective localized backside etching [12] will increase array element spacing to values larger than λ/2. Thus, in a singlechip 240-GHz 2-D-MIMO transceiver, the overall SNR is to be maximized by optimizing the transmitted power (P T ) and noise figure (F N ), primarily, while at the same time maintaining a low dc power (P dc ) consumption for multichannel operation.
In this work, we introduce a 240-GHz 4-transmitter (TX) 4-receiver (RX) 2-D-MIMO FMCW radar transceiver with on-chip antennas, designed in a 130-nm SiGe BiCMOS technology with an f T / f max of 250/370 GHz. Compared to the previous 1-TX 1-RX 240-GHz transceiver [13], several improvements have been introduced to achieve 4-RX and 4-TX channels in a similar power and area budget. The final frequency-doubler stage, previously implemented using a quadrature push-push topology, is now replaced with a bootstrapped Gilbert-cell circuit [14] for the reduced area. The RX now uses a direct conversion mixer with current matching and dc-coupling to the on-chip antennas at the RF input, rather than a subharmonic mixer [15], resulting in an improvement of the single-sideband noise figure (NF SSB ) from 20 to around 14.9 dB, using the same technology.

II. TRANSCEIVER DESIGN
The block diagram of the 240-GHz 2-D-MIMO transceiver is shown in Fig. 1(a), together with the resulting virtual 2 × 8 array. An external local oscillator (LO) signal is fed into the transceiver chip at 20 GHz. A ×12 frequency multiplier chain, detailed in Fig. 2, consisting of a single-transistor active balun, a cascoded differential pair tripler, and two cascaded bootstrapped frequency doublers [14], is utilized to achieve a 240-GHz signal. A series of differential 60-GHz branchline couplers with a modeled attenuation of 4.5 dB, including power division, split the LO signal into the RX and TX channels. To achieve sufficient driving amplitudes after the LO-distribution, 60-GHz amplifiers, as shown in Fig. 3(a), are implemented before and after the couplers. On the RX side, a direct conversion mixer is utilized, depicted in Fig. 3(b). The topology is similar to [16] and [17], although, in this work, the operation at 240 GHz is demonstrated using a technology with f T of 250 GHz, rather than f T of more than 300 GHz. Additionally, the radio-frequency (RF) input at the emitters of Q 1-4 is current-matched and dc-connected to the on-chip RX antenna, without the need for additional matching circuitry. The dc-coupled 500-resistor is placed at the E 0 of the antenna and is thus isolated from the RF. A resistor-defined current is mirrored by a one-to-one current mirror in Fig. 3(b) and a one-to-four current mirror in Figs. 2 and 3(a), with differential circuits using two mirrors for improved symmetry. The bias voltages of the input transistors are generated using the current mirror transistor, while the cascode bias  voltages are generated using a resistive divider, integrated into the same current mirror above the mirror transistor. Emitter resistors are chosen accordingly for the current mirror factor and provide improved tolerance against process variations. Fig. 4(a) and (b) depicts the simulated input matching and realized gain (G ANT ) of the on-chip antennas, for the second TX and RX. The TX and RX antennas are spaced λ/2 and λ, respectively. From 220 to 260 GHz, the simulated isolation between TX and RX antennas is better than 50 dB, and therefore the simulated RX mixer RF input compression point of −7 dBm will be sufficient, considering a typical simulated TX output power (P out ) of −1 dBm.

III. MEASUREMENTS
Over-the-air measurements are performed with the 240-GHz MIMO radar transceiver, mounted on a rotational stage in an optical-bench-like setup at a distance of 15 cm. The output The input of the 60-GHz amplifier is matched using a 100-differential line of 60-µm length. The LO-input of the 240-GHz mixer is matched using two 40-µm 59-shorted stubs, followed by a 45-µm 100-differential line in series with two 25-fF capacitors, connected to the LO + and LO − ports, respectively. Current consumption includes biasing. power of a J -band converter, used in the TX mode for the characterization of the chip RXs, is measured using a power meter. The receiving J -band up/down mixer is connected to the signal and spectrum analyzer for effective isotropic radiated power (EIRP) measurements. Fig. 5 presents the simulated and measured normalized antenna gain patterns of TX 2 and RX 2 . At 240 GHz, Fig. 6(a) demonstrates a measured system conversion gain (CG) of 24.8 dB and a minimum NF SSB of 14.9 dB for RX 2 . In Fig. 6(b), the simulated and measured P out and EIRP are shown for TX 2

. Radar
Authorized licensed use limited to the terms of the applicable license agreement with IEEE. Restrictions apply.     [19]. From Fig. 7(a), a peak-to-null range resolution [20] of 7.5 mm can be estimated, considering the Hann window, which is used to improve sidelobe suppression at the cost of twice as large peak-to-null width, when compared to a boxcar window. The peak is wider than the theoretical range resolution of 6.25 mm, due to amplitude shaping on the RF signal caused by the bandwidth-limited on-chip antennas [9]. The SNR from Fig. 7(a) can be compared to the expected SNR from the following equation: with P T = −1.6 dBm, TX antenna gain G TX = −1.6 dBi, RX antenna gain G RX = −5 dBi, wavelength λ = 1.23 mm, target radar cross section σ = −15.6 dBsm, target distance R = 0.22 m, Boltzmann's constant k B , temperature T 0 = 300 K, noise bandwidth B = 1 kHz, and F N = 15 dB, at 244.8 GHz. The SNR of 33 dB from (1) is calculated, in agreement with the measurement. Fig. 7(b) emphasizes the benefit of 24 GHz of RF bandwidth, allowing two targets separated by 2 cm in range to be distinguished even though their angular separation is below the theoretical angular resolution of 14.3 • at broadside. In Fig. 7(c), the 2-D-MIMO beamformed response is given for two trihedral corner reflectors with −15.6 dBsm, placed at 22 cm in range and separated by 55 • in azimuth, with the azimuth cut shown in Fig. 7(d).
An angular resolution of 14.6 • in azimuth is estimated from the 3-dB beamwidth, in agreement with the theoretical value of 14.3 • . To the authors' best knowledge, this work is the first demonstration of an MIMO FMCW radar at 240 GHz using silicon-integrated technologies and compares favorably with state-of-the-art silicon-integrated single-channel J -band FMCW radar transceivers in terms of the figure-of-merit (FoM), illustrated in Table I.

IV. CONCLUSION
A miniaturized and efficient 240-GHz 4-TX 4-RX 2-D-MIMO FMCW radar transceiver has been designed in a 130-nm SiGe BiCMOS technology with an f T / f max of 250/370 GHz using patch antennas on a single 4.032 × 4.032 mm 2 chip. Current matching is used in the direct conversion mixer RF-input, dc-coupled to the on-chip antenna. At 240 GHz, an RX CG of 24.8 dB, a NF SSB of 14.9 dB, and a P out of −2 dBm have been measured.