High-Efficiency 200-GHz Neutralized Common-Base Power Amplifiers in 250-nm InP HBT

The analysis, design, and measurement of two Indium Phosphide (InP) heterojunction bipolar transistor (HBT) power amplifier (PA) designs are presented at G-band with record efficiency. A pseudo-differential common-base (CB) stage with neutralization capacitors and low-loss coupled-line balun (CLB) improve the gain and reduce matching loss. A single-stage design achieves 8.3 to 12.7-dBm output power and 7.7 to 17.3% power-added efficiency (PAE) over 180 to 220 GHz. The use of compact baluns allows the design to occupy only 0.011mm2 with power density of 1.69 W/mm2. A 3-stage, 4-way power-combined PA delivers 16.6 to 19.7-dBm output power and 6.5 to 13% PAE over 185 to 210 GHz.


I. INTRODUCTION
G-band (140-220 GHz) has been proposed for automotive radar and future backhaul communication systems in recent years due to the high resolution for imaging and wide available bandwidth for backhaul communication [1], [2]. While the wavelength at G-band constrains antenna spacing to 0.68 mm at 220 GHz in a phased array, critical front-end components such as power amplifiers (PA), low-noise amplifiers, phase shifter, and switches must also be compact while operating at high efficiency. In [3] and [4], the trend of published array element size larger than λ/2 above 70-GHz is observed. While RF circuits benefit from the reduced passive area at higher operating frequency, additional gain stages are required due to the reduced available gain per stage and the area of front-end components remains large. Moreover, efficiency is also placed at a premium since power density is proportional to the square of operating frequency if the output power per element is fixed. For instance, P sat of 17 dBm is a typical power level and 20% peak efficiency in an element of 5G 28-GHz phased array [5]. This implies that the DC power density of 0.87 W/cm 2 at 28-GHz. If we consider the same output power and efficiency at 220-GHz with λ/2 constraint, the DC power density will increase to 54.1 W/cm 2 , demanding active cooling. Therefore, a high-efficiency PA at G-band is required to constrain the power density.
Several G-band PAs have been published over the past few years. Bulk or SOI CMOS processes have limited f T /f max as well as low supply voltage. In [6], [7], output power and PAE of CMOS PAs are below 10-dBm and 8%. PA designs in SiGe HBT processes have shown decent power gain with multi-stage design and high output power with power combining at lower G-band range [8], [9] but the efficiency is limited to single digits above 200 GHz [10], [11]. Compared to the SiGe HBT, the 250-nm InP HBT process has superior collector-emitter voltage breakdown, higher f max for G-band PAs, and higher output power with higher small-signal gain across 140-220 GHz [12], [13], [14], [15], [16], [17]. InP HEMT or GaN HEMT are processes that can achieve high f T /f max but PA performance at G-band is still not competitive compared to SiGe or InP HBT due to increased loadline matching conditions [18], [19], [20].
In [21], we demonstrated a single-stage 180-220-GHz PA using neutralized CB design with 17.3% peak PAE in Teledyne 250-nm InP HBT process. In this expanded paper, the analysis and design details are expanded along with the demonstration of a 3-stage, 4-way power-combined PA in G-band to provide a comprehensive study of this approach. The comparison of common-emitter (CE) and CB in InP HBT will be discussed in Section II. The methodology of stabilizing CB topology is described in Section III. The implementation details of two PAs are revealed in Section IV. Section V shows the simulation and measurement results for both PAs.

II. COMPARISON OF CE AND CB IN INP HBT
Transistor configurations have a dramatic impact on performance above 100 GHz due to the role of parasitics. In general, higher gain is desired for compensating input matching losses of PA. Common-emitter (CE) is commonly selected for CMOS and SiGe PA designs in millimeter-wave bands [14] but CB [12] is also a candidate for the InP HBT process due to the relatively small base-collector capacitance.
From the small-signal simulation using 2-finger, 4-μm emitter length devices in physics-based scalable model biased at a current density of 2.75 mA/μm 2 , CE shows lower G max across the whole G-band band compared to CB as plotted in Fig. 1. Notably the f max of both configurations is identical. The performance summary of two topologies including small signal and large signal at 220-GHz is shown in Table 1. Although CE shows lower power gain than CB, the intrinsic PAE and output power of CE are both slightly better than those of CB. However, if passive matching loss is considered as shown in the last two rows in Table 1, CB designs maintain higher PAE compared to CE design. Comparing peak PAE including 1-dB input and output loss with the intrinsic PAE, PAE of CE is degraded with 17.6% while PAE of CB is only 9.6% lower. If optimum source and load impedance of two configurations are taken into consideration, both the source and load impedances of CE show higher VSWR than those of CB. Higher VSWR indicates higher matching loss, lower overall power gain and reduced highest achievable PAE is  expected while implemented with real passive components. Therefore, the CE result in the table with input and output loss considered are optimistic and CB is favorable for G-band PA design.

III. STABILIZATION OF THE CB STAGE
As plotted in Fig. 1, CB does not offer unconditional stability across G-band and requires additional stabilization circuitry. In [12], the authors leverage the sizing of base capacitance to linearize and stabilize CB stages as shown in Fig. 2(a). A collector series resistor is applied in [22] for stabilizing CB stages as shown in Fig. 2(b). In [23], a partially neutralized capacitor is implemented to prevent degradation on G max of CB as shown in Fig. 2(c). These three topologies and the rationale for design selection will be discussed in this section. Besides the approaches mentioned above, lowering base bias point is another approach commonly used to stabilize a CB stage. However, this approach is less favorable due to reduced conduction angle and lower power gain and therefore the lower highest achievable PAE is observed. More detailed analysis will be covered in Section IV.

A. SIZING OF BASE CAPACITOR
Finite base capacitance is designed in [12] without revealing the design consideration or parameters. To understand the reasonable design parameters, simulation of stability factor and maximum gain at 220 GHz with the sweep of base capacitance and quality factor (Q) of capacitance are shown in Fig. 3(a) and (b). As observed from Fig. 3(a), Q of base capacitance should be kept below 10 for stability factor to be higher than 1. From Fig. 3(b), Q of base capacitance should be selected in the range of 2-4 for possibly obtaining higher G max .
With the insight for determining Q at the base, the sweep of capacitance for 140, 180, and 220 GHz is shown in Fig. 4. The simulated results show the base capacitance lower than 70 fF with Q of 2 or de-Q resistance of 5.2 maintains unconditional stability. Notably, the MAG variation is less than 2 dB over the 80 GHz range suggesting that this technique is relatively wideband.

B. COLLECTOR SERIES-RESISTOR
Using conventional stabilization technique in [24], a series collector resistor is a straightforward methodology for stabilizing a CB stage [22]. The stability circles of the intrinsic  device are reduced and move toward the unit circle with additional collector resistance. The simulation in Fig. 5 shows 11.5 or higher resistance would stabilize over the entire G-band with higher gain at 140 GHz compared to base capacitance approach, but the gain rolls off quickly at 220 GHz suggesting that this technique will produce relatively narrowband results.

C. COLLECTOR SERIES-RESISTOR
Pseudo-differential neutralization is widely adopted in mmwave common-source and/or CE amplifiers in CMOS and BiCMOS process [25]. A pair of neutralization capacitors are added between input and output of amplifier in cross-coupled fashion to enhance the reverse isolation and unilateralize the device for unconditional stability. However, this technique has not been widely adopted with CB mm-wave PAs. In [24], the CB neutralization technique is applied to 600 GHz in 130-nm InP HBT process for high gain but the performance for power amplifiers has not been described. This manuscript attempts  to address this opportunity to explore collector-emitter neutralization in a CB power stage.
To understand the topology, a simplified small-signal model is shown in Fig. 6 and the Y-parameters can be written as where C neu is neutralization capacitance. From (4), we could observe the reverse isolation will be maximized by choosing C neu equals to C ce . Generally, adding C neu tends to push the stability circles out of the Smith chart unit circle as shown in Fig. 7. The disadvantage of this topology from (1) and (2) is the increased total input and output capacitance, which will make input and output matching network more narrowband as well as more lossy. The G max and stability factor with the sweep of neutralization capacitance at 140, 180, and 220 GHz is shown in Fig. 8. From the plot, C neu should be larger than 1.8fF for stabilizing the entire band while offering more gain than the other approaches.

D. COMPARISON OF TOPOLOGIES
If the in-band unconditional stability criteria of power cell are the same for all three approaches, G max at 220 GHz of the base-capacitor stabilized approach drops to 6 dB, the collector series-resistor stabilization method drops to 6.8 dB, while the neutralized CB stabilization degrades to 10.2 dB. With stabilized in-band power cell, out-of-band unconditional stability is normally achieved with matching networks by avoiding conditional stability. Therefore, the neutralized CB offers higher G max than the other two cases. It is also worth mentioning that adding collector series-resistor will increase the effective knee voltage and this is not favorable for PA   design. Large signal simulation results of three topologies are summarized in Table 2 where the neutralized CB shows best overall performance compared to the other two topologies.

IV. CIRCUIT IMPLEMENTATION
To investigate the large-signal performance, single-stage ( Fig. 9) and 3-stage 4-way-combined (Fig. 10) PAs are designed in InP HBT process. Teledyne's 250-nm InP HBT process offers four gold metal layers in Benzocyclobutene (BCB) with 75-μm thick InP substrate and through-wafer vias. Thin film resistors and metal-insulator-metal (MIM) capacitors are available in this process. Only single-finger models are available in this process and multi-finger models comprise several single fingers in parallel with routing captured in EM simulation. Also, it is worth noticing there is no thermal model in this process and thus larger simulation and measurement discrepancy could be observed in high power region. Mutual heating between devices also contributes to model/hardware correlation. The single-stage design is constructed with input and output baluns, the neutralized CB power cell, and additional matching network between power cell and balun. The output power level with optimum PAE is estimated [31], [32] with equation where The α is the conduction angle, f 0 is operating frequency, k is the coupling factor of transformer or balun, Q i and Q o are quality factor of passive elements at input and output while C o is the output capacitance of power transistors. With the expression in (5), PAE contour with sweep of output power and conduction angle at 220 GHz is plotted in Fig. 11. Class-AB operation with output power level at around 17.4 mW shows the highest PAE.
The 3-stage 4-way-combined design includes both neutralized CB driver stages and non-neutralized CB final stage for higher output power. The neutralized CB is not used in final stage of high-power PA is observed through (2) and (7) where high output matching loss could be observed. Also, larger C neu introduces self-resonance toward lower frequency and cause instability out-of-band. To achieve same output power as nonneutralized CB design, 8-way-combined PA will be required for neutralized CB. However, an 8-way-combined design will be difficult to fit into λ/2 constraint in a phased-array transmitter. A 4-way power splitter is added between the first and     second stage along with a 4-way power combiner at the output stage. The device size ratio of the three stages is 1:4:8 while the highly coupled transformers are designed between the second and last stages. Adaptive bias (ADB) is also added to ensure the last stage could be biased lower in small signal region for stability consideration while maintaining sufficient power gain at high power region.

A. POWER CELL DESIGN
The footprint of the proposed neutralized differential CB power cell is shown in Fig. 12(a) with total device size of  4 μm 2 composed of a pair of 2-finger 4-μm emitter length HBTs. To further increase the output power, the last stage of the 3-stage 4-way-combined PA uses 8 μm 2 total device size periphery formed from a pair of 4-finger 4-μm emitter length HBTs as shown in Fig. 12(c). In this large power cell, the neutralization capacitor is not applied due to large additional input and output capacitance that will increase the loss of matching network and lower PAE. Both designs occupy small area, 2-finger cell is 37 μm × 44 μm and 4-finger cell is 30 μ m × 47 μm.
In both designs, the collectors are shared between different fingers for the minimum footprint as well as reducing the series inductance and phase delay between fingers. The base voltage is fed from either left or right side making it easier for multi-way power combining design. The distance between all base connections is minimized such that the ac currents have a low-impedance path between the devices while suppressing base inductances that induce instability. A secondary consideration between these cells is the self-heating between transistors.
Load-pull simulations of the G-band neutralized power cell in Fig. 12(a) are shown in Fig. 12(b) with characteristic impedance of 13.6+j51 at 220 GHz. The differential equivalent load impedance shows 40 pH 200 is required to achieve 13.5 dBm peak power and 32.7% peak PAE at 220 GHz with 6-dBm input power.

B. G-BAND COUPLED-LINE BALUN
From the analysis in Section II, the output balun loss is important to realizing high efficiency. In [26], the sub-quarterwavelength balun (SQWB) is proposed for pseudo-differential CE PA in W-band. The loss of SQWB is low, but the area footprint remains large due to the spacing between bottom plate metal and ground metal and two bypassing capacitors. At G-band, bypassing capacitors not only occupy large area but also provide finite resistance to AC ground and, therefore, the loss of balun increases. Additionally, long dc power line introduces voltage drop and the symmetry between different power cells.
To reduce the size and improve loss, bent transmission lines leverage a virtual ground as proposed in [27] for D-band design. The design is moved to G-band for both single-stage and power-combined versions. Fig. 13 shows the output balun design in the single-stage PA. The differential port (IN+ and IN−) is on metal 3 (M3)  while the single-ended port (OUT) is on metal 4 (M4). IN+ is directly connected to OUT while the signal from IN− is coupled from M3 to M4. The simulated equivalent inductance of two coils is 45.6 pH differential and 41.1 pH on single-ended side with coupling factor of 0.58 at 220 GHz. The simulated phase error and gain error between differential ports are 3.4°a nd 0.12 dB while G max of this CLB is −0.78 dB at 220 GHz.

C. POWER COMBINER DESIGN
Low-loss power combiner is a key for keeping high efficiency while targeting high output power. In [28], the parallel power combiner and design methodology are proposed at D-band using a CMOS SOI process. A similar approach is applied to the 3-stage, 4-way-combined PA design. The design parameters at different nodes of parallel power combiner are shown in Fig. 14(a). In this implementation, the RF pad impedance is designed to minimize the length of transmission line for compact size and lower loss. The impedance trajectories are  Fig. 14(b) on Smith chart and the simulated loss of combiner is 0.25 dB.

D. ADAPTIVE BIAS CIRCUIT
Since the last stage of the 3-stage, 4-way-combined PA is not a neutralized CB stage, a lower bias condition, e.g., deeper class-AB, is applied for reducing the small signal gain. However, PAE drops with the lower bias condition due to low power gain at high power region. The ADB shown in Fig. 9 is formed with a BE diode-connected HBT, a RC filter and an emitter-follower. With capacitive coupling from the output of the first stage, the base voltage of Q1 drops and emitter voltage increases at high power region due to higher current flowing through the base and emitter resistors. The emitter voltage is later fed to an emitter-follower for providing isolation as well as controlling the adaptive voltage range. Simulated results of voltage at different nodes are shown in Fig. 15. The plot also shows stability factor of PA at 205 GHz is stable at low power region and is still stable at high power region with ADB.

V. SIMULATION AND MEASUREMENT RESULTS
The proposed PAs are implemented in a 250-nm InP HBT process and illustrated in the microphotograph in Fig. 16(a) and (b). The core area of two designs are 0.011 mm 2 and 0.113 mm 2 while the chip area including pads are 0.119 mm 2 and 0.286 mm 2 . The single-stage base is biased with 0.82 V and the collector supply is 2.5 V. The first and second stage bases of the 3-stage, 4-way-combined PA are biased at 0.83 V with a 2.1 V collector supply. The third stage base is biased with ADB from a supply voltage is 2.5 V.
The S-parameters are measured with G-band OML frequency extender with WR5 to WR4.3 wave guide taper as shown in Fig. 17(a). WR4.375-μm pitch waveguide probes are used, and calibration is done with CS-15 calibration substrate to the probe tip. The power measurement setup is shown in Fig. 17(b) and is executed with VDI WR4.3SGX-M signal generation module as power source. The directional coupler with sub-harmonic mixer on coupled port is used to down convert the input signal for obtaining the calibration factor and tracking the input power. The output is connected to power meter with WR4 to WR10 waveguide taper. The probe loss is captured using the shortest thru line on CS-15 and therefore the calibration is also done to the probe tip for power measurement.

A. SINGLE-STAGE PA DESIGN
The measured and simulated S-parameters of the single-stage PA are plotted in Fig. 18. The measured peak gain is 7.8-dB at 197 GHz with a 182 to 218 GHz 3-dB bandwidth. The discrepancy of S12 between simulation and measurement are due to separate EM cells in simulation that does not capture the coupling between two baluns and power cell. Power measurements at 200 GHz are plotted in Fig. 19. The measured peak PAE is 17.3% at 10.5 dBm output power while still offering 5.7-dB power gain. The OP1dB at 200 GHz is 10.8 dBm. The output power and PAE across frequencies are also measured in Fig. 20. The measured output power is over 8.3 dBm and PAE is over 7.7% across a frequency range covering 180 to 220 GHz. The measured small signal gain is downshifted 10% of simulated center frequency which is due to the segmented EM cells that is not capturing the input and output coupling between passive matching networks as well as RF pads. The large signal discrepancy is most likely due to self-heating that is not incorporated into HBT devices model. Similar discrepancy is also observed in [12].

B. A 3-STAGE, 4-WAY-COMBINED PA DESIGN
The simulated and measured S-parameters of the 3-stage, 4-way-combined PA are plotted in Fig. 21. The measured peak gain is 17.6-dB at 201 GHz with 194 to 207 GHz 3-dB bandwidth. Power measurements at 200 GHz are plotted in Fig. 22. The measured peak PAE is 9.1% at 17.8 dBm output power while still offering 16.5-dB power gain. Output power and PAE across frequencies are also measured in Fig. 23. The measured output power is between 16.2 to 19.7 dBm and PAE reaches 13% in the range of 185-215 GHz. The discrepancy between simulation and measurement is mainly due to model accuracy as well as the higher temperature not captured in simulation. Since ADB is highly relying on model accuracy and shifted with temperature change, the power sweep curve in Fig. 22 and the large signal performance in Fig. 23 are not close to simulation results.

VI. CONCLUSION
In this paper, we demonstrate two G-band PAs with high PAE. The neutralized CB is used in both designs for maintaining high gain and efficiency. Parallel power combining and adaptive bias circuits are also applied to the 3-stage, 4-waycombined PA. The performance summary is shown in Table 3. The PAE survey of G-band PAs is plotted in Fig. 24. The PAE and output power of 180-220 GHz PA is shown in Fig. 25 and our proposed designs show superior performance compared to the prior art.