Non-Isolated Ultra-High Voltage-Gain-Coupled Inductor-Based DC–DC Converter

In this brief, an improved non-isolated coupled inductor-based high step-up DC-DC converter is proposed, with ultra-high voltage gain thanks to an active switched inductor. Utilizing a three-winding coupled inductor (CI) adds two more freedom degrees arising from its turns ratios that leads to a wide output voltage range. Several capacitive and inductive power transferring methods with no circulating current are used to recycle the stored energy in passive components. Two series-connected output ports and a passive clamp make the output and switch voltage stresses more tolerable, respectively. In addition, synchronized operation of switches leads to an easily implementable control system. Operation of the proposed converter in continuous conduction mode is analyzed thoroughly along with boundary and discontinuous conduction modes. Moreover, components design guideline is provided, and to evaluate the features, the converter is compared with some recent converters. Eventually, the experimental results of a 300 W laboratory prototype are given to validate the theoretical analysis.

Non-Isolated Ultra-High Voltage-Gain-Coupled Inductor-Based DC-DC Converter Homayon Soltani Gohari , Naghi Abbasi Mardakheh, Hadi Tarzamni , Student Member, IEEE, Naser Vosoughi Kurdkandi , Karim Abbaszadeh , and Jorma Kyyra , Member, IEEE Abstract-In this brief, an improved non-isolated coupled inductor-based high step-up DC-DC converter is proposed, with ultra-high voltage gain thanks to an active switched inductor.Utilizing a three-winding coupled inductor (CI) adds two more freedom degrees arising from its turns ratios that leads to a wide output voltage range.Several capacitive and inductive power transferring methods with no circulating current are used to recycle the stored energy in passive components.Two seriesconnected output ports and a passive clamp make the output and switch voltage stresses more tolerable, respectively.In addition, synchronized operation of switches leads to an easily implementable control system.Operation of the proposed converter in continuous conduction mode is analyzed thoroughly along with boundary and discontinuous conduction modes.Moreover, components design guideline is provided, and to evaluate the features, the converter is compared with some recent converters.Eventually, the experimental results of a 300 W laboratory prototype are given to validate the theoretical analysis.
Index Terms-Coupled inductor, DC-DC power conversion, high step-up converter, passive clamp.

I. INTRODUCTION
E XPANDING employment of renewable energies has led to a revolution in the power electronic systems, where DC-DC converters play an important role in this process [1].High step-up DC-DC topologies are the crucial category of the DC-DC converters due to their ability to boost the low output voltage of renewable sources, such as photovoltaic and fuel cells, to the suitable levels (typically 380∼400 V) [2], [3].Various DC-DC converters have been introduced in previous studies.Utilizing interleaved stages, coupled inductor (CI), switched inductor, switched capacitor, and cascading are the most common solutions to achieve high voltage gain, which has led to numerous high gain converters introduced in recent years.A single switch high step-up converter, featuring expandable structure, has been introduced in [4].Although the scholars tried to achieve low switch voltage stress, voltage gain of the introduced converter is low.Different types of voltage multiplier cells (VMCs) enable the converter to boost the input voltage in an effective way.In [5], a VMC-based high step-up DC-DC converter is proposed.In spite of the high number of components, its voltage gain is not high.Similar to [4], a single switch expandable structure is the approach that is utilized in [6].Although it provides adjustable voltage gain thanks to the expandable structure, the voltage gain of its basic form, with one stage, is low and increasing its voltage gain needs more stages and consequently more components.Two bidirectional DC-DC converters are proposed in [7], [8] that are able to increase and decrease voltage levels in different directions; however, their low voltage gain in step-up mode is their main disadvantage.A bidirectional CI-based step-up converter featuring soft switching performance is introduced in [9].Although the switch voltage stress is reduced, low voltage gain makes it unsuitable for high voltage gain industrial applications.Similarly, low voltage gain restricts the applications of the converters proposed in [10], [11].
In order to compensate or eliminate these issues, a new ultra-high step-up DC-DC converter is proposed in this brief.The proposed topology (i) achieves high output voltage gain with a wide control region, (ii) transfers the power to the output port by using the magnetic field of inductors to improve power density, (iii) recycles the stored energy of parasitic inductances to the load terminals to prevent circulating currents and improve efficiency, and (iv) operates with simple control in a system with three degrees of freedom to regulate output voltage.The organization of this brief is as follows.Analysis of the proposed converter and design procedure are given in Sections II and III, respectively.The proposed converter is compared with state-of-the-art in Section IV to verify its capabilities.The experimental results are provided in Section V with a 300 W prototype to validate the theoretical calculations, and the conclusion is presented in Section VI.

II. PROPOSED CONVERTER: DESCRIPTION AND ANALYSIS
The power circuit of the proposed converter is depicted in Fig. 1.One three-winding CI consisting of a primary (n p ), a secondary (n s ), and a tertiary (n t ) winding with turns ratios of N 1 = n s /n p and N 2 = n t / n p is utilized in addition to two switched inductors (L 1 and L 2 ).As shown in Fig. 2  in series and parallel with the transformer, respectively.The inductive and capacitive components are assumed large enough to ignore their current and voltage ripples, respectively.The power switches, S 1 and S 2 , are operated with common gate pulses.The CCM operation of the proposed converter includes two time intervals which leads to the steady-state voltage and current waveforms shown in Fig. 3.It should be noted that all circuit components are considered ideal without any parasitic elements to simplify the following theoretical analysis.Hence only main operation states are considered and impacts of L k are ignored.

Mode I (0 < t < DT S ):
Power switches are in ON-state, and as a result, diode D 2 conducts while other diodes are off (Fig. 2(a)).In this condition, the input voltage V i charges the equivalent inductor L = L k + L m , and the inductors L 1 and L 2 are magnetized through V i , V C1 , and V C1 + V C2 , respectively.In addition, the output capacitors are discharged to the load.
According, below current equations can be written:

Mode II (DT S < t < T S ):
The power switches are turned off simultaneously at t = DT S , and all diodes are in the forward bias except D 2 .L k and L m are discharged to C 1 and C o1 via D 2 and D o1 , respectively.In addition, as shown in Fig. 2(b), L 1 and L 2 are discharged to C 2 and C o2 through D 3 and D O2 , respectively.Hence, current equations are obtained as follows: where, f s is the switching frequency.
To calculate CCM voltage gain of the proposed converter, the volt-second balancing law is exerted on the inductors (L, L 1 , and L 2 ) which leads to: Hence, the CCM voltage gain of the proposed converter is concluded as Accordingly, two-dimensional and three-dimensional graphs of the CCM voltage gain are depicted in Fig. 4 as a function of duty cycle and CI turns ratios.Based on Fig. 4(b), G is more sensitive to N 1 than N 2 variation.
The boundary conduction mode (BCM) occurs as soon as the average input current reaches to its boundary value which is: I iB = i L / 2. Considering the equations of input current during the first mode (1) and voltage gain (8), the output current (I oB ) and load resistance (R oB ) of the BCM are given as Fig. 5 shows the normalized I oB and R oB as a function of duty cycle in different N 1 and N 2 values, where higher N 1 , N 2 and D leads to a wider solution space for CCM and DCM in the normalized I oB and R oB planes, respectively.As mentioned, among different DCM operation scenarios, the most probable modes caused by discontinuous operation of L 2 and L are considered in this brief.
First discontinuous conduction mode (DCM1) occurs when the current of L 2 reaches zero (Fig. 6(a)) that leads to the third operating mode.In this condition, other inductors operate with continuous current.The second discontinuous conduction mode (DCM2) happens if L has discontinuous operation as well as L 2 (Fig. 6(b)).The DCM2 consists of two more operating states compared to CCM that are named as the third and fourth modes.Voltage gain equations of the proposed converter in DCM1 and DCM2 are calculated as where, d 1 T S , d 2 T S , and d 3 T S are the time duration of the first, second, and third modes shown in Fig. 6.

III. DESIGN GUIDELINE A. Voltage and Current Stresses of Semiconductors
According to Fig. 2, voltage stress of the power switches and diodes are obtained as below.Variations of switches voltage stress caused by CI turns ratios change is illustrated in Fig. 7.
By using Fig. 3, and applying ampere-second balancing law on the capacitors, average values of i Lm , i L1 , i L2 , and i X will be: ) Path of the i X is shown in Fig. 1.
According to the Fig. 2 and using ( 15)-( 17), current stress of power switches and diodes are determined as

B. Design of Inductors
Considering current equations of inductors calculated in ( 15)-( 17), the minimum desired values of L m , L 1 , and L 2 are concluded as (21) Input current ripple ( i L ) is a vital factor.According to ( 22), in addition to the magnetizing inductor value, duty cycle and CI turns ratios affect the input current ripple.Figs.8(a) and (b) reveal i L as the functions of D and N, respectively.Note that, B = V o /f s L. Additionally, the duty cycle and CI turns ratios belong to the maximum input current ripple is illustrated in Fig. 8(c).As shown in Fig. 8(a) and Fig. 8(c), regardless of CI turns ratios, the maximum i L occurs in duty cycles less than 0.193.This feature facilitates the design procedure in such a high step-up converter, in which higher duty cycle values are preferred.

C. Design of Capacitors
Considering Fig. 2 and average current obtained in ( 15)-( 17), minimum capacitance of the capacitors is calculated as follows: IV. COMPARATIVE STUDY To assess the advantages and disadvantages of the proposed converter, it is compared with some non-isolated high stepup DC-DC converters presented in recent publications.The main structural and operational characteristics of the selected converters are listed in Table I.Number of semiconductors are considered due to its effect on reliability, efficiency, and cost of the converters.Additionally, number of the switches affects the switch gate drive system cost and complexity.On the other hand, volume and power density of the converters mostly rely on the number and size of inductive and capacitive components.Number of operational modes (NOM) is considered as the next evaluation factor because of its effect on the control system complexity.Output voltage gain, the vital feature of the high step-up converters, and accumulative switch voltage stress are also analyzed.Their curves are plotted as a function of duty cycle in Fig. 9. Considering Table I and Fig. 9 (a), the converters in [1], [2], [4], [5], [6], [10] and [14] have the least number of power switches; however, low voltage gain is their main disadvantage.Topologies in [3], [11], and the proposed converter have two power switches; however, not only the topologies in [3] and [11] have lower voltage gain, but their switches also need two separated gate pulses.Meanwhile, the proposed converter needs a single gate pulse due to the simultaneous operation of the switches.Furthermore, the converter in [11] has larger accumulative switch voltage stress in comparison with the proposed converter.As inferred from the Table I, the proposed converter has only two operational modes that simplifies its control system.From voltage gain point of view, as shown in Fig. 9(a), the highest voltage gain is offered by the proposed converter for the duty cycles more than 0.5.As can be seen, all the converters except the converters in [1], [3], [4], [5], and [18] suffer from larger switch voltage stress in comparison with the proposed converter.Although these topologies have lower switch voltage stress, their low voltage gain restricts their application.Additionally, limited duty cycle is another disadvantage of the converter in [3].
Loss breakdown and efficiency of the converters are also compared in Fig. 10.Based on the provided comparison study in this section, the proposed converter provides one of the best operation, topology and control features among other state-ofthe-art.

V. EXPERIMENTAL RESULTS AND DISCUSSION
In order to verify the feasibility of the proposed converter and validity of the accomplished theoretical analysis, a 300 W (nominal power) prototype of the proposed converter shown in Fig. 11(a) is tested, and the experimental results are discussed in this section.The operating parameters and main characteristics of the implemented setup are given in the Table II.Both power switches are controlled with a single gate pulse, generated from STM32F746 microcontroller and separated gate driver circuits using TLP250.Efficiency of the implemented prototype at P O = 263 W is measured as 95%.In addition, its efficiency curve at different load values is shown in Fig. 11(b).Using (8), the ideal CCM voltage gain and output voltage are equal to G=15.92 and V O =382 V. Output voltage and current are shown in Fig. 11(c) which led to 263 W output power.The output voltage, comprising of output capacitors voltages expressed in Fig. 11(d), is a bit more than 370 V which is a little lower than the theoretical result.The voltages across C 1 and C 2 are illustrated in Fig. 11(e) which validate the theoretical analysis given in (6).The voltage waveforms of S 1 , S 2 , D 1 , D 2 , and D 3 are depicted in Fig. 11(f)-(h) which verify matching of the experimental results and theoretical voltage stresses obtained from ( 12)- (13).Low voltage spikes of switches and diodes shown in the mentioned figures prove the capability of the proposed converter in high voltage and frequency applications.To analysis the current stresses of the semiconductors, their current waveforms are illustrated in Fig. 11(i)-(n).It should be noted that current of the secondary and tertiary windings of the CI are equal to the current of D 1 and D o1 , respectively.Furthermore, current of the primary side of the CI is equal to the input current which is shown in Fig. 11(o).Current of L 1 and L 2 are shown in Fig. 11(p)-(q).Finally, in order to assess the dynamic response of the implemented prototype, a 30% load step change is applied to the prototype in two points (named A and B) shown in Fig. 11(r).As can be seen, the converter  is able to track its desired output voltage after an acceptable transient response.

VI. CONCLUSION
A non-isolated ultra-high voltage gain DC-DC converter using a three-winding CI was introduced, analyzed and tested.Simple gate driver system, ability to reuse the stored energy in passive components, wide voltage gain, low semiconductor spikes, and ability to achieve high voltage gain with low duty cycles and turn ratios are the main features of the proposed converter.Two possible discontinuous conduction modes were analyzed, and components' design guideline was given.According to the comparative study, the proposed converter provides one of the best operation, structure and control features among other state-of-the-art.Moreover, in order to verify the feasibility of the proposed converter and validity of the theoretical analysis, a 300 W laboratory prototype of the proposed converter is implemented and experimental current and voltage waveforms are given.In addition to the steady-state operation, transient response of the implemented prototype is tested and the results are given.

Fig. 8 .
Fig. 8. Input current ripple as a function of B = V O / f s L and: (a) D in N 1 =1, N 2 = 3.(b) N in D = 0.6; (c) Maximum input current ripple in terms of D and N.

Fig. 9 .
Fig. 9. (a) Voltage gain (b) Normalized switch voltage stress of converters in Table I in accordance to duty cycle with N=3.

TABLE I OPERATIONAL
AND STRUCTURAL COMPARISON OF THE PROPOSED CONVERTER (PC) AND RECENTLY INTRODUCED CONVERTERS

TABLE II CHARACTERISTICS
OF THE IMPLEMENTED PROTOTYPE