A Current Monitoring and Over-Current Detection Circuit for Safe Electrical Stimulation

This brief presents an integrated solution to over-current protection in neuromuscular stimulators. The proposed approach provides fast detection of a single-fault condition, i.e., unintentional electrode short circuit or malfunction of the stimulator, thereby preventing prolonged high-intensity currents from flowing into tissues. In addition, a programmable current threshold enables the system to be also used for monitoring the stimulation intensity. The proposed solution was designed in a 180 nm high-voltage CMOS technology, and its functionality was verified by post-layout simulations in which the safety mechanisms were tested under fault conditions. The implementation only occupies an area of 0.286 mm2, making it feasible to be embedded in fully integrated NMES stimulators while providing the required patient safety.

Abstract-This brief presents an integrated solution to overcurrent protection in neuromuscular stimulators. The proposed approach provides fast detection of a single-fault condition, i.e., unintentional electrode short circuit or malfunction of the stimulator, thereby preventing prolonged high-intensity currents from flowing into tissues. In addition, a programmable current threshold enables the system to be also used for monitoring the stimulation intensity. The proposed solution was designed in a 180 nm high-voltage CMOS technology, and its functionality was verified by post-layout simulations in which the safety mechanisms were tested under fault conditions. The implementation only occupies an area of 0.286 mm 2 , making it feasible to be embedded in fully integrated NMES stimulators while providing the required patient safety.
Index Terms-Neuromuscular electrical stimulation, current monitoring, over-current detection, safe electrical stimulation, HV CMOS process.

I. INTRODUCTION
N EUROMUSCULAR electrical stimulation (NMES) is a widely used technique in clinical rehabilitation to control the muscle nerves by delivering electrical charges to the tissues. In order to achieve a sufficient depolarizing effect and evoke action potentials, high-intensity short-duration pulses, commonly up to several tens of mA are required [1]. High voltage compliance, well above the voltage rating of a standard CMOS process, is required since electrode-skin/tissue impedance has typical values ranging from a few hundred to 1 k . For this reason, NMES devices are usually powered by high-voltage (HV) sources and also require using HV CMOS technology.
In a conventional H-bridge bipolar stimulator [2], [3], [4], the current strength is controlled by the tail current source (I st ). A current path is formed from the HV power supply to the target tissues through switches as demonstrated in Fig. 1(a). Under fault conditions, such as semiconductor device failure, misuse of the device, or poor electrode-ground isolation, a short circuit path from the HV supply via tissues to the ground may be formed as depicted in Fig. 1 over-current stimulation. It has been reported in the literature that over-current stimulation leads to discomfort, pain, or even tissue damage [5], [6]. Therefore, a safety mechanism is an indispensable functional block in a muscular stimulator to cope with over-current stimulation. Placing a series blocking capacitor at the output of a stimulator is a straightforward approach for isolating tissue from the HV DC supply and limiting the maximum charge transfer [7], [8]. However, the blocking capacitor requires to be significantly large in order to minimize the voltage drop induced during normal operation. The capacitance is generally in the order of several µF which is impractical to implement on chip [9].
In this brief, an over-current detection and current monitoring solution that is amenable to on-chip integration is proposed. With the capability to monitor stimulation intensity, the proposed protection scheme requires only a single-fault condition, e.g., an over-current event, to trigger the stimulator into safe mode. In this mode, the system is forced to shut down and the patient is completely disconnected from the HV supply to prevent potential harm caused by over-stimulation.
The rest of this brief is organized as follows. Section II describes the system architecture and the operation principle in detail. Section III presents the circuit implementation of key blocks. The post-layout simulation results are shown in Section IV to demonstrate the functionality. Finally, conclusions are drawn in Section V.

A. System Overview
The proposed design for over-current protection is based on current sensing and event-triggered shutdown control as   illustrated in Fig. 2. It comprises four fundamental circuits: i) a current sensor, ii) a comparator with programmable thresholds, iii) digital logic for mode selection and shutdown control, and iv) a high-side gate driver. The current sensor monitors the current, I VDDH , that flows from the HV supply to tissues via the H-bridge. Its output, V CS , is a voltage proportional to the sensed current. V CS is applied to a continuous-time comparator and compared with a voltage threshold V TH . The comparison result, D out , is interpreted differently depending on the mode selection. In the protection mode (Mode = 1), D out indicates the occurrence of an over-current event that is registered in an SR latch. Once the over-current is detected, D out sets the SR latch, and the high-side gate driver then turns off the PMOS switch P SW that connects the HV power supply to the stimulator, preventing high-intensity I VDDH from flowing into tissues. In monitoring mode (Mode = 0), the shutdown control is disabled and D out tells if the chosen stimulation level is reached or not. Fig. 3 shows the system operation flow. To start an NMES treatment, the stimulation parameters such as stimulation frequency, pulse width, current intensity, and overcurrent threshold are set. The system is initially in protection mode to ensure protection during start-up and configuration. The system then starts stimulation and changes to monitoring mode. Once the chosen strength is reached, the electrical treatment continues and the system changes to protection mode to prevent an over-current stimulation event. To support the operation of these two modes, V TH requires programmability such that different levels of current strength can be distinguished in monitoring mode, and various over-current thresholds can be defined to accommodate diverse safety scenarios.

B. Current Sensing
The current-shunt monitor architecture [10] shown in Fig. 4 is chosen for current sensing as it offers a simple approach to measure the current flowing between a voltage source and a load. In this architecture, a small shunt resistor, R S , is inserted into the circuit, and a voltage, V S , proportional to the load current is induced across R S . Therefore, the current sensing can be accomplished by measuring this voltage difference using an instrumentation amplifier as demonstrated in Fig. 4. Depending on the placement of R S , there are two possible topologies: low-side current sensing [11] (Fig. 4(a)) and high-side current sensing [12] (Fig. 4(b)).
In the low-side sensing architecture, the circuit implementation of the instrumentation amplifier is simpler. Nonetheless, the major disadvantage of this topology is its lack of ability to detect short-circuit currents not flowing through R S . For instance, a situation in which an electrode is touching ground will not be detected. For this reason, high-side current sensing is selected and implemented in this system. However, this topology poses design challenges because of the high input common-mode voltage (V CM,in ). Due to the small value of R S , both inputs of the instrumentation amplifier can be considered to be connected to VDDH. As a result, its implementation requires a HV-tolerant interface with a high common-mode rejection ratio (CMRR) and voltage translation to a low-voltage output such that the rest of the circuits can be implemented using standard low-voltage transistors, offering lower power consumption and saving silicon area.

C. System Programmability
It has been reported that the safety limits and the patient's comfort level have a direct correlation to charge injection density (C/cm 2 ), electrode material, and stimulation protocols [5], [13], [14]. These factors combined with individual variances between patients require the current threshold to be programmable. The proposed design provides a programmable current threshold as shown in Fig. 2. In this design, a 5-bit digital-to-analog converter provides tunable current thresholds, ranging from 2.5 mA to 80 mA with a stepsize of 2.5 mA. This current range covers the current intensity used in general neuromuscular electrical stimulation [1].

III. CIRCUIT IMPLEMENTATION
The building blocks of the proposed system were designed and implemented using a 180 nm CMOS technology that provides 40 V high-voltage transistors with 18 V gate-oxide breakdown.  The input transistors M N1a,b are configured as commondrain amplifiers in order to shift down the input DC level and set proper DC operating points of M N2a,b . This is necessary because of the high V CM,in which is around VDDH. The voltage difference between V G,MN1a and V G,MN1b is sensed by the degeneration resistor R 1 and the resulting current is mirrored to the output by M P1a/b and M P1a /b . The output voltage of the HV-TCA is limited within the safe-operationarea (SOA) of LV transistors in this CMOS technology by cascoding M N3 . The negative feedback at the LV-TIA results in an input impedance much lower than 1/g m,M N3 , enabling it to efficiently sink the output current of the HV-TCA. This current is then converted into voltage through the feedback resistor R 2 . The bandwidth of the current-sensing amplifier is determined by R 2 and C 1 . These components provide first-order filtering to suppress high-frequency voltage spikes induced by the on-off transition of the switches in the Hbridge structure during normal operation. As a result, the voltage gain of the current sensing amplifier is approximately given by:

A. High-Side Current Sensor
where K is the W/L ratio of M P1a /b to M P1a/b . The resistors R 1 and R 2 , and the current mirror are well matched in layout, making the voltage gain less sensitive to process variations. Besides voltage gain error (e gain ), the accuracy of the current sensing is also limited by the current-to-voltage conversion at the shunt resistor (e shunt ). Since standard on-chip resistors have a large variation in resistance, some means of calibration or the use of a thin film precision resistor [15] may be necessary to reduce this error. Finally, the input common-mode voltage, V CM,in , introduces an offset error (e offset ) that can be derived by: As a consequence, the first-order total error of the current sensing is given by [16]: Accordingly, the current-sensing amplifier requires an accurate gain, a high-precision shunt resistor, and a high CMRR in order to sense a small V shunt in the presence of a high V CM,in .

B. Comparator With Programmable Thresholds
The continuous-time comparator in Fig. 6 is implemented by using a conventional OTA-based push-pull comparator [17] as it offers lower latency compared to the open-drain output counterpart. The comparator compares the output of the current sensing amplifier (V CS ) and a tunable threshold voltage (V TH ) from the DAC's output, and produces the output digital signal D out that is used for shutdown control and stimulation strength monitoring. The programmability of the threshold voltage is achieved by a 5-bit binary-weighted current-scaling DAC and a transimpedance amplifier. This architecture offers high power efficiency and simplicity for low-resolution designs. The current threshold can be calculated by: Fig. 7. Schematic of the high-side gate driver. C. High-Side Gate Driver Fig. 7 presents the high-side gate driver circuit that controls the PMOS switch M PSW which is used to isolate the H-bridge driver from the HV supply when an over-current event is identified. The gate driver is based on an open-drain topology with a resistive voltage divider [18]. This is a flexible solution that allows to define proper driving voltage levels only by sizing the resistors. Accordingly, M PSW is driven on/off by an appropriate V GS,psw without exceeding the gate-oxide breakdown voltage which is 18 V in this CMOS technology.

IV. POST-LAYOUT SIMULATION RESULTS
The layout of the design is shown in Fig. 8. The whole solution occupies a silicon area of 0.286 mm 2 . Fig. 9 shows a post-layout simulation of an over-current event-triggered shutdown control when the system is in protection mode. The testbench emulates a situation in which the electrode is accidentally shorted to ground during stimulation. In this example, the over-current threshold is set to 50 mA. As shown in the plot, the stimulator circuit constantly delivers biphasic current stimuli until the short-circuit event occurs. At t = 2.05 ms, a short-circuit current that exceeds the over-current threshold is observed, and the system immediately responds to this abrupt change in current, resulting in an increase of the sensed voltage V CS . Once V CS exceeds the threshold voltage that corresponds to 50 mA current threshold, the high-side gate driver turns off the PMOS switch and shuts down the system. The simulated response time is 1.57 µs. Fig. 10 presents simulation waveforms of the proposed system when it is configured in monitoring mode. In this demonstration, the stimulation current is set to 10 mA and the current threshold increases in steps of 2.5 mA. Both the stimulation current and the current threshold are translated into the voltages V CS and V TH respectively before they are processed by the comparator. In the first four cycles, the output   of the comparator D out toggles between low and high, meaning that more iterations are required. Once V TH exceeds V CS , D out remains low, indicating that the current measurement has been completed. Fig. 11 presents Monte Carlo simulation results of the current sensing amplifier (Fig. 5) under process variations and mismatch. The statistical results show that the current sensing amplifier provides a precise voltage gain and a sufficiently high CMRR. Based on (3), it corresponds to a 5.2% maximum total error assuming that R S has 0.1% tolerance [15]. Table I shows a summary of the design specifications and performance metrics of the proposed design.

V. CONCLUSION
This brief presented an integrated solution that targets patient safety during NMES treatment. The proposed approach is able to monitor stimulation current levels and detect overcurrent events caused by device malfunction, or unintentional short circuits. The circuits are designed in a 180 nm CMOS process that offers 40V DMOS devices and occupy a silicon area of approximately 0.286 mm 2 while consuming only a few tens of µA. Being compact and low-power, the proposed solution has a strong potential to serve as an additional functional block in next-generation fully integrated NMES stimulators.