A Family of ΔΣ Modulators With High Spur Immunity and Low Folded Nonlinearity Noise When Used in Fractional- Frequency Synthesizers

Phase locked loops for fractional frequency synthesis typically use Digital <inline-formula> <tex-math notation="LaTeX">$\Delta \Sigma $ </tex-math></inline-formula> Modulators (DDSMs) as their divider controllers. Different types and configurations of DDSMs have been presented in the past which have distinctive characteristics in terms of spectral shaping of their quantization errors, spur immunity and implementation costs. This paper presents a family of DDSMs that have provably high spur immunity and low folded noise when used in fractional-<inline-formula> <tex-math notation="LaTeX">${N}$ </tex-math></inline-formula> frequency synthesizers with polynomial nonlinearities.


I. INTRODUCTION
P HASE locked loops (PLL) usually employ digital modulators (DDSM) in order to implement fractional frequency synthesis. The DDSM approximates the fractional part of the frequency multiplication factor by means of a timevarying integer-valued signal. The latter is used to control the instantaneous divide ratio of a multi-modulus divider (MMD) in the feedback path of the synthesizer. The integer approximation that is implemented by the DDSM inevitably introduces a quantization error. The accumulation of this quantization error leads to a time-varying phase error in the system.
The modulator should be designed so that the power spectral density (PSD) of the DDSM-related phase error in fractional-N mode does not degrade the phase noise performance of the synthesizer significantly relative to its integer-N counterpart. Relevant aspects of a modulator are the randomization and the spectral shaping of the quantization error [1]- [4]. In fact, it is desirable that the PSD of the DDSM-related phase error is devoid of idle tones and is high-pass shaped. This latter property is obtained via the design of the noise transfer function of the modulator; it is beneficial because the phase noise introduced by the modulator is subsequently low-pass filtered by the system's closed-loop transfer function. On the other hand, randomization of the quantization error is achieved using techniques that aim to increase the cycle length of the modulator and make it noiselike [5], [6]. Unfortunately, these techniques alone do not prevent the generation of DDSM-related spurious tones and low-frequency noise floor in a nonlinear synthesizer. In fact, the DDSM-related phase error interacts with nonlinearities that are present in the loop and both spurs and folded noise arise [7]- [11]. Many techniques have been developed to linearize the system [12]- [15]. While these attenuate the spurs and the folded noise, they do not eliminate them completely because a residual nonlinearity is inevitably present.
A different approach to improving the fractional spurperformance of charge-pump (CP) PLLs has been pursued by using the Successive Requantizer (SR) [16] and the Probability Modulator Redistributor (PMR) [17], [18]; these modify the statistical properties of the DDSM signal so that the distorted phase error signal does not produce spurs. In the case of the SR, it has been proven that this architecture has an output that is provably spur free when it is distorted by a specific polynomial nonlinearity. In a recent paper, it has been proven that MASH modulators also provide spur immunity for certain polynomial nonlinearities because of the statistical properties of the accumulated quantization error [19]. In particular, the higher the order of the MASH modulator, the higher is the order of the polynomial nonlinearity up to which the modulator is immune from spurs. However, just like the SR, as the order of the MASH DDSM increases, so does the level of folded noise that it introduces [20].
In this paper, we introduce a family of DDSMs, called Enhanced Nonlinearity-induced nOise Performance digital modulators (ENOP-DDSMs) which, like the SR, can achieve immunity to spurs for memoryless polynomial nonlinearities of up to a certain order. The flexibility of the architecture, underpinned by an analytical evaluation of the spurious behavior [21] and folded noise generation [20], allows one to design an ENOP-DDSM that achieves the same level of spur immunity that can be achieved by the best SRs and PMRs, but with a lower folded noise floor. This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/ The paper is organized as follows. In Section II we give some background on the modulation noise introduced by the DDSM, and a method to evaluate the spur immunity. The structure of an ENOP-DDSM is described in detail in Section III, where a number of representative ENOP-DDSM configurations, which combine spur immunity with low folded noise, are presented. In Section IV, the spur immunity of these ENOP-DDSMs is analyzed. These results are confirmed by simulations in Section V. Finally, we draw our conclusions in Section VI.

II. BACKGROUND
By definition, DDSMs coarsely quantize an over-sampled digital input signal. In the case of fractional frequency synthesizers, the ratio of the output frequency to the reference frequency, denoted N div , can be expressed as N int + α, where N int is the integer part of N div and α is the fractional part. The latter, in turn, can be implemented as a ratio X/M, where X and M are, respectively, the integer-valued input word and the modulus of the modulator. The modulator introduces a quantization error, namely e q [n], while approximating the fractional value α with its quantized output y[n], such that: The statistical and spectral properties of the quantization error depend on the type and order of the modulator. Let us consider, for example, the error feedback modulator (EFM) shown in Fig. 1.
The signal e[n] represents the error introduced by the quantizer. In particular, the accumulator-based digital quantizer implements a truncation and provides only integer values at its output. Therefore, the signal e[n] only assumes values in the range (−1, 0]. The expression for the output of a generic single-quantizer DDSM in the Z-domain is given by [22]: where X(z) is the Z-transform of the generic input x[n], E(z) is the Z-transform of e[n] and the functions ST F(z) and N T F(z) are, respectively, the signal and noise transfer functions. In the case of the modulator presented in Fig. 1, x[n] is equal to α and ST F(z) is equal to unity. On the other hand, the N T F(z) is given by: As mentioned before, the error e[n] is high-pass shaped so that the quantization noise is moved out of band to be low pass filtered by the loop. Therefore, H (z) is commonly designed such that the N T F(z) is equal to 1 − z −1 l , where l represents the order of the modulator [4]. Doing so, the Z-transform of e q [n] may be expressed as: Eq. (1) illustrates that e q [n] is the error between the desired frequency ratio and the one implemented instantaneously in the system. Therefore, it represents the frequency error introduced by the modulator. Consequently, the accumulation of e q [n], denoted as e acc [n], contains information related to the phase error introduced into the loop by the DDSM [23]. From (4), the Z-transform of the accumulated quantization error is given by: Its expression in the time domain is given by: Knowing the statistical and spectral characteristics of e acc [n] is fundamental to understanding the effect of the DDSM on the fractional-N frequency synthesizer. If the quantization error is sufficiently well randomized [5], [6], the PSD of e acc is spur-free. Fig. 2 shows a phase-domain model of the synthesizer under consideration. A real PLL inevitably experiences nonlinearities in the loop. For instance, in the case of CP-PLLs, the PFD/CP block typically exhibits a memoryless nonlinearity. 1 The nonlinear PFD/CP has been modelled in Fig. 2 as a cascade of a dimensionless block that takes into account the nonlinearity and offset, followed by a linear PFD/CP. If the system is locked and there are no other sources of noise in the loop, the phase error experienced at the input of the phase frequency detector (PFD) can be expressed as: where 2π N div τ os is a phase offset that is introduced by the system and it is present in addition to the term in e acc . Such a non-zero Fig. 2. Phase-domain model of a PLL [23], whose nonlinear PFD/CP block has been partitioned into a memoryless nonlinearity followed by a linear PFD/CP block.
value of τ os can be caused by the presence of nonlinearities in the system or by offsets that are voluntarily introduced into the loop, such as CP bleed current [25].
From the results in (5) and (7), one may deduce that, when l > 1, the DDSM-related phase noise φ in , which is derived from e acc , is high-pass shaped and, therefore, its low frequency component is suppressed. However, interaction of this phase error with the nonlinearity leads to the generation of extra noise that is manifest as spurious tones and an elevated noise floor [3].
In Fig. 2, we denote by φ N L in [n] the input phase error after distortion by the nonlinearity. Then, the noise generated by the nonlinearity can by studied by analyzing the PSD of φ N L in , denoted by S φ N L in . Let us introduce the nonlinear function N (·), and express φ N L in [n] as a function of e acc [n], namely: where we define: It is worth reiterating that, in a type-II PLL, the value of τ os is such that E e N L acc [n] = 0. In recent work [21], Donnelly and Kennedy have presented a semi-analytical method to predict the spurious behavior of a fractional-N frequency synthesizer once the nonlinearity is specified. This is obtained by calculating the periodic component of the noise generated by the nonlinearity, the so-called Periodic Nonlinearity Noise (PNN). It is pointed out in [21] that, for any n ∈ N, e acc [n] lies on a set of continuous sawtooth tracks, denoted by τ m (t), which are defined as: where t ∈ R and m ∈ Z. Moreover, the samples of the accumulated quantization error are not uniformly distributed over these tracks. Instead, the probability distribution, denoted by P(·), depends on the modulator. Then, the distorted accumulated quantization error, e N L acc [n], lies on a set of distorted tracks which are defined as: Therefore, the locations and the amplitudes of the nonlinearity-induced spurs can be predicted by calculating the Fourier transform of the PNN, which is defined as [21]: The synthesizer does not experience fractional spurs due to N (·) if the PNN is constant and equal to zero. Recently, it has been proven, by means of the PNN, that MASH-based synthesizers exhibit spur immunity for certain polynomial nonlinearities [19]. In the following sections, we will use the PNN and the method developed in [19] to analyze the level of spur immunity of the ENOP-DDSM family for a given order of polynomial nonlinearity N (·).

A. Examples
ENOP-DDSMs are characterized by being able to achieve high spur immunity while simultaneously minimizing the folded noise resulting from nonlinear distortion. An example is given in Fig. 3, where the simulated phase noise performance of both a linear and a nonlinear fractional frequency synthesizer are compared for four different divider controller architectures, namely a MASH 1-1-1, a MASH 1-1-1-1, a second order Successive Requantizer (SR2) and an ENOP-DDSM, in the presence of a cubic nonlinearity. 2 These results have been obtained via closed-loop phasedomain simulations of the CP-PLL model shown in Fig. 2. The transfer function of the loop filter is The model parameters are summarized in Table I. The reference noise and physical divider, VCO, PFD and CP noise are assumed zero. The closed loop bandwidth is approximately 300 kHz.
In the case of a linear synthesizer, shown in Fig. 3(a), the output phase noise is given by the DDSM noise filtered by the closed loop transfer function of the PLL. This condition exposes big differences between the different architectures of modulators. The SR and the ENOP P1 have the larger noise contributions that are quite similar.  Table I for different DDSMs: MASH 1-1-1-1, 3 rdorder spur immune (s.i.) SR2 [26], MASH 1-1-1 and an ENOP-DDSM (P1 of Table IV) and (b) in the case of a third-order nonlinearity N (x) = x + 0.02x 2 + 0.01x 3 . The P1 ENOP (in purple) is both spur-free and exhibits the lowest folded noise floor.
The situation changes substantially when the system is nonlinear. Note that the MASH 1-1-1 (shown in brick red in Fig. 3) has a folded noise floor at −100 dBc/Hz and exhibits a strong fractional spur at ≈ 14.9 kHz (= X M f re f ). Many commercial fractional-N synthesizers use MASH 1-1-1 divider controllers and, therefore, exhibit spurs of this type.
The MASH 1-1-1-1 (in blue) is provably spur free for this nonlinearity and therefore does not exhibit a spur [19]. However, its folded noise floor is at approximately −90 dBc/Hz. The SR2 3 (in yellow) is provably spur free but it too has an elevated noise floor [26]. The ENOP-DDSM (in purple) is also provably spur free, as we will show, and its folded noise contribution at −104 dBc/Hz is the best of the four examples. The performance results are summarized in Table II.  In this example, we have shown that the ENOP P1 has the best noise and spur performance of the architectures considered when the system is nonlinear.
Another example is considered in Fig. 4, where the MASH 1-1-1, MASH 1-1-1-1 and SR2 are compared with another ENOP DDSM variant, denoted by ENOP P5, in the case of a seventh-order nonlinearity. As before, the noise performances are compared first without and then with the nonlinearity. Note that the ENOP P5 has a DDSM noise profile that closely follows that of the MASH 1-1-1 up to 1 MHz in the linear case, as shown in Fig. 4(a). Furthermore, in the presence of the nonlinearity, shown in Fig. 4(b), the ENOP P5 is the only DDSM that does not produce any spur. In fact, as we will show later, the ENOP P5 allows one to achieve spur-free operation in the case of polynomial nonllinearities up to order seven.
While the folded noise generated by the ENOP P5 is larger than that of the MASH 1-1-1, it is considerably lower than the other two solutions. These performance results are summarized in Table III. We will show in the following sections that an ENOP-DDSM can be designed to prioritize spur-immunity, to minimize folded noise or to provide a compromise between the two. This is possible because the DDSM-related noise generated by the nonlinearity can be predicted in advance once information about e acc [n] is known.

B. Architecture
The ENOP-DDSM can be implemented with an EFM structure, as shown in Fig. 1. The governing equation is (2) where the ST F(z) is equal to unity. The N T F(z) of an l th order ENOP-DDSM has the form: where l represents the order of the ENOP-DDSM. According to (3), the desired N T F(z) in (14) can be obtained by  Table I  choosing: With this transfer function, the modulator will produce an accumulated quantization error whose Z-transform is equal to: where E(z) is the Z-transform of the error e[n] generated by the quantizer. One can express e acc [n] as: For the remainder of this work we will assume that every coefficient c i in (14) is integer valued. This is not necessary but it simplifies the implementation. At this point, we list the key parameters that determine the performance of an ENOP-DDSM. These are as follows: • l: the order of the modulator.
• k: the order of low-frequency high-pass shaping of the accumulated quantization error. • r : the half width of the range of the accumulated quantization error. • p: the order of polynomial nonlinearities up to which the accumulated quantization error is immune from spurs. • σ 2 e acc : the variance of the accumulated quantization error. Some of these parameters (k, r , σ 2 e acc ) are illustrated schematically in Fig. 5.
The order of the modulator, l, sets the number of coefficients c i which, in turn, determine the signal e acc generated by the modulator. Therefore, the value of l determines the number of degrees of freedom available when designing the ENOP-DDSM which is, in principle, (l − 1). The larger is l the greater is the number of delay elements (registers) that are needed for implementing the block H (z) in (15). Consequently, a larger l comes with a higher hardware cost.
As pointed out previously, it is important to high-pass shape the PSD of e acc so that the low-frequency component of the modulation-related phase noise is suppressed. The order of high-pass shaping at low frequencies, k, is determined by the number of solutions of E acc (z) = 0 at z = 1. As a consequence, the value of k sets constraints on the values that can be assumed by c i . In other words, the number of degrees of freedom for designing the modulator decreases to (l − 1 − k). This means that, for a given l, the greater is k the less room will be left for designing the modulator so that other performance characteristics are met.
In the frequency synthesizer application, the value of k has to be greater than or equal to one. When more aggressive high-pass shaping is demanded, for example when a wide synthesizer bandwidth is required and/or a low reference frequency is employed, the choice of k = 2 is suitable. Higher values for k would require a more aggressive roll-off of the loop filter in the synthesizer to suppress the resulting high-frequency noise component.

C. Spur Immunity
One of the most important parameters of the ENOP-DDSM is p; this determines the level of spur immunity of the modulator. Since the modulator has to be designed such that k ≥ 1, the coefficients c i are chosen so that: Therefore, the signal e acc has a range that is symmetric about zero. In particular, we introduce the parameter r , which is the smallest integer such that: Moreover, since e[n] ∈ (−1, 0], from (17), (18) and the definition of r , one can show that: Familier and Galton have proven that the maximum attainable order p of spurious tone immunity for polynomial nonlinearities is (2r − 1) and that there exist quantizers which are immune to spurs up to order (2r − 1) [27], [28]. 4 This implies that the optimal property with respect to spur immunity in the presence of a polynomial nonlinearity is given by: It is interesting to note that the optimal condition for spur immunity can be obtained only for odd values of p.

D. Folded Noise
The result in (21) suggests that e acc must have a larger range in order to achieve spur immunity to higher order polynomial nonlinearities. However, a wider range for the accumulated quantization error would lead to stronger interaction with the nonlinearity and, qualitatively, a higher level of folded noise. The level of the noise floor can be predicted using methods such as those presented in [11], [20] and [29]. For the sake of simplicity, in this paper we will estimate the severity of the generated folded noise with σ 2 e acc , the variance of the accumulated quantization error. In fact, it has been reported that the level of the in-band folded noise floor scales qualitatively with σ 2 e acc [11]. 5 Therefore, the value of σ 2 e acc provides a rough estimate of the folded noise performance of a modulator.
If we assume that e[n] is a uniform independent and identically distributed (i.i.d.) stochastic process then, considering (17) and (18), the variance of e acc becomes: This assumption about e[n] is only an approximation; however, it allows one to obtain an accurate estimate of the statistical properties of e acc [20]. We will use this assumption later in the paper for evaluating the probability distribution of e acc .
Eq. (22) shows that, in order to minimize the variance of e acc , each non-zero integer coefficient c i has to have an absolute value equal to one. This, according to the expressions (20) and (22), gives: σ 2 e acc ,min = r 6 (23) 4 It is worth remarking that we use a different nomenclature compared to [27], [28]. The accumulated quantization error e acc , its single-sided range r and the order of spur immunity p are denoted in those works by, respectively, t[n], N t and h t . Therefore, for a given N t , the maximum value of h t is expressed as (2N t − 1). 5 It is important to remark that the folded noise level is not a bijective function of σ 2 eacc . The former depends also on the spectrum of e acc . In summary, for a given value of r , the maximum achievable order of spur immunity is equal to (2r − 1). Moreover, once r is fixed, the minimum value of σ 2 e acc with integer coefficients is equal to r/6 and this is obtained when all the non-zero coefficients c i have magnitudes equal to one. Table IV shows simulation results for seven sample ENOP-DDSMs with r = 2, 3, 4 and 5. The corresponding values of σ 2 e acc are 1/3, 1/2, 2/3 and 5/6, respectively. We will next show that these architectures are also optimal in the sense that they achieve p = p opt .

IV. ANALYSIS OF SPUR IMMUNITY VIA SYMBOLIC CALCULATION OF PNN
In this section we analyze the spur immunity for the ENOP-DDSMs proposed in Table IV by using the PNN. Then, we confirm the properties of spur immunity through behavioral simulations of the nonlinear frequency synthesizer. As previously presented, the PNN represents a valuable tool to determine the immunity from spurs of a given modulator. In fact, if the PNN is constant and equal to zero, the system does not experience spurs [19]. From the work presented in [21], the PNN (defined by (12)) can be evaluated for a given modulator and nonlinearity once the probability distribution function of e acc , denoted by P(·), is known. The latter can be predicted if we make the assumption that e[n] is a uniform and i.i.d. stochastic process [30], [31]; further details are provided in Appendix A.
We know that the hypothesis made about e[n] is not strictly true; nevertheless, under typical conditions it leads to accurate predictions for P(·). For example, let us consider the case of a P1 ENOP-DDSM. Following the procedure presented in Appendix A, one can evaluate the probability distribution function of e acc from (31), obtaining: The predicted probability distribution is compared to simulation results in Fig. 6. Notice that the simulated distribution P(e acc ) closely matches the analytical prediction. This confirms the validity of the approximation made about e acc . The predictions of P(e acc ) for the other architectures of ENOP-DDSMs presented in Table IV are provided in Appendix A.
Equation (24) allows one to evaluate the PNN for the P1 architecture once the nonlinearity is specified. In particular, let us consider the case of P1 interacting with a generic third order polynomial nonlinearity, expressed as N (x) = 3 i=0 a i x i . From the definitions in (10)- (12), and considering the expression of the predicted P(·) (24), one can show that: which is independent of n and is therefore constant. Moreover, because of the locking condition of a type-II PLL, τ os is valued so that E [P N N [n]] = 0. Therefore, the PNN expressed in (25) is equal to zero, which means that the system does not experience fractional spurs in the case of polynomial nonlinearities up to the third order 6 when a P1 ENOP-DDSM is used. This confirms that the level of spur immunity p for the P1 ENOP-DDSM equals the optimal value p opt shown in Table IV. Repeating a similar PNN analysis for the other proposed architectures yields the characteristics of spur immunity listed in Table IV, as shown in Appendix B.
In each case, the P1-P7 ENOP-DDSMs achieve a level of spur immunity equal to p opt and are optimal in the sense of Familier and Galton [28]. Concluding, the architectures listed in Table IV match the condition of best spur immunity and the lowest folded noise. In fact, they are both p-optimal and exhibit minimal σ 2 e acc .

V. VALIDATION BY BEHAVIORAL SIMULATION OF PLL
In this section we validate the performance of representative ENOP-DDSMs in the frequency synthesizer application through behavioral simulations of a nonlinear charge pump (CP) PLL where the divider controller is implemented with the NTFs listed in Table IV. The simulations were performed using a phase domain closed-loop model implemented in MATLAB [23]. The parameters of the simulated system are listed in Table I. The physical noise of the VCO, PFD and CP, as well as the reference noise are assumed zero. In the simulations we assume zero reference noise and physical divider, VCO, PFD and CP noise. This does not represent what happens in a real circuit; however, it allows one to visualize better in isolation the effects of the interaction between the quantization noise and the nonlinearity, the socalled "mathematical noise", for the different cases of ENOP-DDSMs. Furthermore, first-order shaped LSB dither is applied to the modulator to ensure that the quantization error is sufficiently randomized [5], while an odd value for the input X is chosen to mitigate against possible horn spurs [32]. 7

A. Third-Order Polynomial
We first consider the case where the synthesizer exhibits a third-order polynomial nonlinearity. The results of the simulations are shown in Fig. 7. Different values of X have been used for the DDSMs so that their spurs (if any) do not overlap in the figures.
With a MASH 1-1-1 DDSM, a fixed integer boundary spur would be expected at X M f re f ≈ 14.9 kHz. From Table IV, all of the listed ENOP-DDSMs are expected to provide spur immunity in the presence of third-order nonlinearities. This is confirmed by the simulations. Note that no spurs are present in any of the ENOP-DDSMs.
It is worth noticing also that the level of folded noise varies between the different modulators. This is to be expected, since σ 2 e acc varies as well. In fact, as discussed in Section III, the folded noise floor scales with σ 2 e acc . Therefore, we expect that two different modulators that share the same value of  σ 2 e acc should generate similar levels of folded noise. Moreover, the latter increases as σ 2 e acc gets bigger. This is confirmed in Fig. 7, where P1, which has σ 2 e acc = 1/3, contributes the lowest excess noise, while P6 and P7, which have σ 2 e acc = 5/6, have the highest.

B. Fifth-Order Polynomial
Next, we consider the case where the nonlinearity is a fifthorder polynomial. From the analysis in Section III, we predict spurious tones for the P1 ENOP-DDSM and spur immunity in the other cases. This is confirmed by the simulation results in Fig. 8. In particular, note the integer boundary spur at ≈ 14.9 kHz in Fig. 8.
Similar considerations to the previous case can be made for the folded noise: P1 is the best while P6 and P7 are the worst.

C. Seventh-Order Polynomial
Lastly, we consider the case of a seventh-order polynomial nonlinearity. This example confirms that P4, P5, P6 and P7 ENOP-DDSMs are spur immune up to seventh-order polynomial nonlinearities. This is shown in Fig. 9. Notice that the cases of P1, P2 and P3 exhibit spurs since their p is less than 7. Note also that the level of the folded noise grows as the variance of e acc increases.
It should be clear at this point that the ENOP-DDSMs can provide different trade-offs between the order of spur rejection and the in-band noise floor, depending on the choice of NTF. Empirically, the higher is the spur immunity, the larger will be the folded noise. It follows that, depending on the performance one wishes to prioritize, one NTF might suit better than the others.

VI. CONCLUSION
In this paper, we have presented a family of modulators which can be designed to be optimal in the sense of Familier and Galton in terms of spurious tone immunity for polynomial nonlinearities. An analytical method has been presented to predict both the level of spur immunity and the folded noise floor. The predictions have been confirmed by simulation. The results show the potential of ENOP-DDSMs to match the state of the art performance in terms of spur immunity. Moreover, with the same level of spur immunity, ENOP-DDSMs have a lower hardware complexity and can outperform the prior art in terms of folded noise.

APPENDIX A PREDICTION OF e acc PROBABILITY DISTRIBUTION
In previous publications [19], [21], it has been shown that the spurious behavior resulting from the interaction between the quantization error and system nonlinearities can be predicted by the PNN. Evaluation of the PNN requires knowledge of the probability distribution function of the accumulated quantization error, denoted by P(·). In a recent paper, this function has been derived empirically for some MASH modulators [19]. In this appendix, we provide a method to predict P(·) for a generic ENOP-DDSM, under the hypothesis that e[n] is an independent and identically uniformly distributed U(−1, 0) stochastic process.
In [30], the author evaluates the probability distribution of a multivariate random function by applying the variable transformation theorem [31]. In particular, consider a random variable Y which is a function of k independent random variables with arbitrary probability distributions: considering that such a function can be expressed explicitly in terms of any of the independent variables (i.e. X 1 ), so that: with n 1 possible solutions. Then, the probability density function of Y is [30]: It is clear that the function in (29) Furthermore, let us remember that each e j is valued only in the range (−1, 0]. Then, similarly to (28), we can evaluate the probability density function of e acc as: This function is also denoted in the paper by P(·). 8 The evaluation of the probability distribution of e acc for the architecture P1 is already discussed in Section IV. Following the same procedure for architectures P2 and P3, one would obtain that the predicted P(·) is given by: Similarly, the pairs of architectures P4 and P5 also share a common P(·) which is expressed in (33), as shown at the top of the next page. Finally, the probability distribution of e acc ,  for cases P6 and P7 is given in (34), as shown at the top of the next page. The predicted probability distributions shown in (32)-(34) are compared to simulation results in Figs. 10, 11 and 12, respectively. Notice that all the simulated distributions P(e acc ) closely match the predictions, confirming the validity of the approximation made about e acc .

APPENDIX B EVALUATION OF p FOR REPRESENTATIVE ENOP-DDSM ARCHITECTURES
In Section IV, we discussed the possibility of predicting the spur immunity of a DDSM for a given nonlinearity, through the evaluation of the PNN. Moreover, we have analyzed and proven the level of spur immunity p listed in Table IV for the case of P1. In this Appendix, we extend the analysis to the other architectures of ENOP-DDSMs presented in Table IV.
Let us consider first the P2 and P3 ENOP-DDSM architectures. The PNN can be evaluated from the definitions in (10)-(12) and the expression for the predicted P(·) given in (24). If we assume a generic fifth-order nonlinearity expressed as The resulting PNN is independent of n. As discussed in Section IV, this means that the system does not experience fractional spurs and, therefore, the P2 and P3 ENOP-DDSMs provide a level of spur immunity p equal to 5, as anticipated in Table IV. Then, we analyze the cases of P4 and P5 architectures. They share the same probability distribution function for e acc , which is given in (33). Following the same procedure for evaluating the PNN and considering a seventh-order nonlinearity, N (x) = 7 i=0 a i x i , one finds that:

P N N[n]
= a 0 + a 1 τ os + a 2 which is again independent of n. This result confirms that P4 and P5 architectures achieve p = 7. Lastly, we consider the cases of P6 and P7 ENOP-DDSMs. In Table IV, we stated that these architectures achieve spur immunity to polynomials up to ninth order. To prove this, let us consider a nonlinearity N (x) = 9 i=0 a i x i . Then, we evaluate the PNN using the expression of P(·) given in (34). Doing so, one obtains:

P N N[n]
= a 0 + a 1 τ os + a 2 This shows that the PNN is constant and confirms that architectures P6 and P7 are immune from spurious tones in the case of polynomial nonlinearities with order up to nine. It should be clear that the method can be extended to higher orders albeit with more terms in the expressions for P(x) and P N N[n].