A 4 × 4 Biosensor Array With a 42-μW/Channel Multiplexed Current Sensitive Front-End Featuring 137-dB DR and Zeptomolar Sensitivity

This article presents a multiplexed current sensitive readout for label-free zeptomolar-sensitive detectors realized with large-area electrolyte-gated organic thin-film transistors (EGOFETs). These highly capacitive biosensors are multiplexed using an organic thin-film transistor (OTFT) line driver and OTFT switches and interfaced to a 65-nm Si CMOS, low-power, pA-sensitive front-end. The Si chip performs analog-to-digital conversion and data transmission to a microcontroller too. A current domain interface is used to transmit the signals coming from multiple biosensors to the 1.2-V supply CMOS Si-IC via the 30-V supply OTFT electronics. Exploiting an analog module implemented in the Si-IC, the EGOFETs are precisely biased, even in the presence of a large OTFT multiplexer resistance. The CMOS current sensitive front-end achieves a dynamic range (DR) of 137 dB and a power consumption of 42- $\mu \text{W}$ per channel reaching a state-of-the-art DR-power-bandwidth FOM of 208 dB. The front-end has been designed with a first-stage programmable-gain, active-feedback transimpedance amplifier topology that, contrary to common current-sensitive front-end solutions, is not affected by the sensor capacitance. The system has been validated with different concentrations of human IgG and IgM proteins using both a single sensor and a 4 $\times $ 4 array of EGOFETs. Thanks to the multiplexing strategy and the low costs of its modules, the system here presented has the potential to enable widespread use of precision diagnostic with extreme sensitivity even in point-of-care and low-resource settings.

sensitivity reaching the single molecule (i.e., zeptomolar level, zM) [2], enabling applications that cannot be realized with standard biosensing assays [3]. For instance, it has been reported that at these small concentrations, the presence of particular biomarkers can reveal the early stage of, e.g., cancer or viral infections [4], [5]. Moreover, in the COVID-19 pandemic, these sensors have been proven useful for the fast screening of unprocessed clinical nasopharyngeal swab and saliva samples [1].
The reason why electrolyte-based biosensors outperform other solid-state technologies lies in the highly capacitive electrical double layers that form at the gate-electrolyte or electrolyte-organic semiconductor interfaces [2]. Indeed, a substantial variation of the EGOFET output current due to the double layer charge rearrangement can be recorded after just a few bindings occur on its biofunctionalized gate [2], [5], [6]. Thanks to their extreme sensitivity and low cost [3] EGOFETs, together with a large variety of OECTs, are attractive candidates to enable a widespread use of precision diagnostic, even in point-of-care and low-resource settings [6]. To make this vision possible, a multiplexed array of sensors would be particularly attractive, as it would further decrease the cost per assay, increase the number of different biomarkers that can be assessed in one procedure, and boost the throughput in clinical environments [3], assessing several patients at a time. In this work, we propose a multiplexed biosensing system that combines three different technologies, namely, ultrasensitive and highly specific EGOFET biosensors, organic thin-film transistors (OTFTs) to realize the sensor matrix multiplexing, and silicon electronics for sensor readout [ Fig. 1(a)]. OTFTs have been chosen to implement the multiplexing instead of other TFT technologies, such as a-IGZO and LTPS, as they can enable facile monolithic integration with the EGOFETs in the future. Besides, the electric performance of OTFTs is sufficient for the multiplexing electronics implemented in this system. The Si CMOS IC is chosen for the readout due to its high precision and speed, which enable the processing of all data coming from the biosensor matrix.
Since the EGOFET typical measurement procedure consists of tracing its full I D − V GS transfer characteristic, a high current dynamic range (DR) readout is needed for this purpose [2]. Indeed, EGOFETs respond to the presence of the target molecule with a threshold shift, which is detected by registering the transfer curve before and after exposure to the analyte. An additional challenge that EGOFETs pose to their interface electronics resides in the nF-range capacitance that they exhibit at their terminals, which negatively impacts the stability of most current sensitive front-ends [7]. A high DR and capacitance-insensitive current input front-end is thus needed to interface the EGOFET. A transimpedance amplifier (TIA) has been chosen as front-end first stage to precisely set the EGOFET biasing point and translate its output current into the voltage domain. After this stage, an oversampled analog-to-digital converter (ADC) performs the data conversion and sends the recordings to a base station [ Fig. 1(a)]. The current sensitive front-end together with the ADC has been manufactured in CMOS 65-nm technology.
As reported in [7], most TIA topologies suffer of instability with a sensor capacitance of just some tens of pF, while the EGOFETs capacitance can be thousand times higher [8]. Moreover, in conventional TIAs, the circuit stability is closely tied to the maximum tolerated input capacitance, the transimpedance gain (and thus to the input-referred noise), and the signal bandwidth. This means that setting the biosensor capacitance, increasing the transimpedance gain to read lower input currents will inevitably jeopardize bandwidth or stability [7]. In this work, we present an active feedback programmable gain TIA (AFPG-TIA) which is unconditionally stable for any sensor capacitance, and that successfully disentangles the transimpedance gain from the signal bandwidth. The AFPG-TIA has been interfaced to a multiplexed system composed of a 4 × 4 EGOFET matrix and an OTFT activematrix time-division multiplexer that connects the biosensors to the Si-IC [ Fig. 1(a)].
Using an OTFT multiplexer comes with some electric challenges, as its supply voltage exceeds by far both the EGOFET array and the CMOS Si-IC one. Additionally, due to the limited semiconductor mobility compared to standard silicon technologies [9], one must carefully consider the parasitic effects of OTFT switches.
This article is further organized as follows. In Section II, we provide a short discussion of the EGOFET technology. In Section III, an overview of current-input front-end topologies is reported, highlighting their advantages and disadvantages. Section IV shows the system architecture and describes in detail the interfaces between the different modules, which influence the design of both the OTFT multiplexer and the CMOS front-end. The topologies used for the OTFT and CMOS circuits are presented in Section V. The OTFT multiplexing electronics and the current sensitive front-end measurements are reported in Section VI, together with suitable benchmarking. The experimental characterization of the CMOS front-end interfaced to a single EGOFET and to a 4 × 4 biosensor array is reported in Section VII. In this section, the system limit of detection (LoD) has been extracted too. Finally, in Section VIII, the main advancements achieved in this work are discussed.

II. EGOFET BIOSENSOR
The EGOFET manufacturing process starts with a 125-μm thick poly(ethylene 2,6-naphthalate) (PEN) substrate on which gold 50-nm thick interdigitated structures creating the EGOFET source and drain are fabricated by means of a lift-off photolithographic process. Poly(3-hexylthiophene) (P3HT) organic semiconductor (OSC), serving as active material, is inkjet printed on the gold interdigitated structure [ Fig. 1(b)]. A film of biocompatible insulator (SU8-TF6001 MicroChem, not shown in the picture) is inkjet printed on top of the gold traces to isolate them from the electrolyte. The sample is then annealed for 10 h at a temperature of 130 • C [10]. After this step, a bottomless well is attached on top of the substrate to enable pure water to submerge the channel. A gold contact (Top-Gate), mounted on a different substrate, bio-functionalized with suitable receptors and incubated in different target solutions containing the analytes, is put in contact with the water completing the EGOFET biosensor [ Fig. 1(b)]. Compared to a standard TFT stack, the submerged gold contact and pure water will form, respectively, the transistor gate and its gate insulator.
During the first hours after manufacturing, the EGOFET shows a limited stability and an I ON /I OFF ≤ 500. More suitable working conditions with I ON /I OFF ∼ = 1000 together with stable I ON and I OFF can be reached after 24 h in water [10]. In terms of performance, after at least 24 h of stabilization, these devices typically reach output currents of several μA at 0.6 V of V SG . Compared to standard OTFTs, which have limited mobility and may require tens of volts to reach this drain current level [9] here, the extremely high gate-to-channel capacitance increase significantly the transconductance. The EGOFETs used for this work feature an active area of 5 · 10 −4 cm 2 and an average gate to source/drain capacitance up to 100 nF at maximum V SG . These values are also common in OECTs where, depending on the electrolyte ion concentration and the channel semiconductor, the involved capacitances can reach values up to 9 mF/cm 2 . This is orders of magnitude higher than what is achieved in CMOS with high-k dielectrics [11]. The extreme transconductance caused by the gate-to-channel capacitance, makes these transistors a perfect choice for sensing applications, where a large change in the output current for a small input variation is desired. As an example, in EGOFETs, a change in the gate-channel electric field due to the binding of analyte molecules on the receptors attached to the gate, results in a large change of the channel current, reaching lower limits of detection when these devices are operated as biosensors [12].

III. TIA TOPOLOGIES
All biosensors presented in the previous section are typically measured using bench-top equipment (i.e., semiconductor parameter analyzers or source meters). These bulky lab instruments are used as current meters for their high DR and stability against any device capacitance. Indeed, most of the standard current sensitive analog interfaces suffer of instability when connected to a highly capacitive node [7], thus specific hardware is needed for this purpose.
In the hypothesis of a standard acquisition system in which a voltage-domain ADC ends the analog conditioning chain, the sensor output current must be translated to a voltage before conversion. This translation is performed by a TIA that, in order to minimize the front-end noise, is placed as the first element of the conditioning chain. Being directly interfaced with the sensor output, the TIA is the only component of the front end affected by the sensor capacitance. The main topologies used to convert the incoming current into a voltage, together with the one proposed in this work, are reported in Fig. 2. Here, the sensor is represented as a current source I IN in parallel with its parasitic capacitance C IN . The parallel parasitic resistance R IN is neglected for the sake of simplicity.
As shown in Fig. 2(a), the first and simplest solution that can be used to read a current is measuring the voltage drop on a calibrated resistor with an instrumentation amplifier (IA). The main drawback of this approach resides in the difficulty to precisely control the sensor biasing point, since the amplifier input node voltage depends both on R S and I IN . This will result in a signal-dependent error that increases with R S . Additional circuitry is needed to solve this issue and stabilize the input node bias.
The shunt-feedback TIA [ Fig. 2(b)] represents a valid solution to this issue since in this topology the input voltage is fixed by the feedback, and it can be chosen by changing the amplifier V REF . However, as reported in [7], this topology requires a compensation capacitance C F ≥ C IN to prevent instability caused by the pole R F − C IN . Unfortunately, the parallel R F − C F generates a pole in the signal transfer function, such that increasing C F for better stability and/or increasing R F for higher gain and lower input-referred noise, will affect the maximum achievable signal bandwidth. Choosing C F similar to the typical EGOFET capacitance of 100 nF and R F = 20 M (a value that is typically required for continuous-time pA sensitive front-ends in CMOS) would lead to a signal bandwidth of only 0.08 Hz and to a solution that cannot be integrated on chip.
An alternative to this approach is the regulated cascode TIA represented in Fig. 2(c), where the feedback resistor has been replaced by an active network including a MOSFET. Compared to the previous one, this topology disentangles the transimpedance gain from the signal bandwidth being the first proportional to R D and the latter dependent on the effective impedance at the input node. This is a valid approach to get a very small input impedance, very high bandwidth at very low power consumption [20]. Unfortunately, this circuit is functional only until M 1 is in saturation regime. Thus, one should make a compromise between the TIA output swing and its input-referred noise (which is inversely proportional to R D ).
A third alternative, inherently stable and with the signal bandwidth not affected by the input capacitance, is proposed in [21] and shown in Fig. 2(d). This topology has two main advantages: 1) the gain definition network (C 1 and C 2 ) contributes no noise and 2) the capacitance seen at the input node to ground lowers the dc loop gain rather than degrading the stability [21]. In contrast to the other topologies, this circuit cannot handle dc currents, thus an additional current source I SER = −I IN is needed. A current servo loop could set the input node dc voltage and operate this current source, but its noise will be directly injected into the input, worsening the overall noise performance.
Finally, the AFPG-TIA proposed in this work is inspired by the topology reported in [22] and depicted in Fig. 2(e). Similar to the other circuits represented, in our TIA, the amplifier A 1 works as the main gain stage. As done for the TIA in Fig. 2(c), here the feedback resistor has been replaced by an active circuit that successfully isolates the sensor load effect at the input from the amplifier gain and bandwidth. The inner loop composed of A 2 , R A , M 1 , and M 2 works as transconductor and drains a current from the input proportional to V OUT . Thanks to the current multiplier realized with A 2 , M 1 , and M 2 , it can be demonstrated that the baseband transimpedance gain of this proposed TIA is equal to where gm M1   can be matched in layout to improve the TIA robustness to mismatch and process corners.
In terms of signal bandwidth, it can be demonstrated that the active feedback network also improves the circuit response by decreasing the impedance at the input node (associated with the AFPG-TIA dominant pole). The time constant τ IN related to this pole is shown in (2), where θ i (3) is the TIA return ratio (obtained opening the TIA loop before the input of A 1 , connecting an ideal voltage source at the input of A 1 , and calculating its ratio to the voltage returned from the feedback) and R IN represents the sensor parasitic resistance, which is not explicitly shown in Fig. 2 (2) In (2) the term 1/(θ i · gm M2 ) represents the TIA input resistance: one can increase the return ratio θ i to reduce it and further isolate the TIA performance from the sensor loading effects. An additional degree of freedom is offered by the possibility to change τ IN by means of gm M2 , making this amplifier easily adaptable to higher bandwidths when needed.
In order to ensure stability, A 1 and A 2 should be designed with sufficient bandwidth to make sure that the pole associated with τ IN is dominant in the open-loop transfer function and provides a large enough phase margin. In this way, even with a larger input capacitance, the effect would be just a decrease in the signal bandwidth without impacting the TIA stability. A small capacitance can be added to the TIA input to ensure stability even when the sensor is not connected. Moreover, the left half-plane zero introduced by R A − C A can be used to efficiently compensate one of the low-frequency poles in A 1 and A 2 .
Compared to the work presented in [22], instead of using two signal paths to increase the TIA bandwidth, it has been decided here to optimize the loop structure and push the poles of the amplifiers at high frequency. As a direct consequence of this approach, the input pole becomes dominant. The advantage is that the TIA will have no stability issue for larger input capacitances, but its bandwidth will change with a varying input capacitance C IN [ Fig. 3 and (2)]. As a 180 • phase shift is induced by A 2 , the additional inverting stage used in [22] can be omitted, increasing the TIA power efficiency.
Following the same methodology described in [22], one can find the TIA input-referred noise power spectral density to be where i 2 M2 is the current noise of M 2 , e 2 n,i is the input equivalent noise voltage source of A 1 , k is the Boltzmann constant, and T is the temperature expressed in Kelvin.
In terms of noise, at the sufficiently high frequency where the MOSFET 1/f noise contributes are negligible, the proposed topology can outperform the shunt-feedback TIA [ Fig. 2(b)] being the R A noise injected at the output of the stage reduced by a factor K F 2 when referred to the input (4).
Thanks to the current multiplier in the feedback network, the proposed topology has been used to design a programmable gain TIA in which the feedback transimpedance is changed simply by increasing or decreasing the M 1 and M 2 multipliers and thus K F . Moreover, since these two MOSFETs are diode-connected, they are always in saturation and thus, compared to the regulated cascode TIA of Fig. 2(c), the proposed AFPG-TIA does not suffer of limited output voltage swing. These properties, together with the limited area occupation, enabled by the current multiplier used as resistance multiplier in (1), make the proposed AFPG-TIA an excellent solution for high-DR integrated current sensitive front-ends.

IV. SYSTEM ARCHITECTURE
Exploiting the integrability of the proposed TIA, a multiplexed frontend to address and readout a 4 × 4 EGOFET array is proposed here. As shown in Fig. 4 and discussed briefly in the introduction, the system is composed of three main modules: 1) a 4 × 4 EGOFET biosensor array [ Fig. 4(a)]; 2) the OTFT multiplexing electronics; and 3) the Si chip where four current sensitive front-ends interface the biosensors. The front ends are also multiplexed to a single ADC for conversion to the digital domain. The measurement protocol as well as the synchronization between the system modules is performed at high level by a microcontroller that can control the OTFT electronics, acquire the data coming from the Si-IC and send them to a personal computer. Two level shifters are added to ensure translation between the different voltage domains in the system [ Fig. 4

A. 4 × 4 EGOFET ARRAY
As done for the single EGOFET, the biosensor matrix is fabricated on a 125-μm thick polyethylene naphthalate foil where P3HT is printed between the gold source and drain contacts defined by lithography, to create a TFT channel. A 4 × 4 bottom-less ELISA plate [23] is attached on top of this substrate to enable pure water to submerge every single EGOFET. A matrix of top gates on a different substrate is put in contact with the water completing the biosensing matrix. For the fluidic wells, the geometric dimensions are chosen to be the same as the ELISA plates [23], commonly used to detect and quantify various biomolecules exploiting a suitable enzyme-controlled reaction that leads to a color change. The final system will thus resemble the well-known ELISA plate but provides a digital (instead of colorimetric) readout and greatly enhanced sensitivity. Inside the array, the EGOFET source contact is shared among all the sensors in a row while each drain is individual and accessible through a 36-pad connector. Each EGOFET also includes a lateral gate on the same substrate as source/drain [ Fig. 4(a)]. This additional gate can be used, e.g., at the beginning of a sensing experiment or during the incubation phase when the top gates are removed from the wells, to check that all the EGOFETs reached their stability condition. Similar to what happens for the drain, all lateral gates are accessible through the EGOFET array connector, which thus counts 16 drains, 16 lateral gates, and 4 source pads. The drains are connected to the Si-IC via the OTFT multiplexing electronics, while the sources are directly interfaced to the current sensitive front-end in the chip [ Fig. 4(b)].

B. OTFT MULTIPLEXING ELECTRONICS
In the OTFT multiplexing electronics, a switch matrix in series with the EGOFET drains is driven by a 4-stage shift register [ Fig. 4(b)]. The columns of the biosensor array are enabled one by one by the shift register, allowing the current from the sensors in that column to flow to the Si-IC, while keeping all other sensors in high impedance.
Due to the low-cost production processes typical of EGOFETs and OTFTs, the final system cost will be inevitably dominated by the Si-IC. The proposed OTFT multiplexing approach has thus the potential to lower system cost by reducing the number of interconnections and parallel front-ends needed on the Si-IC, minimizing its area. The OTFT multiplexing also adds additional value to the system since the OTFT electronics and the EGOFET array manufacturing processes are compatible and could be integrated on the same substrate in the future, further reducing costs and system complexity.
Unfortunately, the use of OTFT electronics comes with some drawbacks. First, due to its low mobility (in the order of 1 − 10 cm 2 /Vs) and thick dielectric layers [9], OTFT electronics must be operated at 30-V supply, making the interface with the EGOFET array and the Si-IC susceptible to over-voltages. In the proposed system, this issue has been resolved by creating two isolated voltage domains. Fig. 4(c) shows a simplified version of the interconnection between an EGOFET and the AFPG-TIA via the OTFT electronics. From this picture, it is clear that although the multiplexing electronics is supplied at a much higher voltage compared to any other component of the system, the thick-gate dielectric of the series switch that connects the EGOFET drain to its bias voltage isolates the high voltage from any sensitive device. Moreover, in the proposed current-domain interface, the voltage operating point for the EGOFET and Si-IC is always set by the latter, and it is thus precisely controlled. A second drawback in the use of OTFTs as multiplexing electronics is the high on-resistance of its switches. Fig. 4(c) also shows an additional analog module called voltage drop compensation amplifier (VDCA), which is implemented on the Si-IC and solves this issue by dynamically changing the OTFT series switch drain voltage to precisely control the EGOFET bias point [24]. This module requires only two extra pads on the Si-IC per sensor matrix row, making the multiplexing still advantageous in terms of the number of interconnects compared to the direct readout of all individual sensors.

C. CMOS SI-IC
The last element of the system is the CMOS Si-IC, which performs both the biasing and the front-end functions for the biosensor array. As shown in Fig. 4(b), the Si-IC consists of three different modules: 1) the VDCA to properly bias the EGOFETs drains; 2) a digital-to-analog converter (DAC) to supply the voltage to both lateral and top gates; and 3) the high DR current sensitive front-end discussed in Section III. In the front-end, an anti-aliasing filter follows each of the four AFPG-TIAs on chip and its output is provided to an oversampled 12-bit ADC via an analog multiplexer.

V. CIRCUIT IMPLEMENTATION
In this section, the circuit implementation of the different modules is described. The same order of Section IV is followed, starting from the OTFT multiplexing electronics and ending with the CMOS Si-IC.

A. OTFT MULTIPLEXING ELECTRONICS
The OTFT multiplexing electronics [ Fig. 4(b)] contains three main submodules: 1) a 4-stages shift register; 2) a series switch matrix driven by the shift register; and 3) a sensing switch matrix to monitor the biosensor array drains biasing point [ Fig. 4(c)]. Being the yield of OTFT electronics limited compared to Si CMOS processes [25], the shift register has been designed keeping the number of transistors per stage at a minimum. A transmission-gate-based topology [25] with an output stage optimized for high capacitive loads has been chosen for the latch [ Fig. 5(a)]. Due to the slow switching frequency requirement for the OTFT electronics (the column-enable time is equal to the time needed to measure a full EGOFET transfer characteristic), the D-type latch was designed with transistors that are large enough to drive directly the OTFT switch matrix. Using this approach, we designed a flip-flop using only 12 transistors. As depicted in Fig. 5(a), the proposed shift register is connected to a switch matrix made with four groups of four OTFTs having an aspect ratio of 50 000/10 μm. These transistors are directly connected to the biosensor array drains [ Fig. 4(b)]. The switch aspect ratio has been chosen as a compromise between the OTFT leakage current, on-resistance, and hard fault chance. In the considered OTFT technology, the multiplexer switch has a leakage of about 100 pA and an expected on-resistance of 5 k . These values have been estimated simulating a 50 000/10-μm TFT. A process design kit whose paraments have been extracted from recently measured test structures was used for this simulation. An on-resistance this large, together with an EGOFET current of 10 μA, generates a voltage drop on the OTFT of about 50 mV leading to an error in the current reading higher than 15% [ Fig. 5(b)]. For this reason, as shown already in Fig. 4(c), each series switch shares its source with another smaller OTFT used to monitor the voltage at the biosensors drain node. Together with the VDCA, this switch creates the voltage drop compensation network (VDCN) that corrects the EGOFET biasing error.

B. CMOS SI-IC
As shown in Fig. 4(b), the CMOS Si-IC is composed of three different modules: 1) the VDCA introduced in the previous section; 2) a DAC used to bias the EGOFETs gates; and 3) the multiplexed current sensitive front-end. The VDCA has been implemented in order to guarantee an error of less than 1 mV on the EGOFET drain voltage at a current of 10 μA. A Lee load class-A OTA with enough gain and swing has been designed for this purpose [ Fig. 6(a)]. Typically, the Lee load is implemented without degeneration resistors and the sources of Q 1 − Q 4 are connected to the ground. This structure improves the gain of a simple differential pair with diode load by a factor (1 − α) −1 , being α = gm Q3 /gm Q1 = gm Q2 /gm Q4 < 1. Choosing α just below 1, the improvement can be noticeable. A classic way to achieve this is to design, e.g., W/L Q3 = 0.9 W/L Q1 . However, the transistors Q 1 − Q 4 must have a large area, to ensure sufficiently low 1/f noise. Besides, in order to ensure an accurate ratio W/L Q3 = 0.9W/L Q1 , a suitable common centroid layout must be implemented. These two goals can be only achieved using a chip large area. In our implementation, the transistors Q 1 − Q 4 are identical, but degeneration resistors with the aspect ratios shown in Fig. 6(a) have been added to implement an effective conductance looking into Q 3 which is slightly smaller than the one looking in Q 1 . This choice results in a 5-dB OTA gain improvement compared to a standard Lee load with W/L Q3 = 0.9W/L Q1 , while enabling a more compact layout, because the unit element of the resistors can be made smaller, and the interconnects are simpler. In terms of the OTA closed-loop stability, inside the circuit shown in Fig. 4(c), the OTFT switch on-resistance together with the highly capacitive EGOFET drain node forms a lowfrequency pole that ensures a minimum 80 • phase margin with an open-loop GBW of 50 kHz. The OTA output stage has been designed to be functional up to a minimum output voltage of 50 mV and supply a maximum current of 20 μA for a target EGOFET drain voltage of 0.2 V.
A 10-bit R2R DAC followed by a voltage buffer [ Fig. 6(b)] has been designed for biasing the top and lateral gates. After the buffer, a CMOS series switch directs the DAC output to the lateral or top gate pin depending on the EGOFET measurement phase. Two external passive low-pass filters [ Fig. 6(b)] with 400-Hz cut-off frequency are placed after the switches. The cutoff value has been chosen such that the integrated output noise of the DAC module would add negligible noise contribution to the EGOFET conditioning chain.
The last module implemented on the Si-IC is the multiplexed current sensitive front end. As discussed in Section III, the AFPG-TIA is the core of this module performing the current to voltage conversion at the beginning of the conditioning chain. For correct operation of this module, a DR of minimum 120 dB has been considered as the target. Indeed, a typical EGOFET full transfer characteristic shows currents ranging from a few nA to tens of μA [2] which already requires a front-end with a DR higher than 60 dB. To ensure high-quality biosensor measurement even under the threshold, an additional margin of 60 dB to the lowest typical recorded current has been added. As reported in [22], together with the 1/f noise, the current multiplierbased TIA topologies suffer from the shot noise injected by the feedback network, which increases proportionally to the dc input current. For this reason, as shown in Fig. 7, we provided our front-end with ten different configurations ranging from a transimpedance gain of 20 M for the lowest currents to 15 k at maximum input. In the proposed circuit, R A = 2 M while M 1 and M 2 are matched such that the factor K F is dependent only on their relative multipliers (1). R A can vary up to ±15%, as shown by corner simulations. However, as A 2 isolates R A from the input node, this variability does not impact the amplifier stability and/or ac performance, but only changes the AFPG-TIA gain. The ten different gain configurations are achieved by connecting or removing transistors with the same aspect ratio in parallel to M 1 or M 2 (Fig. 7). The addition or subtraction of MOSFETs in parallel to M 2 and M 1 is performed with series switches. Thanks to the small currents involved in the circuit and a proper switch dimensioning, the voltage drop over the switches introduces limited mismatch. The performance of the AFPG-TIA using switches has been compared to a wired connection in simulation. As expected, the relative error between the two configurations is maximum (−2%) when the incoming current is the highest and the transimpedance gain is the smallest. This residual error is compensated by a three-point calibration (see Section VI-B), which is performed for each transimpedance gain setting (i.e., "range").
The proposed front-end has also been optimized in power consumption exploiting its nondemanding stability requirements. Indeed, in the hypothesis that the dominant pole is always associated with gm M2 and C IN only, and assuming a minimum parasitic capacitance at the input node to ensure the unity gain crossing before the first pole of A 1 , one can design the amplifier A 1 without stability concerns on its second pole, as only the first one is relevant to loop stability.   Fig. 6(a).

. Multiplexed current sensitive front-end (right) and transistor-level implementation of A 2 and A 3 (left). The schematic of A 1 is shown in
been compensated with the left half-plane zero induced by R A − C A . In our system, a 100-pF capacitor has been chosen as the minimum explicit load that must be connected to each TIA input to ensure stability when no biosensor is connected. In Fig. 8, it is reported the simulated phase margin of the AFPG-TIA with an input capacitance C IN ranging from 10 pF to 10 μF. The TIA stability margin increases with C IN and its minimum is in Range 8, where for C IN = 100 pF a phase margin of 53 • is found. For the implementation of A 2 , we have chosen an inverter-based amplifier as it can efficiently provide the output current required by the EGOFET (Fig. 7) while, similar to the VDCA, a Lee load OTA has been used for A 1 to boost the return ratio θ i . In the design of this amplifier, particular attention was given to the output voltage swing. Thanks to the current multiplier, the current flowing in R A , which defines the output level of A 1 , can be kept limited by changing the TIA gain. In this way, the maximum voltage swing of A 1 fits within ±100 mV from the supply rails.
Together with the AFPG-TIA, also A 3 , the core of the fully differential AAF, has been optimized for power consumption. Here, the same Lee load OTA used for A 1 has been adopted, but in a fully differential implementation. In this amplifier, instead of a standard current mirror, a low output impedance circuit biases the differential pair, limiting the phase margin degradation caused by the pole at the input pair source [26]. This approach limits the power required by the amplifier second stage to achieve stability and, as reported in [26], compared to a standard class-A amplifier, it also improves the common-mode rejection ratio at a cost of die area. The AAF has been designed to have a closed-loop single-ended to the differential gain of 12 dB, 20-kHz cut-off frequency and a total integrated noise with a margin of at least 10 dB on the AFPG-TIA input referred noise. After the AAF, the analog multiplexer (AMUX) drives the signals coming from the 4 parallel analog conditioning chains to the last module of the current sensitive front-end: the ADC (Fig. 7). In order to keep the power consumption of the entire Si-IC limited, a 12-bit energy-efficient asynchronous successive approximation register (SAR) ADC based on the architecture proposed in [27] has been chosen among the available IPs. The ADC used for this work acquires a differential input in the range ±1 V at a sampling frequency of 1MSPS with an effective number of bits (ENOBs) of 10 bits. From the mentioned ENOB, one can derive the integrated inputreferred noise voltage of the ADC operated at the Nyquist frequency to be 0.7 mV rms. In order to reach the system specification and make this noise negligible compared to the one produced by the AFPG-TIA, an improvement in the ADC SNR of at least 20 dB is required. For this reason, in the microcontroller processing the ADC data, a moving average filter is applied to the ADC output, which is oversampled by a factor 250 per multiplexed channel. This ensures an SNR improvement of about 24 dB. The four different channels (Fig. 7) are interleaved and acquired at a uniform sampling frequency of 250 kHz each, resulting in a signal bandwidth after filtering of 440 Hz.
Thanks to its energy efficiency, the ADC consumption is negligible (<1%) in the power breakdown of the whole front-end, which according to simulations, is dominated by the AFPG-TIA (84%) and AAF (15%).

VI. EXPERIMENTAL SYSTEM CHARACTERIZATION
All the system modules described in the previous sections have been manufactured and experimentally characterized, both as single blocks and as an integrated system. Fig. 9 is provided a photograph of the proposed system where the 4 × 4 EGOFET array, the OTFT multiplexing electronics, and the Si chip are shown. The EGOFET top-gate matrix is not included, for the sake of clarity. In Fig. 9(d), it is also represented a block diagram of the Si-IC interface PCB, where all modules needed for the intercommunication between the system blocks are shown. In this bench-top prototype, the high voltage needed by the OTFT addressing electronics has been supplied by an external voltage source. An off-the-shelf isolated dc-dc converter that can generate the OTFT supply (TRV_1-0523M) has also been tested in preparation of a more compact version of the system. As anticipated in Section IV, the synchronization of all signals involved in the system is performed by timers running on the microcontroller, which is interfaced using MATLAB and a USB connection to the computer.

A. OTFT MULTIPLEXING ELECTRONICS MEASUREMENTS
Being the core of the OTFT multiplexing electronics, we first measured the functionality of the 4-stages shift register. In order to limit the OTFTs bias stress, the electrical tests were performed with a limited voltage supply of 20 V. In Fig. 10(a), it is shown a typical output of the shift register where the four outputs O 1 − Q 4 turn active (low) one after the other, according to the input signal D and the clock signal CK running at 0.8 Hz. The module has been also tested at higher switching frequency to demonstrate its performance at faster acquisition rates, although the measurement protocol used in this work aims at measuring a transfer curve in a minimum 5 s (and thus the operation frequency of the shift register, which needs to change state only after completing the measurement of a full transfer curve, is 0.2 Hz). Besides, depending on the matrix measurement process, (i.e., if repeating n-times the transfer curve acquisition of one column and then move to the next one or scan the whole matrix and then repeat), the columns may be switched up to a few minutes. As shown in Fig. 10(b), the maximum clock frequency at which the signal could propagate from the input to the output is 2.5 kHz. At this frequency, a degradation of the output voltage due to the loading capacitance introduced by the measurement setup (National Instruments USB-6363) can be seen.
After the shift register, the series switch matrix has also been characterized. We acquired an output curve of 36 switches on three different foils at V SG = 20 V and extracted the on-resistance in the range V SD = 0 − 0.2 V. The histogram in Fig. 10(c) shows the on-resistance spread over process variations. An average value of 5.6 k (with a standard deviation σ = 0.8 k ) over the entire dataset has been measured. As done for the shift register, the electrical tests have been performed with a limited voltage supply of 20 V. At 30 V, a 30% decrease on the switches on-resistance is expected.

B. CMOS SI-IC MEASUREMENTS
In combination with the OTFT series switches, we characterized the VDCA module on the Si-IC. As mentioned in Section V, this module has been designed to reduce the error on the biosensor drain bias below 1 mV at 10-μA current. For these measurements, the series switch has been emulated using a 5.6-k resistor while a variable current source has been used to mimic the biosensor [ Fig. 11(a)]. As shown in this figure, at 10 μA of current, the VDCA reduces the EGOFET biasing error to 0.93 mV resulting in a current reading error of less than 1%, which fulfills the target specification.
The on-chip DAC and output buffer characterization is provided in Fig. 11(b). This measurement was performed without any calibration. As shown in the figure, the output has an INL smaller than ±1 LSB in the range 0.2−1.18 V. With a single-point calibration, the range can be extended to 0.1-1.19 V. These last values are sufficient to operate the EGOFETs in which, to avoid any electrochemical reaction, the V SG has to be kept small . As it will be shown in the biosensing measurements in Section VII, the typical gate voltage range is in between 0.1 and 0.8 V (EGOFET V SG = 0.5 V, −0.2 V). The DAC refresh time requirement follows the time needed by the EGOFET for a complete output settling that is typically 60 ms.
The last Si-IC module measured is the current sensitive front end. The full chain (AFPG-TIA, AAF, and ADC) is characterized in terms of power consumption, DR, and noise performance. A benchmarking against state-of-the-art high-DR current sensitive front-ends is also reported.
A low-noise voltage source in series with ten different calibrated resistors has been used to emulate a variable current source in the front-end measurement setup [ Fig. 12(a)]. The ADC digital output representing the EGOFET current is collected, averaged by a factor 250 and sent to a base station using the microcontroller on board (dsPIC33CK256MP508). In Fig. 12(b), a single-channel DR characterization is shown where a 100-pF capacitor has been connected to the frontend input to mimic the stability worst-case scenario. Here, the measured SNR of the full front end is reported. For better clarity, only half of the implemented gains are shown. In order to compensate for R A variability and M 1 − M 2 mismatch, a three-point calibration for each of the implemented gains and for each of the four front-ends has been applied to the output digital data. This calibration also compensates the AAF and ADC gain variability. In line with the measurement required for the EGOFET transfer curve acquisition, and matching most biosensor application requirements, the SNR has been measured using dc input currents [28]. The same approach has also been adopted in [29] where the DR is calculated with dc signals.
Due to the low-pass filter formed by the measurement series resistor and the 100-pF capacitor at the input of the AFPG-TIA, a low enough input signal frequency must be used for the SINAD extraction. In this work, a 1.5-Hz sinusoid has been used for the SINAD characterization reported in Fig. 12(c).
As shown in Fig. 12(b), the proposed front-end can acquire dc currents up to 30 μA with an SNR of 75. Using all the available programmable gains, an SNR ≥ 60 dB is granted for input currents from 5 nA onward. This large overspecification was chosen to accommodate for possible variations in the EGOFET process and to enable measuring with good SNR even its leakage current, which is below the subthreshold region and can vary considerably. From Fig. 12(b), a dc DR of 137 dB, defined as ratio between the largest input signal and the smallest that ensures an SNR > 0 dB [28], [30], can be extracted. It should be noted that this level of performance is not strictly needed for the single molecule detection procedure, for which an accurate estimation of the threshold is sufficient, but is useful for a research system as the one built in this work. Indeed, it enables a full measurement of the EGOFET transfer characteristics from leakage to above threshold, as it would be possible using a benchtop curve-tracing instrument. Fig. 12(d) is provided the spectrum of the input-referred noise current for the full signal conditioning chain, measured by setting the AFPG-TIA to its maximum transimpedance gain and with a floating input. The proposed current sensitive front-end achieves a 200 fA/ √ Hz input-referred noise at 100 Hz, with a total integrated noise in the bandwidth 0-440 Hz of 4.2 pA rms .
Without any input connected, the four-channel multiplexed front-end, comprising the ADC and its data output buffers, drains a total of 141 μA. With a supply voltage of 1.2 V, each channel consumes on average 42 μW. The proposed acquisition system has been compared to the state-of-the-art of both analog and mixed-signal currentsensitive front ends. Mixed-signal solutions achieve on average higher FoM [28] thanks to the direct interface of the sensor with the current-based ADC. This kind of topologies have been added to the benchmarking for a complete state-ofthe-art evaluation, but they cannot be used without additional circuitry in multiplexed systems as the one proposed, where each sensor in a column must be kept constantly biased during a measurement procedure.
Compared to previously published current-input frontends, this work achieves 137-dB DR with a state-of-the-art FoM of 208 dB (Table 1). In this comparison, the proposed front-end is the only one implemented in a multiplexed system and most importantly, the only one stable with any sensor output capacitance (larger than 100 pF).

VII. BIOSENSING MEASUREMENT RESULTS
In this section, the measurements results obtained using the designed Si-IC interfaced first to a single EGOFET and then to a 4 × 4 biosensor array are presented.
As reported in [1] and [2], to operate an EGOFET as ultrasensitive and specific biosensor, a biofunctionalization of its top-gate must be performed, in order to create an antibody self-assembled monolayer (SAM) on the gate surface. After this process, a precise procedure must be followed to reliably measure the gate charge redistribution caused when the top gate is exposed to the target analyte, which bonds to the antibodies. The measurement procedure starts with the acquisition of several consecutive biosensor transfer curves using the lateral gate: this process continues until the variation of the maximum current compared to the previous measurement is below 5%. Thanks to this stabilization step, the electronic-ionic interaction between the OSC and the electrolyte, a process that could lead to undesired threshold voltage shifts, reaches a stable condition, with stable EGOFET parameters (i.e., threshold voltage, OSC mobility, etc.). The bio-sensing step follows this stabilization process, ensuring that the measured threshold voltage shift is solely due to the selective bio-interaction at the functionalized top gate. In the bio-sensing phase, the topgate, previously incubated in a buffer solution, is placed in contact with the EGOFET electrolyte and the output current baseline value is recorded over several transfer curves.
The resulting value is strongly correlated to the EGOFET threshold voltage shift, which is due to the presence of the specific analyte that bonded to the antibody on the top-gate. Suitable top gate washing steps with pure water maximize the selectivity of this procedure.

A. SINGLE EGOFET BIOSENSOR MEASUREMENTS
In the experiment reported in this section, the same EGOFET has been measured with two different top gates, one biofunctionalized with anti-immunoglobulin-G antibodies (a-IgG) and the other covered with a nonresponsive layer of bovine serum albumin (BSA). In the incubation phase, both these gates have been soaked in a buffer solution containing increasing concentrations of the analyte (IgG) and then measured inside the EGOFET. Fig. 13(a) is shown a typical EGOFET transfer curve acquired in the three different phases: 1) stabilization; 2) baseline; and 3) sensing (with binding on the top-gate). For the sensing experiment, we recorded ten consecutive transfer curves after each of the four incubation phases (30 zM, 300 zM, 3 aM, and 3 fM of IgG). The same procedure has been followed for the blank experiment (330 zM, 3.3 aM, 3.3 fM, and 330 fM of IgG). In Fig. 13(b), it is shown the normalized maximum current response of the EGOFET ( I/I B ) with the a-IgG gate SAM after each successive incubation. For each phase, the average value and the error bars were calculated using the maximum transfer curve current in the ten consecutive cycles. As shown in Fig. 13(b), with the a-IgG biofunctionalized gate, we recorded a minimum EGOFET response of 20% already at 30 zM concentration. Instead, from the same figure, it can be noticed that a maximum response with the BSA top-gate of 14% was recorded at 3fM concentration.
From the data reported in Fig. 13(b), the LoD of the entire system can be extracted. As reported in [32], the 4-parameter logistic curve shown in (6), can be used to fit the experimental dose-response curve shown in Fig. 13(b) where A 1 and A 2 are the minimum and maximum EGOFET response, x is the analyte concentration, x 0 is the analyte concentration where the curvature changes sign [33], and p is a parameter to control the distribution symmetry.
In the hypothesis that the LoD standard deviation is equal to the limit-of-blank (LoB) standard deviation (σ LoD = σ LoB ) [34], one can estimate the LoD level to be Using this value in the fitted dose-response curve, an LoD value of 21.7 zM can be extracted. This result is perfectly in line with previous works achieving single-molecule sensitivity [2], [4], [5].

B. EGOFET ARRAY MEASUREMENTS
After the readout system validation with a single biosensor, the final integration with the 4 × 4 EGOFET array together with the OTFT addressing electronics was performed. The proposed system could correctly multiplex, bias, and readout all the devices inside the 4 × 4 matrix although, due to limited yield and handling difficulties, just four of them in the matrix under test were reported functional. Fig. 14(a) shows a preliminary result achieved using the 4 × 4 array interfaced with the proposed system in which a sensing experiment using the devices highlighted in Fig. 14(b) is reported. After the baseline was recorded, the top gates, all biofunctionalized with a-IgG, were incubated in different concentrations of both IgG (sensing experiment) and IgM (control experiment). The gates corresponding to S1, S2, and S3 were incubated in IgG while the one corresponding to S4 was exposed to IgM.
As shown in Fig. 14(a) and as expected by the previous results, S1, S2, and S3 responded to the analyte present in concentrations ranging from 60 zM to 60 aM, while S4, incubated in an IgM 600 aM solution, showed basically no change compared to the baseline. Although these are very promising first results, a deeper analysis of the system must be performed to create a detailed and quantitative assessment of the 4 × 4 biosensor matrix performance.

VIII. CONCLUSION
This work has been presented an Si CMOS current sensitive front-end interfaced via an OTFT multiplexer to a label-free EGOFET biosensor array achieving single molecule (i.e., zeptomolar) sensitivity.
The OTFT-based active multiplexer is designed for high sensor currents, as its series switches are compensated for any foreseen voltage drop using an analog module embedded in the CMOS chip. Moreover, the extremely high EGOFET output capacitance has no effect over the front-end stability thanks to the proposed AFPG-TIA topology integrated in the Si-IC. The multiplexed current sensitive front-end, composed of four AFPG-TIA followed by AAFs and a shared oversampled ADC, reaches a state-of-the-art FoM of 208 dB with a 137-dB DR and a maximum dc input current of 30 μA. A 10-bit R2R DAC has also been integrated in the Si-IC to bias the biosensor gates. Finally, the current-domain interface guarantees an overvoltage-safe connection between the OTFT electronics (which uses a 30-V supply) and both the Si-IC and the biosensor array (that use a supply of 1.2 V).
The system has been validated both using a single EGOFET and a 4 × 4 biosensor array. A full calibration curve has been acquired with the single EGOFET from which an LoD of 21.7 zM has been extracted. This value is in line with the typical sensor performance reported in the literature. A response to similar concentrations has also been reported in the biosensors of the 4 × 4 array but a quantified analysis of the biosensor array performance is still ongoing.
Thanks to the multiplexing strategy and the low costs of its modules, the system here presented has the potential to enable a widespread use of precision diagnostic with extreme sensitivity even in point-of-care and low-resource settings. In 2007, he joined the Group of Prof. Sirringhaus with The Cavendish Laboratory, Cambridge, U.K., as a Postdoctoral Fellow, working for three years on high-resolution printing of downscaled organic transistors and circuits, and on charge transport in high mobility polymers. In 2010, he was appointed as a Team Leader with the Center for Nano Science and Technology@PoliMi, Istituto Italiano di Tecnologia, Milan, obtaining tenure in 2019. He is a 2014 ERC Starting grantee and a 2019 ERC Consolidator grantee. He is currently interested in printed organic and hybrid micro-and opto-electronics, thermoelectrics, bioelectronics, and sustainable and edible electronics.
MAY WHEELER received the master's degree in physics and the Ph.D. degree in condensed matter physics from the University of Leeds, Leeds, U.K., in 2010 and 2014, respectively.
Then, she was as a Postdoctoral Research Fellow of Molecular Electronics and Thin-Film Magnetism with the University of Leeds. In 2015, she moved to Cambridge Display Technology, Godmanchester, U.K., as a Device Physicist, where she worked on OLED optimization and optical biosensing and was seconded to the Emergent Device Research Group, RIKEN, Tokyo, Japan, to work on a collaborative project in the field of energy harvesting. In 2018, she moved to FlexEnable, Cambridge, U.K., initially as a Senior Engineer and currently leads an Optical and Electrical Test Team. Her research activities with FlexEnable include biosensing, liquid crystal optics for augmented and virtual reality, and display technologies based on FlexEnable's proprietary organic thin-film transistor technology. She is an inventor of more than 12 patent applications and an author of more than 12 peer-reviewed publications. GUILLAUME FICHET received the M.Sc. degree in polymer science and chemical engineering from the European School of Chemistry, Polymer and Material Science, Strasbourg, France, in 2001, and the Ph.D. degree in polymer chemistry (in collaboration with Cambridge Display Technology and the Nanotechnology Department) with the Melville Laboratory, Cambridge University, Cambridge, U.K.
In 2005, he joined Plastic Logic, Dresden, Germany, to work on the development of new materials for organic thin-film transistors and flexible electrophoretic displays. His research interests lie in the area of flexible electronics and polymer science. Since 2015, he led FlexEnable's development for flexible organic light-emitting devices displays and lighting devices as well as the organic liquid crystal display (OLCD) technology. In recent years, he has focused on the development and commercialization of new sensors in particular gas sensors, X-rays detectors, fingerprint sensors as well as biosensors. As a Research & Programme Manager with FlexEnable, Cambridge, he is responsible for driving the strategic developments with innovating materials and is collaborating actively across the consumer electronics, automotive, and medical fields.
Dr. Fichet received two IET awards (Emerging Technology Design Award and the Start-Up Award) for his pioneering work on OLCD in 2016. She is currently a Research Fellow with the University of Bari. She is the coauthor of 14 publication on international journals, 7 of which as the first author; and she has 18 international conferences contributions. From 2018 to 2021, she finalized in Bari an industrial Ph.D. project in Chemical and Molecular Sciences, focused on the study of a standalone and disposable bioelectronic HIV sensor for point-of-care applications. She has expertise in the characterization of modified gold surfaces, used as transducing systems for the biorecognition of clinically relevant pathogens.
ELEONORA MACCHIA received the Ph.D. degree (summa cum laude) in chemical sciences and the master's degree (110/110 cum laude) in physics from the University of Bari, Bari, Italy, in 2018 and 2014, respectively.
She is a Senior Researcher with Åbo Akademi University, Turku, Finland, as a PI of the Project "Protein Detection at the Single Molecule Limit With a Self-Powered Organic Transistor for HIV early diagnosis (ProSiT)" funded by the Academy of Finland Research Council (GA#332106). She has been a Postdoctoral Fellow with the University of Bari. She has published 30 papers in international journals, 16 as the first author, and one as the corresponding author. She is the coauthor of a European patent. Her works gathered over 430 Google Scholar citations result in an H-index of 11. She is the coauthor of three book chapters, and she participated to 18 international conferences, with ten oral contributions and four posters.
Dr. Macchia has received seven scientific awards.