Impact of Carriers Injection Level on Transients of Discrete and Paralleled Silicon and 4H-SiC NPN BJTs

The 4H-SiC vertical NPN BJTs are attractive power devices with potentials to be used as high power switching devices with high voltage ratings in range of 1.7 kV and high operating temperatures. In this paper, the advantages of the 4H-SiC NPN BJTs in terms of switching transients and current gain over their silicon counterparts is illustrated by means of extensive experimental measurements and modelling, including investigation of high level injection, as a common phenomenon in bipolar devices that inﬂuences the switching rates and DC current gain. The two device types have been tested at 800 V with maximum temperature of 175 °C and maximum collector current of 8 A. The turn-ON and turn-OFF transition in Silicon BJT is seen to be much slower than that of the SiC BJT while the transient duration will increase with increasing temperature and decreases with larger collector currents. The common-emitter current gain of SiC BJT is also found to be much higher than silicon counterparts, increasing with temperature in low injection levels but decreasing in higher injection levels in both devices. The rate of increase of current gain slows down toward stability as the collector current increases, known as the high-level injection. Current sharing imbalance among parallel connected devices is also investigated, which are shown to be evidently dependant on temperature and base resistance in Silicon BJT, while the current collapse in also seen in SiC BJT at high injection levels with high base resistance. The turn-OFF delay is seen to be temperature dependant in single and paralleled Silicon BJTs while almost non-existent in SiC device.


I. INTRODUCTION
Silicon bipolar junction transistors (BJTs) have been in use for over half of a century. The low DC gain (β) in vertical Silicon BJTs makes them a not promising choice for applications in power electronics because complicated base drivers are needed for the high continuous base current. However, this is set to change with emergence of the 4H-SiC BJTs which enable a significantly higher DC current gain (β) [1]. 4H-SiC BJTs have the potential to displace gated transistors, i.e. MOSFETs and IGBTs, in some specific applications [2] due to advantages such as low on-state resistance at high currents due to the conductivity modulation and the absence of the gate channel, especially when compared with SiC MOSFETs, as the gate oxide imposes ruggedness instabilities at high temperatures [3]- [5]. Furthermore, SiC BJTs have higher transconductance when compared with SiC JFETs [3] although with lower current rating which is mainly due to the low carrier lifetime in SiC which impedes adequate conductivity modulation in the drift region in the on-state. The low carrier lifetime is mainly caused by the high electrically active defect density. Of those lifetime killing defects that have been observed in 4H-SiC, Z1/2 (EC-0.65 eV) is the main intrinsic defect while EH6/7 (EC-1.55 eV) represents the main extrinsic deep defect [6]. The reduced carrier diffusion lengths of dopants, as a result of the low lifetimes, is also a challenge in ion implantation of SiC substrates. P-N junctions in SiC also imposes a minimum forward voltage of 3 V. Therefore, further increase in carrier lifetime is still desirable.
Silicon BJTs have a positive temperature coefficient (PTC) with higher current gain, especially due to the increase of the carrier lifetime with temperature [7]. Paralleling them is challenging though as with increase of the current in the transistor its temperature rises which leads to lower impedance and higher current, causing a thermal breakdown. On the other hand, attaining a negative temperature coefficient (NTC) is feasible at high currents for SiC BJTs, due to the incomplete ionization of Aluminum dopants in the base area at room temperature and increase of the hole concentration of the base at elevated temperatures. Thanks to the lower carrier lifetime, lower carrier mobility and much smaller width of the base and drift region, SiC BJT is predicted to have faster-switching transients [4]. The DC Current gain in common emitter (CE) configuration for NPN BJTs, i.e. β = I C /I B , is also an important parameter which decides the loss of the transistor and the structure of the base driver [8]. The higher gain in SiC is mainly due to the smaller dimensions of the base and the drift region, achieved by the higher critical electrical field. The smaller device size also reduces the parasitic capacitance for less output oscillations.
At the low doped base region, the injected electron concentration is much higher than the base doping concentration when the high-density current is injected from the collector side. This is referred to as the high-level injection (HLI) in the base area with a large concentration of both electrons and holes. This significantly reduces the base resistance to allow a larger on-state current density and a lower on-state voltage drop. However, it is reported [9], [10] that the DC current gain is reduced under the same circumstance resulting in a low efficiency of the base driver.
For both the DC gain and the dynamic transition, the variation of temperature and collector current play an important role. The dynamic switching transition can be divided into the turn-ON and turn-OFF transitions determined by the temperature-dependent diffusion coefficient and carrier lifetime, which are also affected by the current level. In terms of the DC current gain, the hole concentration by the partial ionisation and surface recombination are temperature dependent and the current gain is determined by the recombination in the emitter-base junction.
SiC BJTs are already demonstrated in applications such as the 200 A and 50-kW DC power converter in [11], which was integrated by 4H-SiC BJTs, delivering very high efficiency for application in electric vehicles. It is demonstrated in [11] that each SiC BJT has a current density of over twice that of silicon IGBTs together with a larger current handling capability than that of SiC MOSFET [12]. High-voltage (≥800 V) BJTs are also still in demand as deflection transistors in specific electronic screens [13]. In absence of a need for reverse conduction, as the case of boost converters, SiC BJTs are also shown to have an outstanding conduction efficiency when compared with unipolar devices [14].
Novel structures of base drivers are recently proposed [15] and installed on DC/DC step-up converters fabricated by SiC BJTs, minimising the base current and hence the power loss. The theoretical capabilities of multi-kilovolt 4H-SiC BJTs, such as the small on-state and switching losses have made it a potential candidate for high voltage converters [16]. This paper demonstrates the performances of 4H-SiC BJTs compared with the silicon BJTs, with analysis of switching transients and current gain in a wide range of temperatures (25°C to 175°C) and collector current (1 A to 8 A). The aim of this paper is to investigate the impact of the high-level injection (HLI) on the transient slew rates and current gain of Silicon and SiC BJTs when collector-emitter current of the BJTs rise, and to analyse the current-sharing among parallelconnected Silicon and SiC BJTs to increase the overall current handling capability. Section II presents the theoretical models required to understand the switching transients and current gain of power BJTs while the experimental set-ups are shown in Section III. Section IV compares the measurement results compared with simulations while Section V concludes the paper.

II. MODELLING ANALYSIS
For both the Silicon and SiC BJT, the doping concentration of the base and drift region is much smaller than other regions, as in Fig. 1, in order to improve the emitter's injection efficiency.
Carrier mobility for holes (μ p ) and electrons (μ n ) in Silicon reduces with temperature [9], as (1): And for SiC this is as in (3): While temperature dependence for the diffusion coefficient can be derived by Einstein's equation [9] as (5): Diffusion coefficient (D) has strong inverse temperature dependence because the temperature dependence of the of mobility is dominant, which can be determined as [9] as (6): Due to the incomplete ionization of the SiC, the effective doping concentration of the SiC BJT will increase with temperature. It leads to additional ionized impurity scattering of free carriers resulting in further decrease of the mobility and hence the diffusion coefficient. The minority carrier lifetime under the same temperature range can be expressed in (8) as [17]- [19]: Since the carrier lifetime is the reciprocal of the recombination rate, the carrier lifetime of 4H-SiC is about two orders of magnitude smaller than silicon, leading to a weak temperature dependence and faster switching transition. The HLI phenomenon will be more evident in the intermediate base area which is low-doped based on device band diagrams [20]. At large currents, the injected minority carrier exceeds the doping concentration of base region causing the surge of both carriers with respect to the charge neutrality n = p, the mobility of both carriers decreases because of the amplified mutual Coulombic interaction [9]. Assuming that the concentration of electrons is equal to the concentration of holes, the current dependence can be analyzed by the Caughey-Thomas formula [9] in (10) as: μ n (SiC) & D n (SiC) ∝ n 0.61 (12) μ p (SiC) & D p (SiC) ∝ n 0.65 (13) And the current dependence of diffusion coefficient is the same. The total carrier lifetime τ tot can be derived as (14) in [9]: Where τ SRH and τ A are the carrier lifetime from the Shockley-Read-Hall recombination and Auger recombination process. The effect of τ A is negligible at low collector current, therefore the total lifetime increases with rising collector current as determined purely by the τ SRH . For the high injection level, the Auger lifetime plays a more important role which decreases with larger collector currents, leading to the decrease of total lifetime. In SiC, the decrease of Auger lifetime in HLI [4] and τ tot will be smaller.

A. TURN-ON TRANSIENT
First, enough charge must be built up in the base and drift region to turn-ON the BJT as 'transient time,' given by [9]: After the storage phase, enough minority carrier charge Q nB promotes the current flow. The time can be derived as [9]: Which describes the rise-time for the collector current. The D n reduces with increasing temperature, leading to the increase in switching time, and further increased in higher collector currents. Afterward, the collector voltage drops to the steadystate level. This period is defined as the ratio of the stored minority carrier charge (Q sc ) to collector current as: The voltage level in this phase is limited by the stored charge in the drift region, i.e. the depleted part of the drift region become smaller which lead to a smaller voltage level. Faster voltage transition is expected at high collector current. However, the smaller J C is predicted in high temperatures because the diffusion coefficient decreases with temperature.

B. TURN-OFF TRANSIENT
At turn-OFF, a reverse base current is applied to extract the stored carrier from the base and drift regions. This time is known as the storage time or delay time and is defined by [21]: This time is longer than the turn-ON transit time because the stored charge removal happens at both the base and drift regions. The first term can also be expressed as β so the whole expression will not be directly influenced by the base current and the collector current. For higher temperatures or collector currents, the diffusion coefficient will decrease leading to a slower depletion process. Nevertheless, the conductivitymodulated width W NM decreases with increasing collector current [9] which is the dominant factor to reduce the delay time. The voltage turn-OFF time is given by [9]: After the voltage rise phase, the collector current drops to offstate. This time is decided by the remaining carriers in the base after the voltage transients, and can be written as [9]: The temperature dependence of the diffusion length (L n ) is decided by the trade-off between D n and τ n . As a result, the diffusion length is almost temperature independent due to the opposite trends among D n and τ n . Nevertheless, the slower current drop is caused by the temperature dependent D n . Under high current levels, the L n is decreased because the τ n and D n have the same temperature dependence, leading to the increase in t I−of f as the decrease in D n is more dominant.

C. DC CURRENT GAIN
When analysing the Collector-Emitter current gain model [22] in NPN BJTs, the following three factors must be considered: the recombination rate in the BJT; incomplete ionization in the SiC BJTs and Emitter injection efficiency while the Emitter injection efficiency always plays the most important role as α is proportional to the common emitter current gain: The recombination processes consist of the recombination in the emitter region, recombination in the space charge region (SCR), the surface recombination and the recombination in the base region. In this model, the electron diffusion current (I dn ) of the emitter current is assumed to be equal to the emitter current (I E ). At very low injection level, the current gain β is limited by the SCR recombination at the base-emitter junction determined by the forward-biased voltage at this junction. We have in (22) of [21]: deriving the β T as [21]: The recombination process in the SCR becomes significant at very low injection level where the current density of SCR recombination is derived as [9], [22], [23] The doping concentration of SiC is larger than Silicon, and the much smaller W B results in a much larger J W for SiC BJT. In Silicon BJT, the lower diffusion coefficient leads to the fall of J W at high temperatures, which results in the decrease of β in (23) with current which shifts to lower currents. When the temperature is increased, the carrier lifetime rises as shown in (8), and the emitter efficiency thus the current gain become larger. As the V BE is increased, the diffusion currents exceed the recombination current and large amount of electrons start to inject into the base region, leading to increase of the emitter injection efficiency. Therefore, it is also expected to see a lower β with increasing temperature at HLI. Although the SiC BJT has a higher doping concentration, the DC current gain is always larger due to its much smaller width of the base region [23]. On the other hand, with the further increase of collector current, the injection of holes also begin in order to maintain the charge neutrality at the Base Emitter junction. The hole concentration becomes proportional to the injected electron concentration into the base region which this leads to the extra recombination in the emitter region and thus reduced injection efficiency. The significant incomplete ionization of the SiC [22], [23] leads to a much smaller effective hole density at base than the doping concentration but increases with temperature until the ionization of dopants complete. This leads to further temperature dependence of the current gain in SiC BJTs, Whereas in Silicon, the dopants are almost fully ionized at room temperature in the base region, and the density of holes can be assumed as constant at all temperatures, reducing the temperature dependence of the current gain in Silicon BJTs. The current gain is known to decrease once the collector current density increases beyond the Webster current density J w in (25) as HLI boundary [4], [9], [24] as: Despite the larger D nB in Silicon, the Webster density for SiC is actually larger due to the higher doping concentration and much smaller dimensions of the SiC die. The onset of Webster effect can be experimentally seen when the increased collector current no longer correlates with an increase of the DC Gain (β), keeping the DC gain stable with collector current increase. This is called the onset of high-level injection. Further increased injection into the base region of the BJT will result into reduced DC gain, driving the device into HLI. High currents beyond the HLI rating of single devices must be distributed into paralleled devices.

D. PARALLELED BJTS
The key factors to consider when paralleling BJTs are [25]: 1) Differences in the device parameters. 2) Differences in position within the circuit layout.
3) Differences between the base drivers connected. The charge stored or released from the base determines the switching performance of the BJTs. A suitable base driver generates current peaks to rapidly turn-ON/OFF the device while maintaining a low on-state base current to minimize the driver losses. Here, to eliminate the role of driver's mismatch the same base driver is used. The difference in the electrical parameters such as the DC current gain and the amount of stored charge may also cause the imbalance of output current. The circuit layout [25] also affects the switching performance of the paralleled devices, so the additional parasitic elements must be considered.
To turn-ON the transistor, a positive current spike is required to rapidly develop the stored charge in the base region and forward bias the base-emitter junction. After the BJTs are turned-ON, the base-emitter junction is forward biased whilst the injection of electrons from the base-emitter junction to the base-collector junction starts. The base current is reduced to the steady-state value. For the first of the two paralleled devices, this can be written as (26) in [26]: where V GL is the drive voltage (5 V) at the steady state, V D is the Schottky diode voltage drop (about 0.3 V), V BE ,sat is the saturation voltage of the base-emitter junction (about 1.5 V for Silicon BJT and 3.45 V for SiC BJT at operating temperature of 25°C) and 0.6 is added to consider the resistance of the components on the base driver. The steady base current for the 2 nd device can also be written as (27): The extra base resistance added to the second device decreases the base current and thus leads to some difference in the collector current which is proportional to the value of base current.

III. EXPERIMENTAL SET-UP
A wide range of experimental measurements and simulations are done to observe the effect of collector's high current injection and temperature on single and paralleled high voltage silicon and 4H-SiC power BJTs. These are mounted on a double-pulse test board with a specific base driver used for switching, with parameters specified in Tables 1 and 2 separately. A 1.2 kV SiC Schottky barrier diode and a 4 mH load inductor are also connected to the device under test. The base resistance of the driver is changed between 3.75 and 11.75 while temperature is increased from 25°C to 175°C in increments of 25°C using ITC-100RL PID Temperature Controller. The devices are tested using a double-pulse test board with collector current controlled by the first charging pulse length (t Q1 ) and increased linearly from 5 μs to 40 μs in steps of 5 μs while every 5 μs roughly equals to an increase of 1 A in collector current to maximum value of 8 A to remain within the safe operating areas of the devices. To increase  the overall current ratings, paralleling of the devices is also experimentally analysed. The 8 A limitation is due to the lower current rating of SiC BJTs, especially at high temperatures as shown in Table 3. The extra turn-off delay of the Silicon BJT will lead to the higher output current than that of the SiC BJTs, while the rating current becomes lower in high temperatures, especially for the SiC BJT as shown in Table 3. High voltage bipolar devices in SiC remain challenging to fabricate unlike in Silicon where minority carrier lifetime can be engineered to yield optimal conductivity modulation.
The test board has a 5 mF DC link capacitor bank to stabilize the voltage V DC . The power BJTs are the Fairchild silicon BJT and GeneSiC 4H-SiC BJT, while the high-side freewheeling diode is a CREE SiC Schottky diode. The voltage applied to both the silicon and SiC BJT is 800 volts.  Two GW-Instek GDP-100 100 MHz voltage probes and a PEM CWTMini50HF current Rogowski coil with bandwidth of 50 MHz are used to obtain waveforms of measurement. The bandwidths of these current/voltage probes enable capturing the switching waveforms in the interest of this paper. Further increase of bandwidth enables better capturing of the potential noise on the switching transient waveforms. This, for example, would be necessary in design of gate drivers that aim to suppress the disturbances. This is especially the case for SiC devices where the switching transients are faster, and the device is more prone to oscillations and disturbance by the circuit loop inductance at the output terminals. A 100 nF de-coupling capacitor is connected between the cathode of the Schottky Barrier Diode (SBD) and the emitter side of the BJT closest to the DUTs. An Agilent 33220 A 20 MHz arbitrary waveform generator is used for adjusting the pulse lengths t Q1 . A stray inductance of 60 nH is calculated due to the inevitable distance among the components. A similar circuit model is designed in LTSpice [27] to model switching transients to confirm the experimental results. The measurements of single devices are done using the circuit shown in Fig. 2 while the measurements of paralleled devices are done using the circuit shown in Fig. 3 to analyse current sharing imbalance.   BJT, which increases with rise of temperature. The diffusion coefficient is inversely proportional to temperature, leading to an increase of storage time as expected by (6) and (18). The base current is constant during the increase of collector current since it operates at the saturation region as the stored charge is reduced by the higher base resistance. In Fig. 5(B), both the base and collector current are turned on and off almost instantaneously for the 4H-SiC BJT, due to the much lower carrier lifetime and the significantly smaller dimensions enabling the decrease of the storage and transient time. The rating current of SiC device, as shown in Table 3, is found to decrease at high temperatures. Fig. 5(B) highlights the sensitivity issue of SiC at high base resistance during high injection (HIL) which

FIGURE 6. The double pulse test results regarding the collector and base current at 150°C for (A) Silicon and (B) 4H-SiC BJT, with R base of 3.75 to analyze the turn-OFF delay with respect to different collector currents under the same base current.
reduces the collector current switching capability, leading to a twisted waveform. At 25°C, the collector current dropped to an intermediate level before fully turn-OFF, reducing the current level in the second pulse. Together with the lower current rating at elevated temperatures, this waveform worsens at 175°C as the second pulse is almost erased. This is due to the fact that by increase of the injected carriers into the base region, the injected base current had to rise beyond the capability of the base driver to maintain the device in the on-state, and this has become worse with increased minority carrier lifetime at higher temperatures. Fig. 6 shows the double-pulse test result with respect to different collector currents at 800 V when T = 150°C. The collector current applied in this case is 1 A and 8 A separately, all other parameters are the same. The average delay time is 15 μs for the Silicon BJT which deteriorates its performance, especially at high frequency as extra power losses are caused by the prolonged collector current. Meanwhile, the much lower delay time in SiC BJT in Fig. 6(B) is expected by its dimensions. The high temperature instability is also observed, i.e. the current at first pulse decreased to a lower level since the collector current of 8 A delivers the high-injection at 150°C. Despite the significant advantages of the SiC BJTs compared with the high voltage Silicon BJTs, the inability to hold the current by the high DC gain [28] and low base driver current at high temperatures is a major drawback of the SiC BJTs [29]. Some of the results of the SiC BJT are not included in the measurements section for the case of 175°C experiment since it failed when temperature rised above 150 . The Silicon BJT, on the other hand, worked well until the collector current exceeding 8 A at 175°C. Therefore, during stressed measurements and due to the risk of damage to the device in high temperatures and currents, the temperature of up to 150°C and collector current of up to 8 A are applied to avoid further failure. Fig. 7 shows the delay time with temperatures and collector currents as the variables. A significant delay can be seen during the transients of the Silicon device with the average value of 10 μs while the turn-OFF delay in SiC device is about two orders of magnitude smaller, thanks to the much smaller base width in SiC BJT, and indicating a small downward trend with increase of the collector current. The delay increases at elevated temperatures, because electron's diffusion constant (D n ) decreases with increasing temperature as in (10). It is shown in Fig. 7 that at higher currents, due to the smaller W NM , the delay is reduced in-line with (18).
The turn-OFF delay as in (18) also exists among the paralleled Silicon BJTs and the peak and imbalance of current deteriorates as temperature rises as seen in Fig. 8(A), while the turn-OFF delay and current imbalance is less significant when the base resistance increases as in Fig. 8(B) as the peak base driver current decreases, leading to slower transient switching rates, providing the period needed to extract the excess carriers. This suggest that turn-OFF delay at higher temperatures can be counterbalanced by increasing the base resistance at the cost of higher base current by the driver. As seen in Fig. 9, paralleled SiC devices do not demonstrate turn-OFF delay that is seen in Silicon devices in Fig. 8. However, there is a current imbalance between the two paralleled devices which deteriorates with temperature increase as shown in Fig. 9(A), while both paralleled devices suffer from the same current   collapse seen in Fig. 5 when the base resistance increases as shown in Fig. 9(B). Fig. 10 shows the trend of turn-OFF delay in single discrete and paralleled Silicon BJTs with temperature with first pulse length of 40 μs, where it can be seen that paralleled BJTs exhibit a longer delay period compared to single devices with both base resistances, while the larger base resistance reduces the turn-OFF delay by reducing the transients' slew rate, providing the time necessary to extract the excess charge in the base region. The turn-OFF delay increases with temperature due to the increase of the minority carriers lifetime with temperature in Silicon as in (8), while in SiC the low minority carrier lifetime means there is effectively no turn-OFF delay which would be dependant on temperature.
The current imbalance among paralleled devices, as in Figs. 11 & 12, can be due to device parameters mismatch, gate drivers mismatch, power loop mismatch, or a combination of all. Most of these are shared among different transistors, however when it comes to device properties, the SiC MOSFETs and SiC BJTs exhibit significantly different features. In SiC MOSFETs, the two key parameters determining the effectiveness of current balance are on-state resistance and the gate threshold voltage drift. During on-state the impact of drainsource resistance will be partially countered by the device positive temperature coefficient (PTC) which will naturally prevent excessive current to flow through the device that experiences high junction temperatures. The device with higher junction temperature will also have lower threshold voltage that leads to early turn-on and late turn-off at the switching transients. As a result, the device may have to cope with the entire current for short periods with a potential for thermal runaway and parasitic BJT latch-up. In SiC BJTs, however, the mechanism of conduction and switching are significantly different due to the bipolar feature of the device (compared with MOSFETs as a unipolar device) in absence of gate oxides. In SiC BJTs, the parameters that influence the current imbalance are the current gain and high level injection. The current gain of BJTs drift with temperature, and is primarily determined by ionization of dopants that have not released carriers into the base region at lower temperatures. This is  more likely in SiC BJTs due to the higher ionization energy of dopant [9]. The onset of high-level injection at higher collector currents also means the current gain does not increase with further collector currents, i.e. higher base current is required for higher collector currents. This exacerbates the influence of the base driver variations on the current imbalance.
The collector current at turn-ON and turn-OFF transients are shown in Figs. 11 and 12 for both Silicon and SiC BJT. The turn-OFF delay is previously shown to get worse at elevated temperatures, which will in turn increase the collector current increase as the temperatures rises as effectively the length of the first pulse increases. When comparing Fig. 11(A) and Fig. (B), the much smaller W B can be seen to play a significant role to reduce the t Ion for the SiC BJT in-line with Eq. (16), while the increase of turn-ON period is expected by the decreasing of the diffusion coefficient at high temperatures as in (6), so decreasing of transient slew rates are expected to be seen at higher temperatures as shown in Fig. 11(B). The increase of temperature also impacts the turn-OFF transients as shown in Fig. 12(B). This is because of the increased carrier lifetime, and the lower diffusion coefficient which leads to a larger t I−of f , whereas the t I−of f is always lower for the SiC device because of the much lower carrier lifetime and the smaller dimensions of the die. Further measurements have indicated that as the collector current increases with the pulse width, the turn-OFF time further increases because of the decrease of diffusion coefficient as in (10), and the increase in carrier lifetime as in (14) at high currents. Although the diffusion coefficient of SiC is less dependent on the collector current, this is hard to observe since it was shown in (20) that the value of t I−of f is largely influenced by the square of the W B .
The temperature dependence of switching transients can also be seen in Figs. 13 and 14 for a wide range of temperatures for the Silicon and 4H-SiC BJT. The turn-ON process of Silicon BJT in Fig. 13(A) is not significantly temperaturedependent. The reason for this is that the t I−on is significantly lower than the t I−of f , hence making the temperature dependence not easily distinguishable. The collector current will asymptote to the on-state value which is the same as the original value before turning off. The SiC BJT turn-ON current transient is almost temperature-invariant as seen in Fig. 13(B). At the turn-OFF transition in Fig. 14, the Silicon BJT becomes slower at high temperatures, while the collector current increases with the delay. Therefore, the collector currents has some discrepancy with the expected value. The turn-OFF transient of the SiC BJT, however, is almost temperature-invariant as was the case of the turn-ON transient. This is due to the significantly lower minority carrier lifetime in SiC compared with Silicon, in addition to the smaller dimensions of the SiC BJT, thanks to its wide-bandgap, which leads to smaller parasitic elements and a narrow base and drift region. This means the charge required to switch the device into on-state is lower, and the follow-up extraction at turn-OFF will also be faster.   The results of Figs. 11 and 12 match well with results of the simulations in Fig. 15. Although there is some error is modeling of the oscillations by the LTSpice, the dI/dt is found to be a good match in the model. It can be seen that although the frequency of oscillations in the SiC measurements are higher than what is predicted by the simulations, the slew rates in all case of simulations are close to that of the measurements, indicting that the modelling approached commonly used for the Silicon BJTs can be applicable to the case of high voltage SiC BJTs as well.
For a high collector current caused by a long base pulse, the collector voltage starts to increase early before the current fully turn-ON, because the large junction capacitor of the Silicon BJT cannot stand the high voltage for a long period before starting to being charged. This inhibits the on-state value of the collector current, leading to a lower value than expected even with consideration of the effect of the turn-OFF delay. It must be noted that the collector current of 8 A is the maximum rating current of the SiC BJT, and can lead to its breakdown at high temperatures. Despite this, the collector current of the SiC BJTs do not experience the increase by the turn-OFF delay and are in line with the equivalent pulse width, so would be easily controllable.
The SiC die has faster voltage transients in Fig. 16 and Fig. 17 as predicted by the models. At turn-ON transients in Fig. 16, the temperature-dependent diffusion coefficient decreases the J C as in (6), leading to the prolonged voltage turn-ON period (t von ) as in (17), resulting in the slower transient in Fig. 16(B). The higher collector current can directly reduce the voltage turn-ON period in high injection level as in (17).
At turn-OFF transients shown in Fig. 17(A) and (B), turn-OFF process of the voltage is slower at high temperatures because of the temperature-dependent diffusion coefficient   (19). The slower performance is also due to the current dependence of holes diffusion constant (D p ) which also increases t v−of f . Furthermore, the stored charge in the base region (Q nB ) and collector region (Q SC ) are inversely proportionate to the diffusion coefficient, leading to more charge stored in the drift and base region, which reduces the depletion region, resulting in a smaller voltage drop at high current and temperature. The Q nB and Q SC built at the turn-ON is the same as that is to be removed extracted/recombined at turn-OFF, therefore the same trends for temperature-and current-dependence that was previously shown can also be seen in these figures.
The time taken to turn-ON and turn-OFF are shown in the Table. 4 for both the Silicon and SiC NPN BJTs. At the turn-ON transient, the t transient as in (15) of the Silicon BJT is increased with increase of the collector current as a result of the decreased diffusion constant of electrons (D n ) in high currents. The current turn-ON period (t I−on ) is also increased for the same reason. The voltage turn-ON period (t V −on ), on the other hand, decreases with collector current density (J C ) which as per (17) is the most dominant component to reduce the total turn-ON time at HLI. A faster turn-ON for the SiC BJT is predicted due to the significantly smaller dimensions of the base and drift region. In high temperatures, the transient time at turn-ON (t transient ) and current turn-ON period (t I−on ) are increased because of the decrease in the diffusion coefficient, while the decreased D n also reduces the J C and prolonging the voltage turn-ON time voltage turn-ON period (t V −on ). At the turn-OFF transient, the voltage turn-OFF period (t V −of f ) of the Silicon BJT increases as the holes diffusion coefficient D p is decreased at HLI as per (19). The current turn-OFF period (t I−of f ) also increases because the decrease in D n is dominant to the decrease of diffusion length (L n ). Nevertheless, the increase in these two terms is compensated by the reduction of charge stored period at turn-OFF (t S ), as the decreased width of conductivity modulated region (W NM ) is more significant compared to the drop of D n , reducing the total turn-OFF time at HLI. These trends hold true for the SiC BJT at turn-OFF, even with the much smaller width of the base (W B ) and storage region (W S ), which contributes to a reduction of the turn-OFF time by an order of magnitude. It is seen that the t S is much larger than the t transient since the charge depletion phase removes more carriers than those built initially. In high temperatures, the t S and t V −of f are increased because of the decrease in diffusion coefficient. Since the decrease of D n is dominant, the t I−of f are also increased. The DC current gain is also measured at the turn-ON and turn-OFF current gain [30]. The turn-ON gain at the second pulse is always lower than that of the turn-OFF at the first pulse because of the switching losses and the rating and sensitivity issue in SiC devices, especially in high temperatures as discussed earlier.
The results of the simulations [31], [32] indicate that the model match well with the measurements for both devices, representing the expected differences in the transient currents. Fig. 18 show the case of the two paralleled Silicon BJTs where the substantial current mismatch between the two devices seen in Fig. 8 is represented by the simulations, while Fig. 19 presents the results of the measurements and simulations of the case of two paralleled SiC BJTs, where the current mismatch, albeit at smaller value due to the absence of the turn-OFF delay [33], [34], is represented by both the measurements and simulations.
The switching transients' slew rates of the two device technologies indicate that the SiC device has a significant edge in terms of the switching rate over all temperatures, base resistance and collector-emitter current levels, while the numerical indications of the provided simulations have reconfirmed this advantage. To investigate the impact of transients' slew rates on switching energy, it is calculated for both the turn-ON and   turn-OFF transients by integrating the transient power over its period as (28): As can be seen in Fig 20,  The HLI leads to a damping effect on the current gain (β) as the collector current increases as shown in Fig. 21. This confirms the theory that as collector current increases the high-level-injection will eventually saturates the gain. The current level at which the HLI occurs for each BJT depends on many factors, including its die area and current rating, leading to differing levels of current density. As seen in Fig. 21, the current gain is more stable at higher current density while the gain is reduced at lower current levels. It can be seen for both the Silicon and Silicon Carbide BJTs that the gain is reduced at current levels below HLI, indicating boundary level of the high-level injection. This is particularly clear in the case of SiC BJT, where the trend of DC gain with collector current seen is very similar to that of [9]. In regard to trends with temperature, as seen in Fig. 21, the current gain of Silicon BJT is found to increase with temperature at low injection level (≤4 A), which is expected since the current gain is largely determined by the recombination in the SCR region and the SCR recombination can be overcome by the increasing injection level, so J SCR decreases at elevated temperatures as in (24). The β is larger at high temperatures because the current in the SCR region has negative temperature dependence. If the collector current continues to increase (>4 A), the DC current gain is limited primarily by the surface recombination while β increases since the diffusion current overcome the SCR recombination. With the increase of temperature at high collector currents, the lower diffusion coefficient shown in (6) leads to the fall of J W described in (25) and thus shifts the boundary level of the high-level injection to lower current levels. The current gain is also found to decrease at high temperatures because of the increase in recombination rate and the decrease in diffusion coefficient. The effect of these two parameters reduce the surface recombination current and lead to a smaller DC gain at higher temperatures. Similar trend can also be seen at the SiC device, with the trend's twist point being at 3 A, however at a significantly higher DC gain. This smaller current level is due the high current density at emitter of SiC BJT with smaller die area.

V. CONCLUSION
In this paper, high voltage measurements of dynamic transient characteristics, DC current gain, and current sharing among paralleled Silicon and 4H-SiC NPN BJTs are presented, together with comprehensive modelling and simulation analysis. The voltage and current transient times in 4H-SiC BJT are, as demonstrated experimentally, at least 10 times shorter than that in silicon BJT because of the smaller width in the base and storage region. As for the Silicon BJT, the turn-OFF time is much larger than that of the turn-ON phase because of the substantial delay. The DC current gain is found to increase with increasing collector current in both devices at low injection levels, whereas its temperature dependence is flips at higher injection levels due to the impact of holes injected into the base and emitter region and increased recombination rate. Thereby, at low injection levels the DC gain increases with temperature in both devices while at high injections levels, it decreases with temperature. The decrease of current gain observed in Silicon BJTs as a consequence of HLI is found to be less severe than the SiC device. The current sharing among paralleled BJTs to increase the overall current rating is also investigated, and it is seen that the parasitic elements of the circuit, driver, and devices make a significant impact on current imbalance. This, in turn, leads to current deviations at high temperature and different levels of current collapse at high base resistance in case of the SiC device, while the turn-OFF delay in paralleled Silicon BJTs is conversely influenced by increase of temperature and base resistance.