Enhancing Scalability of Fast Electric Vehicle Charging Stations: Solutions for AC–DC Side Integration and Regulation

This article introduces a set of innovative solutions designed to enhance the scalability of ac–dc side operations in fast electric vehicle (EV) charging stations. The proposed solutions focus on streamlining and regulating the connection process for integrating a new active front-end rectifier (AFR) with existing AFRs at the high-voltage dc-link side, without requiring detailed knowledge of their specifications, such as control algorithms, switching frequencies, topologies, and modulation techniques. Neglecting these specifications can result in significant adverse effects, particularly on grid currents within the ac–dc side of the charging station. Conversely, these specifications have minimal impact on the dc–dc side. Therefore, this article primarily concentrates on addressing the scalability challenges associated with the ac–dc side of fast EV charging stations. Experimental analysis is conducted to assess the consequences of underestimating any specification, followed by the proposal of a general solution to compensate for or reduce each effect. The proposed methods effectively address the critical demand for scalability in fast EV chargers. Furthermore, these techniques are implemented using low-cost microcontrollers and validated experimentally through the utilization of three parallel-connected AFRs.


I. INTRODUCTION
Recently, power electronics converters have been increasingly employed in many industrial applications especially in the fast electric vehicles (EVs) charging stations [1], [2].EV charging station consists mainly of a high-or low-frequency isolation transformer, ac-dc converter, which is usually called active front-end rectifier (AFR) and is responsible to regulate the high-voltage dc-bus (HVdc), and a dc-dc converter responsible to regulate the low-voltage dc-bus (LVdc).Usually, multiple parallel converters are used as a solution for the higher power rating chargers [3], where a single converter cannot usually fulfill the power requirements of medium-or heavy-duty EVs.In general, EV charging station consists of isolation transformer, which can be low frequency or high frequency [as shown in Fig. 1(a)], ac-dc converter, and dc-dc converter.Numerous infrastructures and approaches were proposed for interfacing these units [3], as shown in Fig. 1, given in the following.
1) Stand-alone station [see Fig. 1(a)], where each AFR is connected in series with a dc-dc converter having a single split input and a single split output [3].2) LVdc-coupled station [see Fig. 1(b)], where dc-dc converters are connected in parallel with separate dc inputs and a common dc output [4].3) HVdc-coupled station [5], [6], [see Fig. 1(c)], where AFRs are connected in parallel with a common ac input and common dc output.4) HVdc and LVdc-coupled stations [see Fig. 1(d)], where the AFRs at the HVdc-bus and the dc-dc converters at the LVdc-bus are connected in parallel with common dc input and common dc output.The HVdc-coupled strategy has the benefit of using a single link to the utility through the central AFRs.This offers the advantage of the load diversification brought on by different EV battery capacities.Moreover, the lack of reactive power in dc systems, which makes control easier, is an additional advantage of HVdc-coupled systems.In addition, partial-power converter can be used as an interface between the dc-bus and the vehicle in HVdc-coupled systems, which represent another benefit.The partial power converters reduce converter ratings and cost while increasing conversion efficiency by merely processing a portion of the power supplied to the EV.Due to the advantages of the HVdc-coupled stations, it is adopted in this study.To achieve this infrastructure for higher power ratings, multiple parallel AFRs are usually employed.However, numerous challenges are associated with such solution, such as circulating currents [7] and power sharing problem [8].Moreover, if one of the AFRs is not operating symmetrically with the others, multiple critical problems will appear, such as higher circulating currents, steady-state errors, higher overshoots, and deteriorated power quality.These problems can be avoided by using symmetrical converters, control algorithms, switching frequency, sampling time, modulation techniques, and a uniform topology for all of the connected converters, which can be achieved during the design of such system.However, it is very difficult to avoid these problems when a new AFR is added to the existing system.This challenge occurs due to the absence of exact knowledge of the running AFRs' specifications.Moreover, after installing the charging system, additional symmetrical converters may not be available commercially in the markets and the original AFRs may be degraded.Therefore, installing alternative converters with similar or different power ratings may be needed.In this case, multiple problems will appear as the new AFR is not symmetrical with the others.
In the literature, some of these problems were studied extensively especially the circulating currents.Some of the researchers proposed hardware-based methods to deal with such currents [9].In this method, the circulating currents were eliminated by adding an interfacing circuit at the output of each converter.The interfacing circuit consists of four power switches, two inductors, four diodes, and some digital logic ICs.Although the proposed method does not add high computational load to the control process, it is considered very expensive and increases the complexity of the hardware design.Moreover, such interfacing circuits limit the functions of the converter especially the bidirectional power flow.
Other researchers focused on dealing with circulating currents by advanced control and switching techniques.Model predictive control (MPC) technique was proposed in [10] to control parallel-connected T-type rectifiers.The proposed MPC method was able to deal efficiently with the circulating currents, but all of these converters must use the symmetrical MPCs and switching vectors.Therefore, the MPC will fail to eliminate the circulating currents when any converter uses a different controller or modulation technique.The combination between the proportional-integral (PI) and proportional-resonant controllers was employed in [11] to reduce the circulating currents of parallel-connected converters.However, the controller was able to eliminate the circulating currents when the converters share a common dc link, but separate ac inputs.Moreover, the symmetrical controllers and gains must be used in all converters.The inverse-impedance predictive control was proposed in [12] to control multiple grid connected converters.The proposed method offered reducing the circulating currents even if the parallel converters have different power ratings.This was done by equalizing the converters' terminal voltages.Although this method offered a great advantage, equalizing the terminal voltages must be synchronized for all converters.If one of the converters is faster than the others, the circulating currents will appear due to the instant voltage difference between the converters.Moreover, this solution is valid only when all converters work as a dc-link forming.However, in most of the industrial applications that require parallel AFRs, one of them works as a dc-link forming while the others work as a dc-link following.Usually, the following converters have no voltage regulation control loop, which limits the applicability of this technique.
Numerous advanced control algorithms were proposed in the literature to enhance the response of the AFRs, such as sliding mode control (SMC) [13], passivity based control [14], MPC [15], HÝ [16], disturbance-rejection control [17], self-tunning control [18], and others [19].However, all these methods are required to implement symmetrical control techniques for all converters.
A suppressor for the low-frequency components of the circulating currents was proposed in [20] for (n) of parallelconnected converters.The proposed method contains n-1 zero-sequence control loops.However, the design of such method is very complex especially when there are multiple parallel converters.A circulating currents optimization technique was proposed in [21] for modular multilevel converters.This method is based on controlling the amplitude and the phase angle of the circulating currents and forces them to follow a specific optimal reference.In spite of the high efficiency of such method, it depends on considering the circulating current as a controlled state that can be modeled and controlled.Theoretically, this is true, however, if each converter uses a different control algorithm or different switching technique, it is difficult to predict the behavior of the circulating currents, especially if the designer does not know what techniques are used with the other converters.Other researchers developed new modulation techniques to avoid such issue as in [22].However, all converters must use the same modulation technique, otherwise, the circulating currents will appear.
Although circulating currents problem was studied extensively, to the best of the authors' knowledge there is no study addressing the circulating currents that results from using different modulation techniques in each of the parallel-connected converters.Moreover, there is no work that addressed the problem of scalability of such structure.The challenges of the scalability issue can be summarized in the following four points.
1) Added converters could be designed by different companies, so the specifications of the converters could be different.
2) The control algorithm of the added converters could be different.
3) The modulation technique could be different.4) Converter's topologies could be different.These challenges are critical for the industrial applications, therefore, this proposed article effectively responds to those challenges.This article proposes novel solutions for the mentioned challenges and offers systematic steps toward a scalable HVdc-coupled infrastructure.These solutions are adaptive grid currents synchronized regulation, coupling effects between paralleled converters observation and compensation, and a hybrid-modulation technique.controllers and that can be implemented on a single microcontroller.The rest of this article is organized as follows.System description and the symmetrical controller design are shown in Section II.Section III presents the adaptive method for grid currents synchronized regulation.The couplingeffects observer is introduced in Section IV.Then, the proposed adaptive-hybrid modulation technique is discussed in Section V.The experimental results is presented in Section VI.Finally, Section VII concludes this article.

II. SYSTEM DESCRIPTION AND CONTROLLER DESIGN A. SYSTEM DESCRIPTION
The circuit diagram of the adopted parallel-AFRs structure is shown in Fig. 2. The structure consists of three controlled rectifiers, two of them (AFR2 and AFR3) are symmetrical two-levels converters.The third one (AFR1) is a three-level T-type converter.All AFRs have common ac input from the utility grid and common dc output that feeds the HVdc-bus.
AFR3 acts as a master-AFR and is responsible of the dclink voltage regulation using a PI controller.The PI controller computes the reference current required to force the dc-link voltage to diverge to the desired value.Its output is considered a reference current and transmitted periodically to the other AFRs that act as slaves.Then, the slaves support the HVdc link with the required current based on their power sharing ratios.The symmetrical AFRs depend on the SMC proposed in [13] due to its simplicity, ability to deal with uncertainty, and robustness.On the other hand, AFR1 depends on SMC in some experiments and PI in the other experiments to show the effect of using different controllers.
As shown in Fig. 2, each converter is connected directly to HVdc link, and through a three-phase L-filter (L i ) to the ac grid.The dynamic model of the ac side of each converter can be represented as follows [17], [23]: or in the dq frame as follows: The dc-side dynamics are as follows: where T is the vector of grid voltages, T is the vector of grid currents, V d , V q , I d , and I q are the grid voltages and currents represented in the dq frame, T is the vector of poles' voltages, R l represents the resistance of the load attached to the HVdc link, and L i and R i are the inductance and the resistance of the input filter, respectively.

B. CONTROLLER DESIGN
To regulate the dc-link voltage, the PI controller is used to compute the reference current as follows: where I * is the grid reference current, V * dc is the reference dclink voltage, K p is the positive proportional gain, and K i is the positive integral gain.Equation ( 5) is then used with the power sharing ratio (R i ) and the SMC as follows [24]: where

III. ADAPTIVE GRID CURRENTS SYNCHRONIZED REGULATION
When one of the converters is controlled by a different control technique, its dynamic behavior will be different too.A different controller may be faster or slower, has a higher or lower overshoot, less or more steady-state error, and less or more response settling time.These problems will also appear even if the same control technique is used for all converters but with different gains or topologies, which would deteriorate the response of each converter as follows.

A. HIGHER OR LOWER OVERSHOOT
If one of the converters has less overshoot than the others, this means its output will be less than the others at the instant of overshooting.Therefore, a fraction of the power will flow from the other converters to the different one.This increases the circulating currents through the different converter and vice-versa.

B. HIGHER OR LOWER STEADY-STATE ERROR
Although steady-state errors can be eliminated easily for stand-alone converters, it becomes critical in the parallelconnected converters.In such systems, the reference power is calculated based on the rated powers of the added converters.
If one of them has a higher steady-state error, then it will not share assigned amount of power.Therefore, another converter must compensate the difference.Therefore, the compensating converter will share its rated power in addition to the steady-state error power of the other converter.This means the compensating converter may share more power than its rated leading to faster degradation and making it more susceptible to faults.

C. FASTER OR SLOWER
If one of the converters is faster than the others, it will reach the steady state before the others.As the reference current signal is usually generated using a PI controller, the reference current will keep increasing (due the integral action of the error signal) until the steady-state error approaches zero.Therefore, the current of the faster converter will keep increasing until all other converters reach the steady state.When all of them reach the steady state, the sum of all currents shared by all converters must equal the reference current.Then, the output of the PI controller will be almost constant.Therefore, the faster convert will keep sharing currents higher than the others.Therefore, it will be degraded faster, has higher losses, and has higher temperature stress than the other converters.These problems become more and more critical in higher power applications, which negatively affect the reliability and the power quality of the entire system.Therefore, an adaptive synchronization algorithm must be used to uniform the dynamic behavior of all controllers regardless the topology or the controller used.Therefore, this article effectively responds to this challenge.This section presents a novel technique for generating a synchronized reference current to guarantee a uniformed dynamic behavior among all converters.The main purpose of this solution is to synchronize the regulation process of the shared currents for all converters especially during transients.This method significantly reduces the effects of using different control algorithms, different gains, and different topologies.
Traditionally, the current reference (I * dq ) is generated by the master in the dq frame as a function of the error of the dc-link voltage.This signal is then sent to all converters, each controller will track the reference based on converter's specifications.To ensure a synchronized response for all of the connected rectifiers, the generated reference signal must be a real-time one and forces all converters to respond as a function of time.The generated reference signal must also ensure that all converters will start, stop, and respond timely.Therefore, the reference current is converted into a time-variant function that is capable to describe the amplitude, transient time, tracking speed, and the acceleration of each converter.Therefore, there are six constraints that must be achieved during current regulation to ensure that all converters have synchronized behavior where I * 0 is the initial reference current before the transient, t 0 is the initial time at the instant just before the start of the transient, and t f is the desired transient time.
To fulfill these constraints, the current trajectory must be selected as a polynomial function of time that has six parameters.A general form of a time-variant function with six parameters can be represented by a fifth-order polynomial where a 0 -a 5 are the constants controlling the transient period (i.e., they need to be computed each time I * is changed).To compute the values of these constants, the first and second derivatives of ( 13) should be computed By substituting the constraints (10)-( 12) in ( 13)-( 15), the constants a 5 -a 0 can be computed as follows: The solution of ( 16) is solved assuming that the transient will always start at t 0 = 0.This can be done simply be resetting the internal timer of the master microcontroller whenever the reference current is changed.

IV. COUPLING EFFECTS OBSERVER
Parallel converters have variable effects on each other, for example, if one of the converters has larger settling time than others, the other converters will reach the steady state earlier and smoother.However, the total current of the grid will have oscillation because it is a function of all converters' currents.This will increase the ripple of the dc-link voltage, which triggers the dc-link voltage controller to generate a fluctuating reference current.This leads to instability issues and deteriorates the response of the entire system.Moreover, the circulating currents are considered the most severe coupling effects between paralleled converters.
There are the following challenges that should be considered.
1) The connected converters may be nonsymmetrical, which makes the problem more complex.2) Nonsymmetrical switching mechanisms, which make each converter work in a different way.3) State observers, estimators, and Kalman filters cannot be used as they depend on the availability of all parameters and measurements.However, in this system, the new-connected converter knows nothing about other converters.4) Time complexity required to share data between converters if there are many connected devices.5) Huge data traffic is needed to share the information required to solve coupling effects between parallel converters.6) Applicability of such solution on an industrial low-cost microcontroller.7) Uncertainties of parameters and operating conditions.8) The necessity of an online and fast compensation of the coupling effects.To eliminate the coupling effects between paralleled converters and overcome the challenges, a novel communicationless coupling-effect observer is proposed [25].The proposed observer depends on comparing the discretized mathematical model and the actual measurements.To this end, (1) can be discretized using Newton-Euler forward approximation method as follows: where Îiabc (k + 1) is the expected currents at the instant k + 1.However, due to the parallel connection and the coupling effects between the converters, (17) becomes invalid, especially due to the power sharing ratios.Therefore, more accurate model must be presented.In fact, it is very difficult to define an explicit dynamic model for all of the connected rectifiers and how they affect each other.Moreover, too many details and information should be shared between converters to identify such effect.
To solve this problem, ( 17) can be extended as follows: where CE j i is the effect of the jth converter on the ith converter.Therefore, N j=1 CE j i represents the total coupling effects influencing on the ith converter.
Indeed, the coupling effects encompass all unmodeled dynamics, uncertainties, and disturbances, rendering them inherently without precise values.Nevertheless, they can be expressed as a combination of uncertainty effects originating from passive parameters ( R and L), potential circulating currents from other converters, and any additional unmodeled dynamics, as outlined below: Although it is very difficult to estimate the effect of each single converter (on the ith one), it is possible to estimate the total effects on the ith converter using (18).In this section, a solution is proposed to estimate and compensate such effects based on the recursive least squares (RLS) method.
In (18), the instant of k + 1 can be considered as the current instant, while the k can be considered as the previous instant.Therefore, (18) can be rewritten as follows: Equation ( 20) reveals that the estimation of the total coupling effects is possible because of the following.1) I iabc (k) is obtained from the current sensors at each program-cycle.2) I iabc (k − 1) is stored from the previous cycle.
3) V iabc (k − 1) is obtained from the voltage sensors at each program-cycle.4) u iabc (k − 1) is generated internally by the control law (6).This leads to the conclusion that the system is observable and has a full-rank observability matrix.Therefore, ( 20) can be written in the general form of RLS as follows: In (21), δ represents the unknowns vector, and is the measurements vector.The vector δ can be then estimated using RLS algorithm as follows [26]: where ϕ is the measurements vector, I is the identity matrix, K is the estimator gain, δ is the estimated parameters matrix, ε is the estimation error, and P is the error covariance matrix.
As the sampling time is considered well-known, L i and R i are known but with possible uncertainty ( L i and R i ), a reasonable and efficient initialization of δ(0) can be done as follows: Such initialization provides the advantage of fast divergence of δ to the true value.Moreover, if L i and R i have uncertainties, the uncertainty will be considered as unknown, and by default, will be included in the CE i i term, which represents the uncertainty effects of the converter.This increases the stability and the robustness of the control algorithm against parameters uncertainty.
To compensate the effects of the coupling effects, the estimated N j=1 CE j i can be added directly to the control law.Furthermore, if it is desired to eliminate these effects within a specific time trajectory, this term can be considered as a controlled state and its reference signal is always zero.In such case, it is reasonable to use a linear quadratic regulator (LQR) as its objective is to force a controlled state to diverge to zero.Therefore, the compensation of the coupling effects can be converted into an optimal linear-control problem, and can be formulated as minimize where J is the performance index.Finally, by adding ( 27) to ( 6), the control law can be extended to include the coupling effects compensation controller as follows: where U iabc is the total control signal, u iabc is the sliding mode controller, k LQR is the LQR controller's gain, and can be computed using Riccati equation.

V. DIFFERENT MODULATION TECHNIQUES
For low-cost microcontrollers, two modulation techniques are popular, sine pulsewidth modulation (SPWM) and space vector pulsewidth modulation (SVPWM).These methods are widely used because they are simple and depend on constant frequency and variable duty cycle PWM technique, where the PWM is available in almost all kinds of microcontrollers.However, when one of the converters adopts SPWM and another one adopts SVPWM, the circulating currents will increase.Circulating current is defined as the difference between each phase current and the corresponding phase current of the other converter, and can be written as follows [9]: where I j iCC is the circulating current flowing from the ith converter to the jth converter, R i and R j are the power sharing ratios for the ith and jth converters, respectively, and y ∈ [a b c].
For identical power ratios, the total circulating currents between two converters (i and j) are defined as the summation of circulating currents though each phase By substituting (29) in (30), the explicit formula of the total circulating current can be written as To understand what causes such increment, it is worth classifying the circulating current paths into symmetrical switching states and nonsymmetrical switching states, as shown in Fig. 3, as a case example.The circulating currents are mainly generated due to the voltage difference between the paralleled legs.When the two paralleled converters are controlled using different frequencies or different modulation techniques, the difference between poles' voltages will be increased periodically.An example of this case is shown in Fig. 4. In Fig. 4(a), the SPWM is used for both AFR2 and AFR3.However, each one has different frequency.In this case, each converter has different pole's voltage most of the time even when the same control signal is applied.It can be noticed that at time 0.6 × 10 −4 , the pole's voltage of the phase A in AFR2 is almost zero, while it is about -0.6V in AFR3.Moreover, the same problem occurs when different modulation techniques are used, as shown in Fig. 4(b).This problem becomes more severe when both the frequency and the modulation technique are different for each AFR.Based on the hardware observation, it was concluded that such issue affects mainly the current balance of each converter.Traditionally, the sum of currents of each phase ( i iabc =i ia + i ib + i ic = 0) of the ith AFR is almost zero.However, when different modulation techniques are used, the summation of the currents becomes nonzero ( i iabc = 0), as shown in Fig. 5.It can be noticed that i 2abc is severely oscillating, which deteriorates the power quality of entire system.To solve this problem, the i iabc is assumed to be a controlled state that must track a zero-reference signal.Then, a hybrid modulation technique is introduced as follows; where PWM O is the hybrid PWM output, u i j is the control signal of the phase i in the AFR j, and λ is the hybrid weighting factor and can be determined by i iabc as follows: where LQR is a linear quadratic regulator, 0 ≤ λ ≤ 1.Therefore, when λ = 1, the modulation technique will act as SPWM, SVPWM when λ = 0, and a hybrid technique when 0 < λ < 1.The effects of changing λ are illustrated in Fig. 5.As λ approaches 1, it forces the modulation technique to be shifted from SVPWM to SPWM, such that, the modulation techniques of both AFRs become fit together.Therefore, (33) acts as a different modulation compensator (DMC).
If the previously connected AFR does not support this feature, the new connected AFR will take the responsibility to minimize the summation of the currents, and the adaptation of the modulation technique until it fits with previously connected one.If both of them support the hybrid modulation technique, then both will share the responsibility to minimize the summation of the grid currents and the adaptation of their modulation techniques.
If (32) fails to force i iabc to diverge, the frequency must be employed to achieve this task.Similar to (33), the switching frequency of the ith AFR ( f is ) can be increased or decreased based on i iabc as follows: where K i is a positive integral gain, and it is multiplied by -1 because the reference signal is always zero.Therefore, (34) acts as a different frequency compensator.By using (32) and (34), the effects of frequency and modulation techniques difference will be eliminated by the online adaption of the hybrid modulation technique and the switching frequency based on the error of i iabc .
The flowchart of the sequence of applying the proposed techniques is shown in Fig. 6.

VI. EXPERIMENTAL RESULTS
To validate the effectiveness of the proposed solutions and prove their feasibility, the solutions are implemented experimentally on a lab-scale prototype, as shown in Fig. 7.The prototype consists of three parallel connected AFRs.Each AFR has its own local controller that is based on STM32H745 low-cost microcontroller.All AFRs are connected to the ac

TABLE 1. Experimental Parameters
grid through L filters, while their outputs are connected to the dc link through manual switches.The hardware setup also includes an oscilloscope, a regenerative grid emulator, and a programmable electronic load.The parameters used in the hardware prototype are listed in Table 1.
In the first experiment, the controllers and topologies are identical.However, the first converter depends on 10 KHz SVPWM to generate the switching pulses of the switches, while the other two converters depend on 50 KHz SPWM.The effect of using different frequencies and modulation techniques is shown in Fig. 8.It can be noticed that using different frequencies and modulation techniques has severe impact on the power quality.Although the dc-link voltage is not affected,  the quality of the grid currents is deteriorated.Their total harmonics distortion (THD) values are significantly higher than the limits specified by the international standards [27], the currents are not sinusoidal, and the power factor is far from unity.However, when the DMC is enabled, the power quality is restored immediately.As a result, the THD is significantly reduced, the currents become sinusoidal, and the power factor becomes unity, as shown in Fig. 9.
To show the effect of using different controllers, the controller of the first converter is changed to PI.The PI controller is designed intentionally to be slower than SMC.As expected, a huge steady-state power sharing error appears in the first converter, and a significant power sharing increment appears in other two converters, as shown in Fig. 10.Moreover, Fig. 11 shows that the consequences will propagate, and the power sharing error will increase during the transient period.In addition to power sharing error, the leg voltages will be different during transient period, which triggers the circulation currents to flow extensively in the slower converter.Fig. 12 shows a zoomed current behavior for phase A of each converter.It can be noticed that the second and third converters share almost twice the power shared by the first one.Moreover, a small phase shift appears between their currents, which slightly increased due to the transient interval.This problem is solved efficiently when the synchronized current regulation is employed, as shown in Fig. 13.
Although the control algorithm is different, the converters are operating synchronously, equal power sharing with almost zero tracking error, the currents are sinusoidal, and the power factor is unity.Moreover, Fig. 14 shows the response of the synchronized current regulation during transient period.It can be noticed that the power is shared equally among the     Finally, the coupling effects observer is implemented and its ability to eliminate the circulating currents is validated.To increase the level of challenge, the observer is validated in the condition that converter 1 is using a different modulation technique.Fig. 16 shows the behavior of the circulating currents without and with enabling the proposed solutions.The circulating currents are computed based on (29) for phase A of the three converters, and similar results are obtained for the other phases.
It can be noticed that the circulating currents are significantly increased due to the nonidentical modulation techniques.I 2 1CCa and I 3 1CCa are significantly larger than zero as converter 1is using a different modulation technique.However, it can be noticed that I 3 2CCy is almost not affected as both converters 2 and 3 are identical.When the proposed solutions are activated, the currents become synchronized, equal, sinusoidal, and the circulating currents between all phases are eliminated efficiently.This proves the ability of the proposed solutions to enhance the scalability, robustness, and reliability of the charging process control.

VII. CONCLUSION
This article proposed multiple novel techniques to enhance the scalability of HVdc-coupled EV charging stations.The effects of different control algorithms, topologies, switching frequencies, and modulation techniques were discussed, observed, and overcame using the proposed adaptive synchronizedcurrent regulation and the adaptive hybrid modulation technique.Moreover, the coupling effects between paralleled AFRs are discussed, analyzed, estimated, and compensated by the proposed coupling effects observer.The proposed solutions ensure timely and smooth response with good power quality operation of the charging system even when the converters have different parameters and specifications, which represent a crucial need to support the fully electrification of transportation sector.The proposed solutions are simple, have low computational power requirements, and are not sensitive to parameters uncertainty.Moreover, they offer the advantages of inclusivity, applicability to low-cost industrial microcontrollers, and do not require any additional hardware components.These advantages offer higher reliability, efficiency, scalability, and robustness of the charging process.

FIGURE 2 .
FIGURE 2. Circuit diagram of the considered system.

FIGURE 3 .
FIGURE 3. Possible circulating current paths examples between in phase A of AFR2 and AFR3.(a) Similar switching states of the leg A. (b) Different switching states of the leg A.

FIGURE 4 .
FIGURE 4. (a) Effect of different switching frequencies.(b) Effects of different modulation techniques.

FIGURE 6 .
FIGURE 6. Flowchart of the proposed techniques.

FIGURE 10 .FIGURE 11 .
FIGURE 10.Response of the system for different controllers at steady state without current synchronization.

FIGURE 12 .
FIGURE 12. Current mismatching due to using different controllers without synchronized current regulation.(a) Steady-state currents of phase A of each converter.(b) Transient currents of phase A of each converter.

FIGURE 13 .
FIGURE 13.Response of the system for different controllers at steady state with current synchronization.

FIGURE 14 .
FIGURE 14. Response of the system for different controllers at transient with current synchronization.

FIGURE 15 .
FIGURE 15.Current mismatching due to using different controllers with synchronized current regulation.(a) Steady-state currents of phase A of each converter.(b) Transient currents of phase A of each converter.

FIGURE 16 .
FIGURE 16.Circulating currents of phase A of the tree rectifiers.(a) Without the proposed solutions.(b) With enabling the proposed solutions.