Power Self-Synchronization Control of Grid-Forming Voltage-Source Converters Against a Wide Range of Short-Circuit Ratio

Power synchronization control (PSC) tends to destabilize the voltage source converter (VSC) connected to the stiff grid. To address this issue, this paper proposes a novel control scheme named power self-synchronization control (PSSC), which enables VSC to operate under grid conditions with a short circuit ratio from 1 to infinity. Similar to PSC, the proposed method also includes a power synchronization loop, voltage control loop, and current control loop. Yet, PSSC-based VSC(PSSC-VSC) can be self-synchronized to the grid without three-phase grid voltage detection. In PSSC, the output of the current control loop is fed back to calculate the instantaneous power, which is applied in the power synchronization loop. By the eigenvalue analysis, participating factor analysis, and impedance-based analysis, the control parameters of PSSC are well-designed, and the robustness of VSC under different grid conditions is improved. Moreover, PSSC-VSC inherits the characteristics of the grid-forming converters, and the theoretical analysis for the proposed method is validated by experimental tests.


I. INTRODUCTION
D IFFING from the synchronous machines, the voltage source converter (VSC) is generally synchronized to the grid by digital control schemes rather than relying on the inherent swing equation [1].The grid synchronization methods for VSC can be classified into two categories, i.e., the grid-following control and the grid-forming control [2].Peng Wang, Junpeng Ma, Rui Zhang, Shunliang Wang, and Tianqi Liu are with the College of Electrical Engineering, Sichuan University, Chengdu 610031, China (e-mail: peng_wang@stu.scu.edu.cn;jma@scu.edu.cn;rui_zhang@stu.scu.edu.cn;slwang@scu.edu.cn;tqliu@scu.edu.cn).
Zihao Wu and Ruogu Wang are with the Electric Power Research Institute of State Grid Shaanxi Electric Power Corporation, State Grid Shaanxi Electric Power Company, Xi'an 030001, China (e-mail: woozihao@gmail.com;xiopaul@sohu.com).
Color versions of one or more figures in this article are available at https://doi.org/10.1109/TPEL.2023.3314397.
Digital Object Identifier 10.1109/TPEL.2023.3314397 For the grid-following control, the phase angle of the voltage at the point-of-common coupling (PCC) is estimated for synchronization, where the phase-locked-loop (PLL) plays a vital role in the grid synchronization of the VSC [2].The stable operation of the VSC controlled as current sources relies on a stiff grid condition [3], [4], and the power transfer capability of the VSC by vector current control adversely degraded to 0.4 p.u. as short circuit ratio (SCR) is degraded to 1 [5].To analyze the instability mechanism of the grid-following converter under weak grid conditions, the small-signal impedance of three-phase grid-connected inverters with PLL in the synchronous frame was derived.The small-signal model of VSC verifies that q-q channel impedance behaves as a negative incremental resistor due to the PLL [6], [7].Drawing on the damping torque analysis in synchronous generators, the influence of PLL on damping torque is investigated, demonstrating that the PLL provides negative damping torque in the low-frequency band under weak grid conditions [8].From the perspective of small-signal stability, it is revealed that the high bandwidth of PLL provides an obvious negative damping effect in the low-frequency range, which destabilizes weak ac systems [9], [10], [11].
However, the grid-forming converter may suffer from smallsignal instability in stiff grids [12].According to [13], the four typical grid-forming control schemes can be categorized into two types: one is the non-inertial grid-forming control, including the power synchronization control (PSC) and the basic droop control, and the other is the inertial grid-forming control, including the droop control with low-pass filters (LPFs) and virtual synchronous generator (VSG) control.The impedance model of droop-controlled VSC in the stationary frame is derived in [14], and it is drawn that the stability issue of droop-controlled VSC is more prominent in the stiff grid according to the impedancebased stability analysis.Similarly, the small signal model of droop-controlled VSC is derived to obtain a pole map, which verifies the stability of the VSC gets worse as the SCR increases [15].Additionally, [16] derives the small-signal model of the VSG-based VSC, which reveals a pair of conjugate poles near the imaginary axis in stiff grids, leading to system instability.
A novel PSC method for VSC was proposed in [17].The Jacobian transfer matrix of the VSC-HVDC system with the PSC method for the interconnection of two very weak systems is obtained for stability analysis [18].Differing from the vector current control, the SCR of the ac systems are not limiting factors by the PSC method but rather the load angles [19].Besides, it is revealed that the PSC-based VSC (PSC-VSC) presents stronger robustness under weak ac conditions in terms of the Nyquist criterion and singular value analysis [20], [21], [22].The research hitherto about the PSC concentrates on the system stability under weak ac systems and neglects the risk of instability in stiff grids.
According to [23], for the interactive instability issue between the grid-forming converter and ac grid, it is specially manifested as sub-synchronous oscillation.To address the instability issue, Li et al. [24] proposed the dual-mode control strategy with grid impedance adaptation for droop-controlled VSC.The inverter operates at the current source mode when the grid impedance is low, and it switches to the voltage source mode as the grid impedance is large.Furthermore, the D-partition method is utilized to obtain the switching boundaries of the grid impedance for the dual-mode control strategy under the constraints of multiple indexes [25], [26].Therefore, the dual-mode control strategy is too complicated to be implemented in the practical project for the following reasons.
1) The precise switching boundary of SCR must be obtained.
Otherwise, it may lead to incorrect mode switching.
2) The grid impedance should be accurately identified, and a slight inaccuracy may lead to an inappropriate switching control strategy.3) Auxiliary control strategies, i.e., current phase and current amplitude synchronization control, are required to achieve seamless switching between the grid-following control and grid-forming control.Another feasible way to address the issue is the virtual impedance method, which equivalently reduces the inverter output impedance by the converter control algorithm [27].Yet, the voltage quality will be impacted since the method equivalently reduces the reference voltage.Moreover, although the virtualimpedance method can effectively damp the resonance near 50 Hz, the resonance at a lower frequency is introduced, which will jeopardize the system robustness as SCR continuously increases [28].To eliminate the effect of the virtual-impedance method in a lower frequency band, a power dynamic decoupling controller is proposed in [28], which also relies on the estimated grid impedance.Actually, the power transmission of grid-forming control-based VSC depends on transmission line impedance [18].Under strong grid conditions, the phase difference between the PCC voltage and grid voltage approaches 0 °, and the system is still prone to instability.
Recently, a universal controller with the combinations of grid-following and grid-forming control has been proposed to enhance the stability against different SCRs by regarding PSC as a guideline for robust grid-following controller design [29].Yet, the controller has a limitation on the gain selection of general alternating voltage control (AVC), which may induce a low-frequency power resonance under weak grid conditions, particularly when the SCR approaches 1 [30].Thereby, only the dual-mode control strategy can maintain system stability with large fluctuations of SCR.However, it is rather complicated to be implemented in practical projects.
To address the oscillation issues of grid-forming converters under a wide range of SCR, this article proposes a novel and practical control strategy named power self-synchronization control (PSSC), where the modulating voltage is approximated as the VSC output voltage, not PCC voltage.Compared with the existing stability improvement strategies for grid-forming converters, the superiorities of PSSC are reflected in the following aspects.
1) Remarkably simple control structure.Compared to the traditional dual-mode control in different SCRs, the proposed strategy is independent of the grid impedance and the precise switching boundary of SCR, and the auxiliary control strategies for seamless switching are eliminated.
2) The broadband oscillation suppression.PSSC can effectively suppress oscillation with arbitrary SCR and provide positive damping within a broad frequency band.3) Operation without voltage sensors.Grid-forming control can be achieved by PSSC, and the voltage and frequency can be actively supported without voltage sensors.4) Avoid the use of filter capacitors.The PSSC can be implemented without a filter since the sampling voltage at PCC is not required, which prevents the resonant stability issues caused by the filter capacitor and line inductance.It is noted that PSSC endows the feature of voltage senseless control, which can be categorized as virtual flux control [31] and observer-based voltage control [32].Nonetheless, the existing voltage sensorless control strategies are unable to improve the reactance value for transmitting active power at the circuit level.Thereby, the traditional voltage sensorless control directly applied to grid-forming converters cannot address the instability issue.
The rest of this paper is organized as follows.In Section II, the impedance models of PSC-VSC and PSSC-VSC in the complex plane are derived, which are used for stability analysis.In Section III, the small-signal model of the PSSC-based VSC (PSSC-VSC) is derived, which is verified by the time-domain simulation.In Section IV, by eigenvalue analysis, participating factor analysis, and impedance-based analysis, the designing method of controller parameters is elaborated.The practicality of PSSC-VSC is analyzed in Section V, and the experimental tests are performed in Section VI to validate the theoretical analysis.Section VII concludes this article.

A. System Description
A typical three-phase grid-connected PSC-VSC is shown in Fig. 1 with the single-line representation.L f and L g represent the filter inductor and the transmission line equivalent inductor, respectively.v i , v oabc, and v g are the VSC output voltage, PCC voltage, and grid voltage in the stationary frame, respectively.v dc is the dc voltage.i abc and i oabc are the VSC output current after the filter inductor and filter capacitor in the stationary frame, respectively.The subscript dq denotes the variables in the dq-frame.v dqref , v odqref , and v oref represent the input voltage reference of an inner control loop and the modulated voltage in Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.the dq-frame and the stationary frame, respectively.It is worth noting that the filter capacitor C f is essential to eliminate the voltage harmonics at PCC. Thereby, the sampled voltage at PCC can be guaranteed to be the average value, especially under the weak grid condition.
As shown in Fig. 1, the controller is implemented in the dqframe, and it is divided into two parts, where the PSC is used for the power synchronization in the outer control loop and the dualloop control, which includes voltage control loop and current control loop, is utilized to regulate voltage in the inner control loop.

B. Inner Control Loop and Outer Control Loop in PSC-VSC
Drawing on the concept of complex vector proposed in [10], the variable in αβ-frame or dq-frame, i.e., x αβ and x dq can be expressed as a complex vector by where the bold letters denote the complex space vectors.Consequently, the inner control loop can be depicted in Fig. 2, where the input signals are the reference voltage v dqref , the PCC voltage, i.e., v odq, and the filter inductor current i dq in the dqframe.G u (s) = k pv +k iv /s and G i (s) = k p +k r /s are the transfer functions of the voltage control loop and current control loop, respectively.
It is worth noting that AVC shown in Fig. 2 is preferred in this paper to provide the ac system with the best possible voltage support, especially in the weak ac system [17].In AVC mode, the reactive power is indirectly controlled to keep the voltage amplitude at a rated value.
For the outer control loop, the control structure is depicted in Fig. 3, where P ref and P are reference and instantaneous active power, respectively.ω 0 is the rated angular frequency, and θ is the output phase of an outer control loop.

C. Modeling of the Control Plant With the Inner Control Loop
According to (1), the Park transformation in Fig. 1 can be derived as where x αβ and x dq represent the complex vector of the current and voltage.Based on the complex vector representations, the system shown in Fig. 1 can be modified as a single-input single-output (SISO) system, as illustrated by Fig. 4, where the outer control loop is not considered.The left highlighted part shows the inner control loop in the form of the complex vector in dq-frame, and the right highlighted part describes the control plant in αβ-frame.
The transfer functions G C,αβ (s) and G L,αβ (s), which represent the transfer function of the filter capacitor and filter inductor, respectively, can be expressed as Based on the principle of the frequency translation between αβ-frame and dq-frame, G C (s) and G L (s) in dq-frame can be derived as In Fig. 4, G d (s) represents the time delay of the digital control system, and it can be expressed as where T s is the sampling period.
As shown in Fig. 4, the connector e -jθ and e jθ lead to the nonlinearity of the system model; thereby, the small-signal modeling method is utilized to linear the model.The derivations are elaborated in [10], and the linearized model shown in Fig. 4 can be depicted in Fig. 5, where the symbol Δ and subscript "0" represent the small perturbation of variables and steady-state current or voltage, respectively.

D. Impedance Model of PSC-VSC in Complex Plane
Considering the PSC loop shown in Fig. 3, the instantaneous active power can be calculated by By applying the concept of complex vector, the inspecting power can be expressed as where the superscript " * " represents the conjugates of the complex vector.Combining ( 6) and ( 7), the linearized active power ΔP can be derived as Thereby, the small-signal model of the PSC depicted in Fig. 3 can be expressed as Consequently, the impedance model of the PSC-VSC in the complex plane can be obtained by combining the inner control loop, outer control loop, and the control plant, as depicted by Fig. 6.The conj() is applied to transfer the variables into their complex conjugates vector form, and G dθ (s) is equal to 3/4×G psc (s).x 1 ∼x 14 are algebraic variables and the relationship between the input signal Δi odq and the output signal Δv odq can be obtained by solving algebraic equations.Thereby, the admittance matrix in the dq-frame can be expressed as By applying the frequency translation between αβ-frame and dq-frame, the admittance matrix in dq-frame can be transformed into αβ-frame, which can be derived as where e j2θ multiplied by complex conjugate vector introduces the frequency-coupling of VSCs.For a given vector at the frequency ω, a frequency-coupled vector at 2ω 0 -ω is introduced by e j2θ Δv * oαβ .

E. Impedance Model of PSSC-VSC in Complex Plane
As shown in Fig. 2, the integrator output of the current control loop is equivalent to v odqref as the system reaches a steady state, i.e., i dqref = i dq .Thereby, e dq is equal to v odref at the steady state, and active power can be transmitted based on the phase difference between v i and v g shown in Fig. 1, which is a significant difference from PSC-VSC.The controller structure of PSSC-VSC is shown in Fig. 7, where the self-synchronization with the grid can be achieved by the proposed PSSC strategy without the grid voltage detection.
It is noted that the controller structure is similar to that of the conventional PSC, and the impedance model of PSSC-VSC in the complex plane can be depicted in Fig. 8, where G kp (s) = k p , G ki (s) = k iv /s.Solving the algebraic equations shown in Fig. 8 also yields the admittance matrix of PSSC-VSC in dq-frame.

F. Stability Analysis of PSC-VSC and PSSC-VSC Under Different Grid Conditions
To analyze the stability of PSC-VSC and PSSC-VSC, the impedance-based analysis is utilized [14].Assuming that the impedance of VSC and the grid, i.e., Z VSC and Z grid, are Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.expressed as According to [14], the system stability can be determined by From ( 13), it is indicated that when the amplitudes of Z SISO and Z g11 intersect, the system will be destabilized if the phase difference between Z SISO and Z g11 is greater than 180°.Thereby, the stability of PSC-VSC and PSSC-VSC under different grid conditions can be analyzed based on (13).
Fig. 9 shows the stability analysis for PSC-VSC under different grid conditions, where the parameters are given in Table I.As shown in Fig. 9, the highlighted area represents the area where that system is prone to instability, and it is presented that the system will be destabilized as L g decreases, which is different from the stability issue of the grid-following converter.From Fig. 9, it is indicated that the oscillation at 49.1 Hz will occur in the PSC-VSC as L g is decreased to 1 mH.
The comparison of stability analysis of PSC-VSC and PSSC-VSC as L g = 1 mH is depicted in Fig. 10, and it is indicated  that as PSSC is applied, the phase near the original resonant point in PSC-VSC is always greater than −90°, i.e., the phase difference is always within 180°.Thereby, the PSSC-VSC can keep stable even L g is decreased to 1 mH, and the phase margin is significantly improved in PSSC-VSC, as shown in Fig. 10.
From the above analysis, the PSSC exhibits extraordinary stability performance even under stiff grid conditions since the filter inductor and the transmission line impedance are both used for power transmission.Moreover, as shown in Fig. 7, e dq is the integrator output of the current control loop.Thereby, the high-frequency components of the input can be filtered.Both in the weak and stiff grid conditions, e dq contains only a dc component, which can be utilized to calculate the power and as feedback for the voltage control loop.Thus, the capacitor filter C f in Fig. 1 is not required for PSSC-VSC, Yet C f is necessary for PSC-VSC, especially under the weak grid condition.

III. SMALL-SIGNAL STATE-SPACE MODEL OF PSSC-VSC
To ensure that PSSC-VSC can maintain stability even without grid impedance, i.e., L g = 0 mH, this section derives the small-signal state-space model of PSSC-VSC for proposing a designing method of controller parameters.The main circuit is shown in Fig. 1, where the filter capacitor is eliminated.
In this paper, the rotational angle of the synchronous reference frame is θ, which is the output of the PSC loop.In the synchronous reference frame, the linearized small-signal model of the circuit shown in Fig. 1 is derived as ( 14) [22].
It is noted that the grid voltage v gdq should be expressed in the synchronous reference frame.The relationship between the synchronous reference frame and the synchronous frame determined by the ac grid is illustrated by Fig. 11, where δ B denotes the power angle.ω com is defined as the angular frequency of the synchronous reference frame.D psc and Q psc represent the d-axis and q-axis of the synchronous reference frame, respectively.d grid and q grid denote the d-axis and q-axis of synchronous frame relying on the ac grid, respectively.
Thus, the grid voltage in the synchronous reference frame can be derived as where V g and δ B0 represent the grid voltage amplitude and the steady state of power angle, respectively.Assuming the grid angular frequency ω 0 is constant, the expression of Δδ B in (15) thereby can be deduced as where θ grid is the rotational angle of the synchronous frame determined by the ac grid.

A. Small-Signal Models of Different Controllers
As shown in Fig. 7, for the voltage control loop, the integrator output m dq is the state variable, and the dynamic model of the voltage control loop is represented by (17).The output of the voltage control loop i dqref can be expressed as (18).
By the modeling method similar to the voltage control loop, the small-signal state-space model of the current control loop in Fig. 7 can be derived as The detailed structure of the PSC loop is also depicted in Fig. 7, and the output phase θ is fed back to the Park transformation.The integrator output δ is the state variable, and the dynamic model of the PSC loop is described as where the expression of ΔP is different from that in the conventional PSC method since the calculated power is derived from the e dq rather than the measured voltage at PCC.The expression of ΔP can be derived as

B. Small-Signal State-Space Model of the PSSC-VSC
Consequently, a complete small-signal state-space model of the PSSC-VSC can be obtained by combining the dynamic models of an electric circuit, voltage controller, current controller, and PSSC as given by ( 14) to (22).Thereby, the complete small-signal state-space model can be expressed by (23), and the detailed expressions of A and B are provided in the appendix. where In order to verify the correctness of the derived small-signal state-space model, the time-domain simulation model is established in Matlab/Simulink.The system parameters are the same as those given in Table I, and the controller parameters k pv , k iv , k p , k i, and k psc are 1, 10, 1, 500, and 0.002, respectively.The validations are implemented under weak and strong ac systems, respectively.
The PSSC-VSC is connected with the strong grid as L g is set to 0.5 mH, i.e., SCR = 24, and it is connected to the weak grid as L g = 10 mH, i.e., SCR = 1.The d-axis reference voltage is imposed to a 5% step disturbance at 4 s, and the comparisons between the responses of the variables obtained by the timedomain simulation and the small-signal state-space model under the strong and weak grid conditions are illustrated in Figs. 12 and 13, respectively.
It is shown in Figs. 12 and 13 that the results obtained by the small-signal state-space model align with the simulation results, and the time-domain simulation validates the correctness of the derived small-signal state-space model.
To further validate the correctness of the small-signal statespace model, the TLS-ESPRIT (total least squares estimation of signal parameters via rotational invariance techniques) method is utilized for extracting the damping ratio and oscillation frequency from the simulation results.Moreover, the damping ratio ζ and oscillation frequency f can also be obtained by the eigenvalues corresponding to matrix A, which is derived as Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.

TABLE II RESULTS OBTAINED BY TLS-ESPRIT
where σ and ω d represent the real part and imaginary part of the eigenvalue, respectively.
When k p steps from 10 to 30 at t = 2 s, the system will lose instability as k p is increased to 30.Taking the active power as the signal to be identified, the comparison between the results obtained by TLS-ESPRIT and the eigenvalue analysis is presented in Table II.It is shown that the error between the identified results obtained by TLS-ESPRIT and the eigenvalue analysis is within 2%, which further verifies the correctness of the small-signal state-space model.

III. DESIGNING METHOD OF CONTROLLER PARAMETERS BASED ON EIGENVALUE ANALYSIS
This section proposes the designing method of parameters of PSSC-VSC.The eigenvalues corresponding to matrix A given by ( 23) are generally utilized to evaluate the system stability.The system can maintain stability only if all the eigenvalues are located in the left half plane.
According to [33], the eigenvalue sensitivity, which is respected to a certain controller parameter, can be evaluated by perturbing the controller parameter and observing the trace of eigenvalues.Fig. 14 depicts the locations of the dominant eigenvalue before and after the controller parameters step by 10%, and it is indicated that the influence of the integral gains on the eigenvalue is rather small compared with that of the proportional gains on the eigenvalue both under the stiff and weak grids.Thereby, this article mainly focuses on the proportional gains of the controllers under strong and weak grid conditions.

A. Qualitative Impacts of Proportional Gains on System
Stability With SCR = 1 and SCR = Ý Fig. 15(a), (b), and (c) reflect the impacts of k p , k pv, and k psc on the eigenvalues with different SCRs, respectively.As shown in Fig. 15, the system stability will be deteriorated both under stiff and weak grid conditions since the eigenvalue moves to the right half plane with increasing proportional gains.
It is shown in Fig. 15 that the smaller proportional gains make the system more stable both under the strong and weak grid conditions and the system stability with different SCRs, as all the proportional gains vary simultaneously, should be analyzed to obtain the boundaries of the proportional gains.The eigenvalues are determined under a certain set of proportional parameters, and the system stability thereby can be judged from the situations of the eigenvalues.Fig. 16(a) and (b) depict the stable regions with different k p , k pv , and k psc when SCR = 1 and SCR = Ý, respectively.Compared Fig. 16(a) with (b), the stable region is reduced as SCR changes from 1 to Ý, which implies that the system under a stiff grid condition is more prone to instability.
To further identify the dominant control loop, which affects the system stability under the stiff grid condition, the participating factors (PF) of all variables in (23) are derived for analysis.

B. The Quantitative Analysis for System Stability
For each eigenvalue λ i , it satisfies ( 25) and (26), where Ф i and Ψ i represent the right eigenvector and left eigenvector corresponding to the eigenvalue λ i of matrix A, respectively [34].
The PF can be expressed as (27), where φ ki and ψ ik are the kth term of Ф i and Ψ i , respectively.φ ki represents the activity of x k in the ith mode, ψ ik represents the weight of this activity to the mode, and p ki thereby can be utilized to evaluate the participation level.The PF under the stiff grid condition with SCR = Ý are given in Fig. 17, and it is indicated that the PFs of all three control loops decrease with the increase of k pv .Moreover, the PF of the current control loop remains at the maximum value under different control parameters, which indicates that the current control loop is the dominant control loop that affects the system's ability under the stiff grid condition.

C. Process of Control Parameters Design
Since the current control loop dominates the system stability as SCR = Ý, the proportional gain of the current control loop k p should be designed first to secure the system stability.According to [35], the response time of the current control loop is often designed around 10 ms, and the response time of the voltage control loop is about ten times larger than that of the current control loop.Besides, the PSC loop bandwidth should be less than 50 Hz [36], where the bandwidth is defined as the frequency that the amplitude-frequency characteristic of the closed-loop transfer function rides through −3 dB.
Furthermore, to make PSSC-VSC more robust, the phase angle of Z SISO_PSSC-VSC shown in Fig. 10 should be limited within −90°to 90°through designing parameters, and the real part of Z SISO_PSSC-VSC thereby is positive within a wide frequency band.Consequently, the system stability can be guaranteed as the characteristic of the grid impedance changes arbitrarily.
Fig. 18(a) shows the range of the parameters that satisfy the response time and impedance requirements of Z SISO_PSSC-VSC , and the details of the final determined area in Fig. 18(a  loop, k p is set to 1.7.Thereby, the stable region as k p = 1.7, i.e., S CB can be obtained by setting k p to 1.7 in Fig. 16.The expression of S CB can be written as Hereafter, in the range of CB , the parameters that limit the phase angle of Z SISO_PSSC-VSC within the range of −90°to 90°a re selected, and the determined area can be expressed as In the region shown in Fig. 18(a), the bandwidth of the PSC loop is always smaller than 50 Hz.Thereby, the final area is determined by the constraint of the response time of the voltage control loop, which can be written as Consequently, the stable region that simultaneously satisfies the response time of different control loops and impedance requirements is denoted as S 3 , as depicted by Fig. 18(a) and (b).Fig. 18(c) and (d) illustrate the phase angle of Z SISO_PSSC-VSC out of S CB_R and within S CB_R , respectively, and it is indicated that the phase angle of Z SISO_PSSC-VSC can be limited within −90°to 90°under the designed parameters.As shown in Fig. 18(b), the boundary values of k p , k pv, and k psc that satisfy the response time and impedance requirements are 1.7, 1.1, and 0.0007, respectively.The detailed designed criteria of controller parameters are presented as follows.
1) Ensure system stability: The three-dimensional operation area composed of controller parameters satisfying the system stability is determined by the eigenvalue analysis.2) Bandwidth constraints: On the premise of satisfying system stability, the two-dimensional operation area of controller parameters is further determined according to the bandwidth constraints.3) Phase limitations: To make the controller more robust, the phase of Z SISIO_PSSC-VSC is limited to −90°to 90°.
Hereafter, the final operation area of controller parameters is determined.

D. Comparison of Dynamic Performance Between PSC-VSC and PSSC-VSC
To compare the dynamic performance of the PSC-VSC and PSSC-VSC, the H 2 /H Ý norm is utilized to quantitatively analyze the overshoot in the dynamic process after disturbances [37].The H 2 and H Ý of the transfer function G(s) are respectively defined as where σ[G(jω)] represents the largest singular value of G(jω), and G(jω) H represents the conjugate transpose of the transfer function G(jω).Thereby, based on the comprehensive index J determined by H 2 and H Ý , as expressed by (32), the comparison of dynamic performance between PSC-VSC and PSSC-VSC can be analyzed as follows.
According to (22), the expression of ΔP can also be expressed as where the expressions of B p1 and B p2 are given in the appendix.Combining ( 23) and (33) yields The expression of ΔP in PSC-VSC can also be obtained by the small-signal state-space model of PSC-VSC derived in [20].It is assumed that the transfer function from ΔP to Δv dref in PSSC-VSC and PSC-VSC are G 1 (s) and G 2 (s), respectively.The index J with different proportional gains is depicted in Fig. 19.
It is shown from Fig. 19 that the index J corresponding to PSSC-VSC is always smaller than that of PSC-VSC with different proportional gains, which indicates that the PSSC-VSC exhibits superior dynamic performance than PSC-VSC.

IV. PRACTICALITY ANALYSIS OF PSSC-VSC
As shown in Fig. 7, the proposed PSSC strategy includes the current control loop, the voltage control loop, and the PSC loop, and the controller structure is similar to that of the conventional PSC.The significant difference between conventional PSC and PSSC is that the instantaneous power is calculated by the sampled grid current and the state variables e dq rather than the grid voltage for PSSC.Thereby, PSSC is categorized as grid-forming control, which can actively provide active and reactive power support for the grid.

A. Fault Ride-Through Capability for PSSC-VSC
As aforementioned, PSSC belongs to the grid-forming controller; thereby, the existing fault ride-through strategies for the grid-forming controller are suitable for PSSC-VSC.Since the sampled voltage at PCC can be replaced by the integrator output, as shown in Fig. 7, the fault can be detected by the amplitude of e dq , which is depicted in Fig. 20.
It is shown in Fig. 20 that when the fault occurs, the output steps from 0 to 1 as the amplitude of e dq drops to a certain value, and the fault ride-through strategy is applied accordingly.Similarly, the fault ride-through strategy is disabled since the latch is cleared when the amplitude of e dq recovers to a certain value as the fault recovers.Thereby, the fault can be detected without sensing the grid voltage.
1) Virtual-Impedance Method: Since the virtual-impedance method can equivalently change the VSC output impedance, it is generally utilized as a fault ride-through strategy in grid-forming converters [38].The control block of the virtual-impedance method is depicted in Fig. 21, and the fault current can be limited by subtracting the voltage drop on the virtual impedance Z virtual as the reference voltage is reduced.
As shown in Fig. 21, when the system is in normal operation, the inverter operates in the PSSC mode, where S 1 is connected to channel 1.As the fault occurs, the virtual-impedance control is applied (S 1 switches to channel 2) to suppress the inrush current.When the fault is cleared, S 1 returns to channel 1, and the corresponding voltage reference is switched from v dqrefm to v dqref .
2) Control Mode Switching Strategy: Indeed, the control mode switching strategy inwhich the grid-forming control is switched to the grid-following control, is also widely applied as the fault occurs [39].Thereby, the voltage sensor and PLL should be required to obtain the grid phase as the grid-following control is implemented.Yet, the state observer, which does not require either PLL or the voltage sensor, can also be used to track the grid phase [32], where the integrator output of the current control loop, i.e., e q, is utilized to estimate the phase of ac grid.
To avoid the inrush current during the fault recovery process, the offline PSC loop and voltage control loop, i.e., the current tracking and phase tracking control, are reactivated during the fault process [40].The detailed control block diagram is illustrated in Fig. 22, where the state observer is applied in the grid-following control mode, and i dqref1 denotes the reference current in the grid-following control mode.
As shown in Fig. 22, S 1 ∼S 4 are all connected to channel 1 as the system is in normal operation, and they switch to channel 2 as the fault occurs.During the fault process, the output of the voltage control loop i dqref tracks the setting current i dqref1 , and the output of the PSC loop θ p tracks the output of the state observer θ q .Consequently, the inrush current can be eliminated during the fault recovery process.

B. Capability to Transfer From the Islanded Mode to the Grid-Connected Mode for PSSC-VSC
Since PSSC-VSC belongs to the grid-forming converter, the switching strategies for traditional grid-forming converters from islanded mode to the grid-connected mode are also applicable to PSSC-VSC.The difference is that the voltage at PCC should be sampled during the resynchronization process for the traditional Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.grid-forming converters.At the same time, PSSC can achieve resynchronization with the aid of the state observer.
A seamless switching control strategy for droop-controlled VSC has been proposed in [41], and the resynchronization can be realized by controlling v pccq and v pccd to 0 and the rated voltage, respectively.Fig. 23 illustrates the block diagram PSSC with seamless control, where Δθ and Δv represent the phase and voltage amplitude compensation, respectively.
For PSSC, the PCC voltage is not sampled; thereby, the integrator output of the current control loop e dq should be utilized to obtain the compensation signals as the PSSC-VSC transfers from the islanded mode to grid-connected mode.The resynchronization control block diagram for PSSC is depicted in Fig. 24, where v gabc represents the voltage on the grid side at the grid-connected point.
It is shown in Fig. 24 that the compensation signals are obtained by controlling v q and v d to 0 and rated voltage, respectively, and then the compensation signals are fed back to the PSC loop and voltage control loop.Consequently, the resynchronization is realized as v q = 0 and v d = v dref .It is noted that the voltage on the converter side at the grid-connected point is substituted by e dq for the resynchronization of PSSC-VSC.
The specific steps for seamless switching of PSSC-VSC from islanded mode to the grid-connected mode are clarified as follows [41].
1) PLL is utilized to obtain the grid phase; 2) The seamless switching control is implemented as the resynchronization signal is enabled; 3) The errors between the actual v dq and the reference values are detected, and the grid-connected signal is enabled as the errors satisfy the requirements; 4) The seamless switching control is disabled as the gridconnected signal is enabled, and the VSC operates in the grid-connected mode.The realization of the seamless switch signal is presented in Fig. 25, and it is indicated that only when the errors are less than the threshold values and the resynchronization signal and off-grid signal are set to 1 and 0, respectively, then the gridconnected signal can be enabled.

V. EXPERIMENTAL RESULTS
To verify the correctness of the proposed control method and theoretical analysis, the experiments on a laboratory setup are carried out.The different inductors are connected in series with the grid simulator ITECH AC power supply to emulate different grid conditions, i.e., the weak and stiff grid conditions.The inverter is managed by a TMS320F28379 digital signal processor, and the voltage transducer LV 25-P and current transducer LA 55-P are used for the voltage and current measurements.The IGBT modules of Infineon FS25R12W1T4 are applied for the inverter, and the voltage tolerance and the maximum collector current are 1200 V and 25 A, respectively.A constant dc voltage supply is used at the dc side.

A. Impedance-Based Stability Analysis for PSC-VSC and PSSC-VSC
Fig. 26 shows the measured PCC voltage of phase a and VSC currents of PSC-VSC and PSSC-VSC under different grid conditions, where the parameters presented in Table I are adopted.
As shown in Fig. 26(a) and (b), both PSC-VSC and PSSC-VSC are kept stable under weak grid conditions, i.e., L g =  15 mH.Yet, as shown in Fig. 26(c), PSC-VSC loses stability as L g is decreased to 1 mH.Moreover, the overcurrent protection is triggered when the current exceeds the threshold value.Conversely, PSSC-VSC with L g = 1 mH is still stable, which closely correlates with the theoretical analysis illustrated by Figs. 9 and 10.

B. Stability Analysis for PSSC-VSC Under Different Proportional Gains
As shown in Fig. 15, the system stability will be deteriorated both under stiff and weak grid conditions with increasing proportional gains, and the boundary values of the proportional parameters under different SCRs are given in Table III.
The measured VSC currents of PSSC-VSC with different proportional gains under different SCRs are shown in Fig. 27, and the experimental results match the theoretical eigenvalue analysis.

C. Effectiveness of Designing Method of Controller Parameters
Fig. 28 depicts the measured VSC currents of PSSC-VSC with designed parameters under different SCRs, where the system parameters are the same as those given in Table I, and the   It is shown in Fig. 28 that PSSC-VSC can maintain stability both under weak and stiff grid conditions, which validates the effectiveness of the proposed designing method of the controller parameters.

D. Dynamic Performance of PSC-VSC and PSSC-VSC
Fig. 29 shows the current and active power responses of PSC-VSC and PSSC-VSC after the same reference voltage step, and it is presented that the overshoot and setting time for PSSC-VSC are both smaller than that of PSC-VSC, which ,in alignment with the conclusion drawn in Fig. 19.

E. Practicality Validation for PSSC-VSC 1) Capability of Active Power and Reactive Power Support:
As the active load is increased by 150 W while PSSC-VSC operates in the grid-connected mode, the experimental result is illustrated by Fig. 30(a), where f and P represent the frequency at PCC and the converter output active power, respectively.It is presented that the active power output of the PSSC-VSC is increased to actively support the grid frequency.Similarly, the system response as the reactive load is increased by 500Var is depicted in Fig. 30(b), where v pcc and Q represent the voltage amplitude at PCC and the converter output active power, respectively.It is indicated that PSSC-VSC can also provide reactive power support for the grid.
2) Effectiveness of the Fault Ride-Through Methods: Fig. 31(a) and (b) show the measured grid voltage and VSC currents of PSSC-VSC with the virtual-impedance method and control mode switching strategy, respectively, and the grid voltage drops to 0.5 p.u. for 0.5 s.As shown in Fig. 31, under both strategies, the currents can be limited during the voltage sag process, and the system can be smoothly transited to the original steady state as the voltage recovers.
3) Switching Strategy Between Islanded Mode and Grid-Connected Mode: Fig. 32 shows the measured VSC currents of PSSC-VSC with the switching strategy between islanded mode and grid-connected mode, and the seamless switching of PSSC-VSC between islanded mode and grid-connected mode is realized as the switching strategy proposed in Section IV is applied.

VI. CONCLUSION
In this article, the PSSC is proposed for the grid-connected VSC under SCR from 1 to infinite, and the controller parameters for PSSC-VSC stabilization under different grid conditions are elaborated by eigenvalue analysis, participating factors analysis, and the impedance-based analysis.The practicality of PSSC is analyzed, and the experimental tests verify the effectiveness of the theoretical analysis.The practical implementation of PSSC is identical to the traditional PSC, making it a viable replacement for the practical implementation of PSC.From the theoretical analysis and experimental tests, the following conclusions can be drawn.
1) The traditional PSC is unstable under stiff grid conditions.Yet, the proposed PSSC overcome the stability issue of PSC in stiff grid condition.
2) The proposed designing method for PSSC parameters can stabilize the VSC as SCR ranges from 1 to Ý. Additionally, PSSC-VSC exhibits superior dynamic performance than PSC-VSC.3) By applying some auxiliary control strategies, the PSSC is capable of actively supporting the grid voltage and frequency, providing fault ride-through ability, and seamlessly switching between islanded mode and gridconnected mode.4) PSSC-VSC can operate without the grid voltage sensors and the filter capacitor.5) PSSC has a promising prospect in practical implementation due to its remarkably simple control structure and superior stability performance, especially with the emergence of grid-forming converters.
The expressions of B in ( 23) can be expressed as Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.

Manuscript received 14
March 2023; revised 13 June 2023 and 29 July 2023; accepted 8 September 2023.Date of publication 12 September 2023; date of current version 23 October 2023.This work was supported by Natural Science Foundation of Sichuan Province under Grant 2022NSFSC1904.Recommended for publication by Associate Editor Q. Shafiee.(Corresponding author: Junpeng Ma.)

Fig. 5 .
Fig. 5. Block diagram of the small-signal model of the control plant with the inner control loop in dq-frame.

Fig. 14 .
Fig. 14.Locations of the dominant eigenvalue before and after the controller parameters step by 10%.(a) Under the stiff grid.(b) Under the weak grid.

Fig. 17 .
Fig. 17.PF of the three control loops.(a) The participating factor of the voltage control loop.(b) The participating factor of the current control loop.(c) The participating factor of the PSC control loop.
) are depicted by Fig. 18(b).The parameters in S 2 simultaneously satisfy the response time of the current control loop and the impedance requirements, while the parameters in S 1 only satisfy the former requirement.The parameters in S 3 satisfy the impedance requirements and the response time of different control loops.To satisfy the response time of the current control

Fig. 18 .
Fig. 18.Designing parameters.(a) Range of parameters.(b) Enlarged part of (a).(c) Phase of Z SISO_PSSC-VSC is out of the range.(d) Phase of Z SISO_PSSC-VSC is within the range.

Fig. 19 .Fig. 20 .
Fig. 19.Index J of the transfer function of G 1 (s) and G 2 (s) with different proportional gains.(a) The index J with different k p .(b) The index J with different k pv .(c) The index J with different k psc .

Fig. 22 .
Fig.22.Seamless switching control strategy as the direct switching current control is applied.

APPENDIXA 11 =
The expressions of A in (23) can be expressed asA L1 + B L1 D I − k psc B L2 B p1 A 13 = B L1 C I D v + B L1 E I − k psc B L2 B p2

TABLE I SYSTEM
AND CONTROLLER PARAMETERS

TABLE III BOUNDARY
VALUES OF PROPORTIONAL PARAMETERS