Direct Torque Control With Constant Switching Frequency for Three-to-Five Phase Direct Matrix Converter Fed Five-Phase Induction Motor Drive

For heavy industrial drive applications, the direct matrix converter (DMC) solves the problems caused by the two-stage power conversion mechanism. Due to a lack of technological advancement, the control of multiphase drives operated by DMC is a significant cause of concern. This article thus presents a direct torque control (DTC) scheme based on space vector pulsewidth modulation (SVPWM) for a five-phase induction motor (FPIM) driven by a three-to-five (<inline-formula><tex-math notation="LaTeX">$3\times 5$</tex-math></inline-formula>) phase DMC. This proposed SVPWM-DTC employs the virtual vector (VV) concept to eliminate the effect of the <inline-formula><tex-math notation="LaTeX">$xy$</tex-math></inline-formula> component on <inline-formula><tex-math notation="LaTeX">$3\times 5$</tex-math></inline-formula> DMC output voltage space vectors. A novel approach is applied to analyze the effect of SVPWM-VV on the stator flux, torque, and speed of FPIM drive. Additionally, this SVPWM-VV regulates the input power factor of <inline-formula><tex-math notation="LaTeX">$3\times 5$</tex-math></inline-formula> DMC. The proposed work is simulated first and further validated by <inline-formula><tex-math notation="LaTeX">$3\times 5$</tex-math></inline-formula> DMC fed FPIM hardware prototype using field programmable gate array (FPGA)-based controller.

advantages of the five-phase induction motor (FPIM) compared to other multiphase induction machines (IMs), it is considered in this article as a case study. As a result of intensive research on FPIM, it is currently available with some attractive features, such as reduced torque ripple, increased torque density, and lower power rating for each phase. A conventional two-stage power conversion process that involves a grid-side converter (GSC) and a load-side converter (LSC) is used to operate FPIM drives in heavy industries [4]. However, the direct matrix converter (DMC) fed FPIM drive is a single stage ac-ac power converter with significant advantages, such as controllable input power factor, sinusoidal input and output currents, bidirectional power flow, compact design [5].

A. Literature Review
To achieve high performance control, direct torque control (DTC), and field oriented control (FOC) have been investigated for the FPIM drive [6], [7]. Unlike FOC, DTC is superior for FPIM drive applications due to its better dynamic torque response, easy control algorithm, and insensitivity to variations in motor parameters [8], [9]. Two types of DTC structures, namely, look-up table (LUT)-based DTC and space vector pulsewidth modulation (SVPWM)-based DTC, are available in the literature. SVPWM-DTC shows better performance than LUT-DTC from the perspective of torque and flux ripple attenuation, as well as current harmonic mitigation [10], [11]. SVPWM-DTC has the characteristics of constant switching frequency, reduced torque ripple, reliable start-up, and improved low-speed operation [12]. Some DTC schemes intended for the DMC-fed three-phase induction motor (IM) or permanent magnet synchronous motor (PMSM) drive have been studied in various research papers [13]- [17]. Only a few publications are available for SVPWM-DTC operation for 3 × 3 phase DMC-fed IM and PMSM drives [16], [17]. However, their applicability to DMC-fed FPIM drives has not been investigated.
To represent the space vectors and the zero sequence component of a n-phase machine, (n − 1)/2 space vector planes are required [4]. In FPIM, the fundamental components are represented in the αβ-plane and third harmonic components are represented in the xy-plane. Third harmonic components are undesirable in distributed stator wound FPIM, as they develop significant stator current distortions [18]. Therefore, to This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/ neutralize the effects of the third harmonic components in FPIM, the resultant volt-second vector applied in a control interval must be zero in the xy-plane. In [18] and [19], the virtual vector (VV) technique has been applied to the FPIM drive to realize the resultant zero volt seconds. DTC approaches in [12] promise to significantly improve the performance of the FPIM drive fed by the voltage source inverter using a variety of VV combinations. There has been relatively little research done in the domain of multiphase systems powered by a DMC. Some recent research articles focus on the operation of an FPIM fed by a 3 × 5 phase DMC [20]- [22]. The control approaches are based on DTC [20], FOC [21], and model predictive control (MPC) [22]. The FOC approach in [21] exhibits a constant switching frequency operation of 3 × 5 DMC, while the DTC and MPC methods lead to a variable switching frequency operation of 3 × 5 DMC. As in the previous literature, it is well studied that FOC is much of the motor parameter dependent, leading to several uncertainties during motor operation. To eliminate such parameter variation, in this article a combined method is studied with the benefits of both DTC and SVPWM methods to obtain a desirable constant switching frequency of DMC with a reduced effect of parameter uncertainties. This article compares its performance with FOC- [21] to claim the benefits.

B. Motivation and Objectives
After carefully summarizing the existing solutions for DMC control, it can be concluded that the control problem of 3 × 5 DMC is still a fairly open topic and needs to be solved. The following facts support the proposed solution in this article.
1) The literatures are limited to GSC followed by the LSC-fed FPIM drive instead of the single-stage DMC converter. Furthermore, the SVPWM-DTC control available for 3 × 3 phase DMC cannot be extended to 3 × 5 phase DMC directly due to the presence of third-harmonic variables. 2) Different types of state space vectors, namely, null vectors, active vectors, and rotating vectors, are realizable in 3 × 5 DMC [5]. Although the rotating vectors generate no common mode voltage (CMV), the following problems are encountered, while using them for drive operation; a) as the direction of the rotating vectors is not fixed, the angle between adjoining vectors varies continuously, and hence the sector size between adjoining rotating vectors changes over time, and b) as the angular position of the rotating vector is rotating continuously at synchronous speed, the corresponding developed flux cannot be certainly evaluated. Therefore, the output space voltage vectors (VV) need to be synthesized by employing either active vectors exclusively or sets of active and null vectors.
3) The active vectors are categorized into small, medium, and large vectors. Therefore, there is the possibility of several combinations of VV that can be implemented for the robust SVPWM-DTC based control approach of the 3 × 5 DMC fed FPIM drive. 4) Improper selection of VV may lead to performance degradation or even system damage; therefore, the impact of VV on the torque and flux performance of the particular FPIM must be investigated. 5) The power quality on the input side of the 3 × 5 DMC fed FPIM drive is the main issue in this investigation that needs to be mitigated by proper VV selection.

C. Contribution and article Organization
To address the drawbacks of existing approaches for controlling the 3 × 5 phase DMC-fed FPIM drive system, this article aims to design an SVPWM-DTC method consisting of a VVbased SVPWM strategy that possesses the following remarkable features.
1) An SVPWM scheme is developed using the large, medium, and null vectors. The concept of VV is incorporated into this SVPWM strategy to neutralize the effects of the voltage components in the xy plane.
2) The selected voltage VVs are used to maintain the constant switching frequency and provide maximum input voltage utilization to achieve the rated torque and a rated speed of the FPIM drive.
3) The theoretical analysis of the resultant voltage vector based on the proposed VV SVPWM is used to evaluate the performance of the drive flux and torque at a wide variety of speeds in the modulation range. 4) The inner loop of the DTC indirectly achieves better stator current performance in terms of ripple and %THD over a wide speed range. 5) The suggested SVPWM-DTC scheme exhibits the control action of the grid side current of 3 × 5 DMC in various power factor operations. 6) An experimental prototype is developed to validate the performance of the proposed SVPWM-DTC scheme in a wide range of speed operations. To achieve these objectives, first, the dynamic modeling of 3 × 5 phase DMC with the proposed VV-SVPWM scheme is provided in αβ-stationary reference frame in Section II. After that, the maximum value of the modulation range and input power factor compensating angle are calculated. Then, in Section III, an SVPWM-DTC scheme is proposed based on the proposed VV-SVPWM strategy that is utilized to obtain the desired experimental performance in Section IV. Finally, Section V concludes article.

II. SVPWM SCHEME FOR 3×5 DMC
The topology of a 3 × 5 phase DMC fed FPIM is depicted in Fig. 1, which has three input phases and five output phases. Each output phases of DMC are connected to all three input phases via a bidirectional IGBT switch. In such a way, 3 × 5 phase DMC require 15 bidirectional IGBT switches, where a total of 2 15 permuted switching states are feasible using binary numbers {0,1}. The switching function (S n i n o ) is defined as "1" for the closed switch and "0" for the open switch. To achieve safe commutation, S n i n o is classified into a forward switching function S + n i n o and backward switching function S − n i n o , as illustrated in Fig. 1. Here, the subscripts n i = {a, b, c} and n o = {A, B, C, D, E} denote the input phase and output phase, respectively. The switching constraint for reliable operation of DMC is S an o + S bn o + S cn o = 1, which is to satisfy the following rules [5].
1) The input phase must not be short-circuited.
2) The output phase must not be open circuited for any switching instant. Utilizing these constraints, a total 3 5 (243) potential switching combinations are possible. Symmetrical component theory, with its multiphase extension, leads to a 5-D representation of FPIM vector space with two mutually perpendicular 2-D subspaces (αβ and xy-frame) and a zero subspace [23]. Generic variable X is utilized while transforming three-phase variables into two-phase stationary αβ-frame, as given in (1). Using the generic variable Y , it is convenient to transform the five-phase variables into two phase stationary αβ-frame and xy-frame for the theoretical analysis of FPIM, given in (2) where m i and m o are considered as phase numbers.

A. Grouping of Vectors
All 243 switching combinations generate 243 current vectors in αβ-frame using (1) and 243 VV in both αβ and xy-frame using (2). Out of which, 93 vectors (voltage or current) have variable magnitude and constant switching frequency in αβ-frame, whereas the other vectors cause variable magnitude, variable frequency, and dependency on the phase angle of the input voltage space vector. Thus, 93 VV in αβ and xy-frames are useful for the proposed analysis, as shown in Fig. 2   Similarly, the current vectors in αβ-frame are provided in Fig. 3  where v ol is the output line voltage of 3 × 5 phase DMC and can be represented as where v * o is the reference rms output line voltage, where v gn i is considered as the input phase voltage with instan- and the switching function S n i n o is defined earlier in this section.
and V i are the phase and rms value of the input line voltage, respectively. ω i and ϕ v are the input angular frequency and where i in i represents input phase current of DMC with in- has the reference current displacement angle of ϕ * i . I i represents the rms value of the input current of the DMC. Instead of directly measuring i in i , it can be obtained from the output phase current (i n o ) of DMC and the switching function as The five-phase output current of 3 × 5 phase DMC fed FPIM and its space vector in α − β reference frame are given by is the instantaneous output phase current; β o (= ω * o t + ϕ i ), ϕ i , and I o represent the phase, displacement angle, and rms value of the output current, respectively.
The VV for the SVPWM scheme need to be arranged in a sequence such that the average volt-second of the complete sequence in a switching time instant T sw is zero. It nullifies the effect of xy-component of output voltage ( v xy o ) and current i xy o on the various performances of the connected load. Such VV concept is analyzed for SVPWM scheme in this section, which is referred further as SVPWM-VV. The SVPWM-VV utilizes the original voltage vector and its dwell times to determine the resultant voltage space vector. Dwell time for each voltage vector of 3 × 5 DMC can be computed as Table II is the modulation index and the variable ζ i = (cos ϕ g ) −1 depend on the input power factor; ϕ g = ϕ v − ϕ * i is the input power factor angle. 0 ≤ δ v ≤ π/5 and 0 ≤ δ i ≤ π/3 represent the dwell angle of Similarly, Fig. 3 shows six input current sectors of The sequence of these VVs with large and medium VV can be obtained from Table III. Assume that both v αβ o and i αβ i are in sector-1 (i.e., k v = 1 and k i = 1), as shown in Fig. 4(a) and (b). As per Fig. 4(a), v αβ o can be computed using the components v αβ o1 and v αβ o2 . Similarly, i αβ i can be constructed from vector addition of i αβ i1 and i αβ i2 , as shown in Fig. 4 } are the common VV that are being used to synthesize v αβ o and i αβ i . As per the output current and input voltage direction during k v = 1 and k i = 1 and also to maintain a constant switching frequency with a minimum number of switching transitions, Fig. 4(c). These vectors can be illustrated as Fig. 4 Fig. 5. Here, T sw (i.e., 1/f sw ) is the switching period of the complete sequence with the carrier switching frequency f sw . An optional state O a can be inserted in between the above sequence to control the v cm of the 3 × 5 DMC phase voltage, which is not , as of (9) and (10), respectively By utilizing the defined values of the input line voltages v ab and v αβ o2 can be calculated. From Fig. 4(a), the resultant voltage virtual vector v αβ It can be seen from (11) that the output voltage VV is independent of the input phase angle (ϕ g ) at the switching time instant T sw . Hence, the motor torque and flux variation will not be affected by the variation of ϕ g . It is only dependent on the input line voltage magnitude, i.e., V i . Again, with the proposed SVPWM dwell time, the virtual vector corresponding to xy-plane is nullified as (14). Hence, the xy-components of the stator flux harmonics do not affect the overall performance of the load In Fig. 6 By using a similar analysis as of (11), the magnitude and angle of (k v ) th VV for SVPWM scheme can be computed in αβ-frame as  2) VVs in dq-Frame: Through angular transformation, v αβ Again, it can be seen from (16) is independent of δ v and varies only due to m a . It is positioned at +k v π/10 in an anticlockwise manner and shown in Fig. 6(b).

C. Computation of Maximum Values of m a and ϕ g
The SVPWM scheme only can be validated while maintaining d 0 to positive value, i.e., d 0 ≥ 0. Now, the feasible solution for the modulation index (m a ) can be obtained as The maximum value of m a can be achieved as (18) by using trigonometric inequalities, i.e., cos( π 10 − δ v ) cos( π 6 − δ i ) → 1 for δ v = π 10 and δ i = π 6 m a ≤ cos ϕ g The modulation index varies in the interval of m a ∈ (0, 0.7886], where m a = 0.7886 is obtained corresponding to the unity power factor operation of the grid current with ϕ g ≈ 0. As observed from (18), each m a corresponds to a maximum compensation of ϕ g . However, the proposed SVPWM scheme is only feasible if v i leads i i to one sector, i.e., ϕ g ≤ π/3. The maximum value of ϕ g (ϕ g,max ) can be obtained as The relation between ϕ g,max and m a can be graphically represented in Fig. 7. This graph depicts the accessibility of the output voltage vector at different load demand.

D. Commutation of 3 × 5 DMC Switches
Power converter modulation schemes have a direct impact on commutation losses, and the proposed SVPWM scheme assures a minimum switching count for each vector transition. The commutation losses can be reduced further by selecting an appropriate VV sequence in a sector. The product of differential voltage level (Δv gn i ) and the current i n o through each bidirectional IGBT switch approximately settles the effective power losses in a certain commutation. Each DMC transition must always involve two switches with the same output phase: one to turn OFF and the other to turn ON. Because real-world commutations cannot be instantaneous, unique bidirectional switches with two distinct gates for each current direction are required to avoid shorting the voltage sources or opening the current source (see Fig. 1). In any instance, the voltage or current sign must be known in order to select the appropriate switching sequence. In the traditional four-step commutation method with voltage-controlled and current-controlled techniques, proper sign detection is an issue, while Δv gn i and i n o are near to zero [24]. Hence, the proposed algorithm is utilized with either voltage or current commutation in each step to prevent critical transitions, which entails switching with Δv gn i or i n o below the set threshold values. For safe commutation, the threshold values of Δv gn i and i n o are kept as 15 V and 0.5 A, respectively. The time interval between each consecutive step is set at T d = 1.5 μs. This value is determined by the power semiconductor devices' turn-ON/OFF characteristics. To assess the efficacy of this technique, a safety ratio corresponding to Δv gn i divided by the threshold voltage needs to obtain if the commutation is voltage regulated, or i n o divided by the threshold current if it is current controlled. As a result, this ratio determines the safety margin of each commutation, with anything greater than one, indicating that the commutation is safe. Because there is no current freewheeling channel in DMC, dependable current commutation between bidirectional switches is difficult to build. The current flowing through the switches must be actively managed, and numerous commutation strategies have been described for good functioning [25]. The gate pulse waveform during voltage commutation with either v ga > v gb or v ga < v gb are indicated in Fig. 8(a) and (b), respectively. Fig. 8(c) and (d) depict the gate pulse waveforms generated by FPGA-based implementation in the case of positive and negative output phase-A current i A , respectively, during the current commutation.

III. PROPOSED CONTROL METHODOLOGY
An SVPWM-DTC scheme for 3 × 5 DMC fed FPIM is proposed in this section. The proposed scheme utilizes the resultant SVPWM VV for the analysis of stator flux and torque variation along with the maintenance of the input power factor, i.e., zero phase angle difference between the grid voltage and  point-of-common-coupling (PCC) current. The conventional FPIM drive in [18] utilizes the DTC scheme, which cancels the torque production due to the components of stator flux and stator current in xy-plane. However, this scheme cannot be directly implemented for 3 × 5 DMC fed FPIM drive to achieve in-phase grid voltage and current simultaneously. Hence, a detailed study of phase compensation is presented in this section along with the effect of VVs on %change in flux, %change in torque, and speed variation.

A. Input Power Factor Compensation
The design and analysis of the input filter parameters are important aspects for the input power factor compensation of the DMC. Fig. 9 shows the modeling of the DMC with the input LC-filter. DMC can be modelled as R e , which is the ratio of the magnitude of fundamental input voltage (V i ) and input current (I i ) of the DMC [26]. R d is the resistance of the damping resistor. L f and C f denote the inductance and capacitance of the LC-filter, respectively. Utilizing the model in Fig. 9(b), the transfer function G(s) (=i i (s)/v g (s)) can be obtained as where DMC. The estimation of ϕ g (φ g ) can be written as [26] It can be seen from (21) thatφ g depends on the various parameters of the input filter. Hence, the parameter variation may affect the accurate estimation ofφ g . To overcome the issue due to parameter variation, a simplified approach with proportionalintegral (PI)-based controller can be implemented to estimatê ϕ g [27]. The PI compensation controller can be denoted as (22) by utilizing the error variable Δϕ g (= sin(ϕ * g ) − sin(ϕ g )) where k p and k i are proportional and integral constants of PI controller, respectively. The use of PI controller can achieve a desirable steady-state value ofφ g . It has the inability to track the phase angle with higher accuracy, as the transfer function G(s) is a second-order system. To nullify the effects due to second-order system on the tracking ofφ g , a resonant term is added to the existing PI controller in (22). The resonant frequency (ω r ) of the resonant controller is set to twice the grid frequency, i.e., ω r = 2ω g , without affecting the high-frequency stability of the DMC. To avoid the instability due to the grid frequency variation and discretization errors, a damping term needs to be added to the traditional resonant controller. The resultant proportional-integral-resonant (PIR) controller for the input power factor compensation can be written aŝ where k r and k d are the resonant controller gain and damped gain. Q d is the quality factor of the damped term of the resonant controller. Approximately 0.07 c phase error can be observed with PI-based regulator, while PIR compensation technique give desired phase detection with minimal steady-state error. The respective performance with both PI and PIR compensation techniques can be visualized from Fig. 10. Now, the final estimation of ζ i can be obtained usingφ g , i.e., ζ i = (cosφ g ) −1 .

B. Effect of SVPWM-VV on FPIM Performance
For analyzing the effect of SVPWM VV on FPIM performance, all five-phase quantities are initially transformed to αβ-frame by considering Y ∈ {v, i, ψ} in (2). Afterward, Y αβ o is converted to Y dq o in synchronously rotating dq-frame by using The estimated stator flux in αβ-frame can be mentioned aŝ ψ αβ s =ψ α s + jψ β s = |ψ αβ s |e jρ s , where |ψ αβ s | andρ s denote the magnitude and phase angle ofψ αβ s . The effect of SVPWM VV on stator flux ψdq s =ψ d s + jψ d s in dq-frame can be analyzed by considering sector-1 ofρ s , as shown in Fig. 11. For simplification,ψ q s is considered as null andψ d s is fully contributed to development ofψ dq s . Now, the change inψ d s Δψ d s over a switching period T sw can be derived as where v d k v and i d o are the d-axis (k v ) th -sector SVPWM VV and deviation in stator current î dq respectively. R s denotes the dc resistance of the stator. Now, the % Δψ d s attains constant magnitude in the interval 0 ≤ ρ s ≤ π/5 for a specific m a , as shown in Fig. 12(a). As v d k v directly depends on m a , % Δψ d s magnitude proportionately increases for the interval 0 ≤ m a ≤ 0.7886 that can be investigated from Fig. 12(b).
Furthermore, the electromagnetic torque T e can be expressed  as (26) in dq-frame by consideringψ s q = 0 where k t (= (5/2)(P/2)) and P denote the torque constant and number of poles of FPIM. A small perturbation inψ d s and i q o deviateT e . The deviation inT e ΔT e can be obtained as (27)

by utilizing the change in
where ψ n , L s , L r , and L m represent the nominal flux, stator leakage inductance, rotor leakage inductance, and magnetizing inductance of FPIM, respectively. σ (= 1 − L 2 m /L s L r ) denotes the magnetizing coefficient of FPIM. ω r (= (P/2)ω m ) and ω m are the electrical rotor speed and actual motor speed in r/min, respectively. It is revealed from (27) that ΔT e is indirectly affected by the modulation index (m a ) of the SVPWM-VVs and speed (ω m ) of the motor. For the interval of 0 ≤ m a ≤ 0.7886, the impact of SVPWM-VVs on %ΔT e is examined from Fig. 13. Offline analysis is performed for 25%, 50%, 75%, and 100% of rated ω m (i.e., ω n = 2πf n , f n is the nominal frequency of FPIM), while maintaining the load torque (T L ) to the rated value (T n ), i.e., 100%T n . For instance, VVv dq 2 has positive % ΔT e for 100% ω n at m a = 0.7254, while the flux angleρ s is at π/10. Hence, the proposed controller selectsv dq 2 for the production of motor torque in sector-2. From the similar analysis, it can be seen thatv dq 1 . . .v dq 4 are suitable for low speed operation of 25% ω n , as these VVs have positive % ΔT e . However,v dq 2 is the most preferable at 25% ω n as the desired speed can be achievable at lower m a of 0.1734. With the selection of v dq 2 in sector-2, 100% − 125% of ω n can be achievable in a linear modulation range of 0.7254 ≤ m a ≤ 0.7886. The torque performance severely impacts for 0 < m a < 0.1734, i.e., during the low speed region of less than 25% ω n . It is possible to conclude that a wide range of speed can be achieved across the linear modulation range.

C. Proposed SVPWM-DTC
For high-performance and reliable FPIM drive operation, DTC technique is commonly advantageous in terms of complexity and parameter sensitivity [18]. Less computational complexity, lower parameter sensitivity, minimal switching losses, and constant switching frequency operation are among the benefits of SVPWM-DTC scheme. Fig. 14 depicts the generalized structure of the proposed SVPWM-DTC operated 3 × 5 DMC fed FPIM drive. The steps to achieve the required performance with the proposed controller are summarized as follows.
Step 1: Measure v in i , i n o , and ω m by using three voltage sensors, five current sensors, and one speed encoder.
Step 2: Take the feedback of the internally generated switching pulse S n i n o with unit delay and generate v n o , i in i as per (5) and (7).
Step 4: Estimate the stator flux ψs αβ as (28) and electromagnetic torque T e aŝ Step 5: Calculate the torque reference (T * e ) by utilizing a PI controller, which is being used to track ω m with the reference speed ω * m . k ω p , and k ω i are the proportional and integral constants of the speed controller.
Step 6: Obtain the stator flux reference (ψ * s ) from ω m . ψ * s maintains to ψ n for below the rated ω m and varies inversely with ω m for above the rated ω m .
Step 7: Compare the estimated value ofT e |ψ s αβ | with T * e (ψ * s ) to produce torque error T err (flux error, ψ err ), respectively.
Step 8: Utilize two separate PI regulators to track T err and ψ err , which further produces v q * o and v d * o , respectively. k d p and k d i (k q p and k q i ) are the proportional and integral constants of the d-axis (q-axis) current controller.
Step 9: Convert the reference voltage space vector Step 10: Calculateφ g as per (23) for input power compensation. Furthermore, utilizeφ g , the effective angle of v αβ * o (i.e., δ v ) and δ i for the computation of the dwell time of the proposed SVPWM as per Table II.
Step 11: Compute the sector (k v and k i ) by utilizing δ v and δ i to select the appropriate VV from Table III.
Step 12: Generate switching states S n i n o (n i ∈ {a, b, c}, n o ∈ {A, B, C, D, E}) in accordance with Table I to guarantee the constant switching frequency operation. The selection of the error amplifier gains is determined in relation to the actual motor parameters for providing better sensitivity. Specified delay has been introduced in each interpreted block in Fig. 14 to achieve real-time performance.

A. Experimental Prototype Description
The theoretical analysis of the proposed SVPWM-DTC scheme for 3 × 5 DMC fed FPIM drive is validated through experiments. The necessary laboratory test setup is shown in Fig. 15. It comprises a 3 × 5 DMC connected to an FPIM, which further couples to a separately excited dc generator. Both the mechanical and electrical specifications of 3 × 5 DMC and FPIM are summarized in Table IV. For construction of 3 × 5 DMC, 15 bidirectional IGBT (SKM150GM12T4G) switches are utilized. Each IGBT is connected to SKYPER 32-PRO-R driver board without an interlocking option. A low-cost singleboard computer with Zynq-7020 FPGA (FPGA-1) is used to generate IGBT switching pulses to operate 3 × 5 DMC. A dead band of 1.5 μs is given to each switching pulse to ensure the safe commutation of the bidirectional IGBT switches. Another dedicated Zynq-7020 based FPGA controller (FPGA-2) is used to implement the proposed controller. FPGA-1 and FPGA-2 are synchronized at 800 -MHz clock using IEEE-1588 v2 Protocol. However, the sampling time of both FPGA controllers set to   25 ns to achieve higher accuracy in dwell time calculations. Three grid-side voltage sensors (LEM LV25P), five FPIM-side current sensors (LEM LA-55P), and one speed encoder output are utilized as feedback signals for the inbuilt analog-to-digital converter of FPGA-1. The estimated torque and stator flux of FPIM can be measured through the digital-to-analog converter of FPGA-1. A protective system with a relay-operated contactor is used at the grid side of DMC just before the point-of-common coupling.

B. Experimental Results
The proposed SVPWM-DTC scheme was examined using three sets of test scenarios, and the corresponding results are shown in Figs. 16-23. During these experiments, the requirements for compensating the input power factor and maintaining a constant f sw were investigated.
1) Scenario-1: FPIM speed variation of 0 to 80% ω n at 25% T n . 1) Scenario-1: For this test scenario, FPIM drive is loaded to 25%T n (i.e., 5 Nm) at t = t 1 s. A step speed command of ω * m = 1200 r/min is given to the controller at the same instant. From Fig. 16(a), it is observed that the desired speed of ω m = 1200 r/min is achievable by controller at t = t 2 s with a speed error of ω err = ±15 r/min. During the drive operation, the average switching frequency (f sw ) is maintained constant at 5 kHz. Fig. 16(b) provides the information on cosφ g , P o , P i , and Q i .φ g is seen to be varied around 0 • , i.e., the proposed controller is able to achieve the unit input power factor operation. The input power P i varies with the output power P o requirement, considering an overall drive efficiency of 91.05%. The reactive power requirement from the grid is observed near to zero VAr that confirms nearly unit power factor operation of the DMC fed FPIM drive. The proposed control strategy is compared with FOC- [21], and corresponding results are shown in Fig. 16(c) and (d). With FOC- [21], the performance results have significantly higher tracking error and constitute higher ripple contents.
During this test scenario, the experimental results corresponding to i αβ o , i xy o ,ψ αβ s , andψ xy s are provided in Fig. 17. The  Fig. 18(a) provides the instantaneous value of 3 × 5 DMC output line voltage (v AB ), output phase-A voltage (v A ), and output phase-A current (i A ). The instantaneous value of 3 × 5 DMC input phase-a current (i ia ), grid voltage (v ga ), and grid current (i ga ) are illustrated in Fig. 18(b). Zoomed portion of Fig. 18(a)(bottom) and (b)(bottom) show the transient and steady-state performance during scenario-I. The zoomed portion in Fig. 18(b)(bottom) indicates that v ga and i ga are in phase and denote a unit power factor operation of 3 × 5 DMC. As mentioned earlier, the proposed drive controller is also used to illustrate the reduced ripple in both output and input currents. Fig. 19(a)(top) shows the v A and i A of 3 × 5 DMC at T L = 5 Nm and ω * m = 1200 r/min. Corresponding fast Fourier transform (FFT) analysis is illustrated in Fig. 19(a)(bottom). Similarly, Fig. 19(b)(top) represents the waveform of i ia and i ga at T L = 5 Nm and ω * m = 1200 r/min. Also, related FFT analysis is depicted in 19(b)(bottom). A 12 and 6.5-kHz window are selected to evaluate the %THD performance for output and input current waveforms, respectively. Fig. 19(c)(top) indicates the common mode voltage and its effective magnitude during  ω * m = 1200 r/min. The effective magnitude of v cm is quite low and varies in between ±10 V. Fig. 19(c)(bottom) shows the FFT analysis of instantaneous values of v cm . It can be seen from Fig. 19 that the FFT waveforms contain the harmonic side bands corresponding to the selected 5-kHz VV-SVPWM switching frequency.
2) Scenario-2: Fig. 20 illustrates the FPIM drive performance at various speeds with the suggested VV based SVPWM-DTC. FPIM is initially loaded to 5 Nm and a speed command of 300 r/min is given at t = t 1 s, as seen from Fig. 20(a). Then, the motor runs at 300 r/min until time t = t 2 s. The reference speed is set to 600 r/min at t = t 2 s and the speed is reversed at t = t 3 s considering a load torque of -5 Nm. Finally, the speed reference is set to 0 r/min at t = t 4 s. It is observed that ω m tracks the reference speed with minimal ω err and obtain the desired estimated torque, T e . During such low speed and speed reversal operation, the drive switching frequency is maintained constant. As seen from Fig. 20(b), The input power factor angle is observed with less variation, i.e., ±5 • during low speed operation and found around ±1 • during higher speed of the FPIM drive. The performance of P o , P i and Q i are observed in Fig. 20(b). It is observed that a bidirectional power flow is established during speed reversal (at t 3 s) and braking operation (at t 4 s). Scenario-2 is also tested for FOC- [21] and corresponding comparative results in Fig. 20(c)-(d) show the desired performance with high ripple content. The stator current i αβ o and stator fluxψ αβ s waveforms in αβ-plane are presented in Fig. 21. The middle zoomed portion of Fig. 21 indicates the transient behavior during the low speed and speed reversal period. The stator flux trajectory in αβ-plane is observed as constant throughout the drive operation, as shown in Fig. 21(bottom). It is observed that the proposed SVPWM-DTC influences the overall performance of the drive in terms of reduced torque and current ripple.
3) Scenario-3: The dynamic performance of the FPIM drive through load change is observed in Fig. 22. Initially, the FPIM is loaded to 2.5 Nm and at t < t 1 s, a speed command of ω * m = 1200 r/min is applied to the drive controller, as shown in Fig. 22(a). FPIM attains steady-state speed performance under loaded condition with the proposed SVPWM-DTC method. At t = t 1 s, a step change in load torque from T L = 2.5 Nm to T L = 5 Nm is applied, and then the FPIM is driven at a reduced load of T L = 2.5 Nm at t = t 2 s. It is observed that  the torque and speed of the FPIM drive track the reference values as expected with minimal error. The drive operation verifies that SVPWM-DTC maintains f sw at 5 kHz. Fig. 22(a) illustrates the performance of the input power factor, input and output power flow of DMC. It can be seen that the input power factor of DMC is maintained near to unity. Scenario-3 is also tested for FOC- [21] and corresponding comparative results in Fig. 22(c)-(d) show the desired performance with high ripple content. The performance related to the stator currents and flux trajectories are similar to that of scenario-1, as shown in the bottom of Fig. 23. The proposed SVPWM-DTC has lower torque and current ripple due to the applied VV-SVPWM throughout the switching interval.

C. Comparative Study
This article compares the performance of the proposed SVPWM-DTC with FOC- [21]. The related speed and torque  1) Voltage Transfer Ratio Performance: Voltage transfer ratio (VTR) is considered as the modulation index (m a ) throughout this article. The impact of VTR m a on % torque change and speed of the DMC fed FPIM drive is analyzed in Section III-B and illustrated graphically in Fig. 13. It is difficult to distinguish the direct relationship between m a and the speed ratio k ω (i.e., ω m /ω n ) from this analysis. Hence, a direct relationship between m a and k ω is demonstrated in Fig. 24(a). It can be seen that the VTR of the proposed SVPWM-DTC increases with the increase in rotor speed until attaining the maximum value of m a , i.e., 0.7886.
2) DMC Switching Loss Performance: The 3 × 5 DMC has the bidirectional switches, which are controlled through SVPWM strategy with the hybrid commutation as in Section II. The development of the proposed SVPWM strategy assures minimal switching transition by maintaining the constant switching frequency (f sw ) of the overall drive. Fig. 24(b) denotes the f sw and DMC switching loss (P sw ) activities with a wide range of FPIM speed variations. These performances are also compared with FOC- [21]. It can be observed that the f sw is maintained constant for both methods due to the constant carrier frequency. However, the power loss P sw in case of the proposed SVPWM-DTC is less in comparison to FOC- [21].
3) Current THD Performance: The proposed SVPWM-DTC and FOC- [21] are evaluated in terms of %THD of output phase-A current i A and input phase-a grid current i ga . It can be seen from Fig. 24(c) that the %THD performance of the proposed SVPWM-DTC is better than the FOC- [21] with increasing voltage transfer ratio m a . As VTR is directly related to ω m , it can also be concluded that the %THD performance of the proposed SVPWM-DTC is better than the FOC- [21] with increasing FPIM speed.

V. CONCLUSION
This article describes a VV-based SVPWM-DTC for a 3 × 5 DMC-fed FPIM drive. The third harmonic component in xyplane is eliminated, while creating the SVPWM-VV sequence utilizing the volt-second balancing procedure. As the stator flux, torque, speed, and input power factor are all affected by SVPWM-VVs, a suitable analysis is done to design the look-up table to implement the proposed SVPWM-DTC scheme for the FPIM drive. Lower torque and stator current ripple are achieved with the proposed SVPWM-DTC method while retaining a constant average switching frequency. Additionally, the input power factor and grid current harmonic are both regulated by utilizing the same LUT. There are several test scenarios that are used to evaluate the effectiveness of the suggested scheme, including both steady-state and transient conditions. Based on the findings, it is concluded that the proposed SVPWM-DTC scheme achieved the desired objectives. The proposed drive control is merely useful for ship propulsion application in a ship microgrid. Additionally, this work can find its direct application in DMC fed high-power crane motor drives.