A Three-Level Single Stage A-Source Inverter with the Ability to Generate Active Voltage Vector During Shoot-Through State

Single-stage boosting capability of impedance network (IN) inverters makes this family of inverters an attractive choice for DC/AC applications with low input DC voltage. A specific time of shoot-through (ST) state is required to achieve the required voltage gain. Conventionally ST state and zero output voltage vector should be applied simultaneously. This constraint limits the modulation index and increases the voltage stress of the semiconductor devices, particularly for applications requiring a high boosting factor. In this paper, as the boosting stage for a three-level inverter, a new modified configuration of A-source IN with two series outputs is proposed and connected to a 10-switches three-level inverter. Besides generating two outputs by a single IN, the proposed DC/AC inverter is able to apply an active voltage vector during the ST state. This capability improves the DC/AC voltage gain, increases the modulation index, and decreases the required ST time. The operation principles are described, and the steady-state relations are derived. It is compared with other magnetically coupled INs in terms of boost factor and voltage stress of switches. Considering the 10-switches three-level inverter as the front-end inverter, an adopted maximum boost strategy using the space vector modulation is developed targeting minimum ST time. Finally, a laboratory prototype of the converter is developed, and several tests are carried out. The results validate the given theories and simulations.


I. INTRODUCTION
As renewable energy is getting more sustainable and viable, a more substantial movement is underway to reduce the dependency on the depleting fossil fuels over the last few decades [1]- [2]. One of the primary renewable sources is solar energy led by photovoltaic (PV), which is overgrowing due to its prominent advantages such as flexibility, minimal maintenance required, and easy installation either in small or large scales [3]- [4]. Considering the limitations and challenges of the stand-alone operation or grid integration of these power sources, many research works are conducted to improve the required power electronic interface regarding boosting capability, the number of elements, efficiency, and power quality [5]- [7]. Conventional 2-level and multi-level voltage source converters (VSCs) are buck converters [8], so normally a dc/dc converter is used as a voltage booster between PV and VSC. Alternative topologies such as switched-capacitor (SC) topologies with boosting feature is another solution, wherein capacitors are charged and discharged in parallel and series configurations with dc input source [9], [10]. In parallel, impedance source converters have gathered much attention [11] for voltage boosting because of several advantages such as: • Single-stage operation • A fewer number of active switches • High voltage gain • Improved reliability due to short circuit immunity In total, the impedance source converters are more reliable than VSI and SC topologies since they are not vulnerable to short-circuit in the DC link. Several impedance networks (IN) such as Z-Source [12], [13], T-Source, Quasi T-Source [14]- [15], Y-Source, Quasi Y-Source [16]- [17], and A-Source [18] networks have been introduced in the literature and reviewed in [11], [15]. Studying the configurations demonstrates that the magnetically coupled INs (MCIN) such as Y-source, coupled Trans Z-source, ГZ-source [19], and A-source are appropriate candidates to improve the boost factor. Accordingly, the magnetically coupled inductor used in IN reduces the number of circuit elements, makes the system lightweight, improves power density, and enhances voltage gain and modulation index simultaneously, with a lower DC-link voltage for DC/AC systems. However, leakage inductance is generally a concern in these structures.
A-source IN with autotransformer was suggested in [18] to obtain a higher DC voltage gain. Compared to other MCINs, Asource IN requires a fewer turn ratio (1:1 (N2/N1)) to achieve a higher voltage. Moreover, it is a suitable choice for renewable energy applications such as PVs and fuel cells (FC) due to its continuous input current [14]- [15], [20].
The combination of inverters and voltage boost elements such as INs have been investigated in several studies and used in many applications such as uninterruptable power supplies (UPS), electric vehicles, and grid-connected PVs [21]- [23]. Some researches are conducted on the connection of INs to the multi-level inverters [24], [25]. In [26], two Z-source INs are connected to a neutral point clamped (NPC) inverter, which requires two isolated DC input power sources. Owing to the discontinuous input current of the proposed topology in [26], an alternate topology containing two quasi-Z-source networks and two DC-link capacitors is applied [27]. To eliminate these two DC-link capacitors, a new topology, including two quasi-Zsource networks with Space Vector Modulation (SVM) technique, is proposed in [28]. The drawbacks of utilizing two independent INs, such as the excessive number of passive elements and requiring two isolated DC sources, pose a limitation to its application. A three-level Z-source NPC inverter and DC-link cascaded inverters, using a single IN and a single non-isolated DC source has been proposed in [29]. Nevertheless, the low boost factor and tendency to reduce the number of passive elements caused offering alternate INs, such as an NPC inverter with LC switching [30], which has improved the boost factor with two extra switches and a three-level modified Z-source NPC inverter using maximum boost control technique to increase the boost factor is presented [24]. In [31], a hybrid 2/3 level converter has been proposed containing a main three-phase bridge and an auxiliary leg with four switches. The merit of this configuration is in combining the features of two-and three-level converters with fewer semiconductors, which reduces losses and improves the efficiency as well as the reliability of the renewable energy system [32]. This inverter can operate either as a two-or three-level inverter, depending on the requirements. Despite the hybrid 2/3 level converter advantages, the lack of medium vectors compared to NPC can be mentioned as its limitation [33], [34]. This paper goes a step further and proposes a new modified A-source IN with two different output voltage levels, specially designed for multi-level inverters, in this case, the hybrid 2/3 voltage level inverter. The maximum boost control based on space vector pulse width modulation (SVPWM) is employed to control the inverter. The paper is organized as follows: first, the proposed topology is introduced in section II, and the operation principles and control method are investigated. Also, the main relations of the converter, such as voltage gain, voltage stress, shoot-through duty cycle, and modulation index, are formulated. In section IV, a maximum boost control strategy based on SVPWM is proposed and described. A comparison to other magnetically coupled INs in terms of boosting factor and voltage stress is provided in section V. Finally, experimental results are explained in section VII and used to revalidate the theoretical analysis.

II. CONFIGURATIONS, SPECIFICATIONS, AND BASIC OPERATION PRINCIPLES OF THE MODIFIED A-SOURCE
In this section, the modified A-source IN with a single switch as the switching system is described. Connecting to a 10 switch inverter is discussed in section III. As shown in Fig. 1(a), a conventional A-source IN contains an input inductor (L), two capacitors (C1 and C2), an autotransformer, a controlled switch, and a diode (D1). According to the inverter or filter network output voltage requirements, the peak output voltage of Asource IN (Vo) is generated. The boosting factor is written as follows [18]: where TST, T, N, N1, N2, Vin, and B are the shoot-through (ST) time interval, the switching time period, the auto-transformer turns ratio, the primary turns, the secondary turns, the input DC voltage, and the boost factor, respectively. Fig. 1(b) illustrates the proposed topology configuration besides the conventional A-source IN. The modified structure contains two more elements, which are a capacitor C3 and a diode D2. Capacitor C3 is charged during the ST state and provides the second output. Two individual output voltage levels of the network are represented as VO1 and VO2.
In the following, the steady-state operation principles of the converter are described. The steady-state analysis is provided based on the following hypotheses: • The passive elements are linear, time-invariant, and frequency-independent • The converter works in continuous conduction mode (CCM) • The capacitors are large enough to maintain the DC voltages across them with a low switching ripple • The parasitic elements of the transformer, such as magnetizing inductance, the leakage inductances, the winding resistances, and the stray capacitances, are ignored • The semiconductor devices are ideal, therefore switching transients and parasitic elements are negligible • The load impedance can be modelled as a current sink The two switching states are described in the following.

A. Shoot-Through (ST) State
During this state ( Fig. 2(a)), which lasts for DSTT seconds (DST is the ST duty cycle and T is the switching period), the switch is turned on, and D2 is forward-biased. The voltage across L is positive; therefore, its current (iL) increases. The voltage across Lp, VLp (equals to C2 voltage VC2) is positive; therefore, VxN is negative and C3 charges through D2. The equivalent circuit and current paths in this state are shown in where = 2 1 ⁄ and N1 and N2 are the primary and the secondary winding turns of the transformer, respectively.

B. Non-Shoot-Through (NST) State
During this state, which lasts for (1-Dst)T seconds, D1 is forward-biased, and D2 is reversed-biased. The stored energy in C3 and L is delivered to the load. As a result, the network's output voltage is increased during the NST, while the stored energy in passive elements is gradually decreased. The equivalent circuit and current paths are shown in Fig. 2(b). The main equations in this state are as follows: Considering the IN circuit in ST and NST states, the main waveforms are extracted, which are shown in Fig. 3.
Applying the inductor volt-second and capacitor charge balance principles, averaged values of the inductor current, capacitor voltages, and output voltages obtained: Using (13) the boost factor (B) can be expressed as: In the proposed network, the output DC-link average can be achieved in both ST and NST states as follows:

III. MODIFIED A-SOURCE THREE-LEVEL INVERTER
The next step to develop the three-level DC/AC system is connecting an inverter to the IN. Therefore the three-phase hybrid 2/3 level inverter is connected to the two series output of the modified A-source IN (Fig. 4). A reduced number of semiconductor devices is the main merit of this inverter, which makes it a proper choice for low-power, low-voltage applications.  In the following, the switching modulation strategy of the inverter is described. For IN-based Inverters, providing maximum boost with the minimum modulation index is the goal. Due to the SVPWM control method's several advantages, such as less switching number, easier digital implementation, and wider linear operation range [35], a combination of SVPWM and maximum boost technique is investigated to control the converter's switching. Generating higher possible output voltage with lower voltage stress across the switches is the main criterion for determining the vector number and applying the time interval.
The three-phase hybrid 2/3 level inverter has 40 switching states, including 24 active and 16 zero states. Generally, the magnitude of VO1 and VO2 may have different values; therefore, the vectors can be classified into four groups: • Long vectors: V1 to V6 with the length of (2/3)VO • Medium vectors: V7 to V12 with the length of (2/3)VO1 • Small vectors: V13 to V24 with the length of (2/3)VO2 • Zero vectors: V25 to V40 with the length of zero The switching states that generate these vectors are easy to extract and not mentioned here for brevity. The space vectors diagram is plotted in Fig. 5.  S2(a,b,c)  S1(a,b,c) switching state off on A on off B be applied during the ST interval. Therefore the magnitude of the output voltage is limited to the generated voltage during the NST states. Consequently, higher VO is required, which means higher DST and voltage stress. In the proposed inverter, an active vector (small vector) can be applied during the ST. For this purpose, S1 and S2 should be ON (shoot-through operation), and S3 and S4 should be OFF and ON, respectively (providing a small active vector). To achieve the maximum output (to achieve VOmin for a specified output), a small active vector (V13 to V24) should be applied during the entire ST interval. The vector number depends on the instantaneous sector of the reference voltage (Vref).
The space vector diagram is divided into six sectors (S1 to S6), where each sector includes three regions (R1, R2, and R3) (see Fig. 6 for sector 1). While Vref is in sector 1, the voltage vector implementation is described here, and it can be easily extended to other sectors. If the operating conditions are adjusted to achieve VOmin, it is easy to understand that Vref would be in R3.
where T1, T2, T19, and T20 are the time intervals for implementing V1, V2, V19, and V20, respectively. TST is the time interval of the ST state. Separating the direct and quadrature components of (16) results in: where = is the instantaneous angle of Vref, = 2 , and f is the frequency of the output AC voltage. Considering V1=V2, V19=V20, and using Thales theorem, another relation between vectors' time intervals can be written as (19 (19) Furthermore, the relation between the output voltage and the modulation index (m) is as follows: = √3 ⁄ (20) Using (17)- (22), the time intervals are calculated as follows:  Fig. 7 illustrates the dependency of TST to the angle of . As it can be seen, the maximum values of TST are happened at = /3, while the minimum values acquire at = /6. Due to the dependency of the voltage boost on the TST and according to the varying nature of the duty cycle due to the dependence on θ, the capacitor voltages and the inductor current contains lowfrequency ripples, which are inversely proportional to the switching frequency, meaning that a bulkier inductor is required to reduce the significant current ripple when operating in low frequencies. Therefore, if a constant ST interval is desired, the minimum ST time interval should be used, as shown in Fig. 7. In other words, this method is called the maximum constant boost technique, which has a lower maximum output voltage compared with the intermittent ST time interval.
Vectors' time intervals are calculated likewise for all other sectors. Because the variations of the TST for all sectors are similar to that of sector 1, the averaged value of the TST ( ̅ ) can be calculated to eliminate the dependency of the TST to  .
Considering (27), the boost factor and the voltage gain of the proposed inverter can be calculated as follows and plotted in Fig. 8 for different modulation indexes. Accordingly, employing the maximum boost control method for the proposed network leads to voltage-boost even at the unity modulation index. As mentioned before, this is achieved because of the capability of the proposed inverter to provide an active vector during ST state. One of the consequent advantages of the inverter is reducing voltage stress. Due to employing the maximum boost control method, to derive the stress voltage across the three-phase bridge switches and the auxiliary leg, separate investigations must be used, which are represented in (33), (34), and (35), respectively.

V. COMPARISON WITH OTHER TOPOLOGIES
Achieving a higher boost factor with fewer turn ratios at lower duty cycles in magnetically coupled INs is desirable, which is a key feature of the proposed structure. Fig. 9 illustrates a comparison between the proposed IN and other magnetically coupled IN topologies in terms of the boost factor.
As illustrated, the modified A-Source IN has a higher boost factor for DST higher than 0.2. Although TZ-Source IN shows a higher boost factor, it should be considered that it requires four coupled inductors, which increase the noise, size, and cost of the system. Furthermore, there are limitations to designing some of the magnetically coupled INs, such as choosing the turn ratio. For instance, the turn ratio of ГZ-source is limited to 1 < 1 2 ⁄ ≤ 2. The impact of the turn ratio and the ST duty cycle on the proposed network's boost factor is illustrated in Fig. 10.
A comparison between the normalized voltage stress across the switches of the proposed converter and other three different topologies that used the maximum boost control for impedance networks connected to the H-bridge inverter, including the Zsource impedance network connected to the H-bridge inverter [35], [37] represented in Fig. 11. As can be seen, the proposed two-level A-source impedance network has lower voltage stress across the inverter's switches than the other topologies.  According to the two different output voltage levels of the proposed impedance network, the voltage stress across switches of the auxiliary leg is investigated independently for each voltage level. The NPC inverters, which have a similar leg to the auxiliary leg of the hybrid 2/3 level inverter, are suitable to be compared with. A comparison of the normalized voltage stress across the switches of the hybrid 2/3 level inverter's auxiliary leg supplied by two impedance networks with the maximum boost control [38], without the maximum boost control [28], and the impedance network in [39] illustrated in Fig. 12. As can be seen, the proposed impedance network has relatively lower voltage stress across the auxiliary leg switches for both output voltage levels than the other topologies.

B. Capacitor Selection
The capacitor size can be calculated as follows based on voltage ripple (ΔVC):

C. Voltage Stress Across the Switches and Diodes
Voltage stress is calculated by considering the off state of the switches and diodes. The voltage stress across switches are presented in (33)- (35). The voltage stresses across D1 and D2 are calculated using (40)- (41).

D. Converter Losses and Efficiency
The converter losses generally include two parts: conduction losses and switching losses. The non-idealities considered for conduction losses are the conduction resistance of the inductors (rL), switch on-state resistance (rS), and diodes forward voltage (Vf).
The diode reverse recovery phenomenon and switch current and linear voltage variation during switching transients are considered the source of switching losses. MOSFET switching losses (PSW(S)) is evaluated based on the dissipated amount of energy (ESW) in the switches during switching transitions [40], [41] and given by (45). The theoretically calculated converter power losses are shown in Fig. 13. The value of the parasitic elements and converter specifications used for efficiency calculations are the same as the prototype specifications used for model validation in section VII. Accordingly, the overall estimated efficiency of the converter is 92%.

VII. EXPERIMENTAL AND SIMULATION VALIDATION
To demonstrate the performance of the proposed converter and validate the theoretical concepts, a laboratory prototype is developed (Fig. 14) with the parameters in TABLE III. The prototype contains the proposed A-Source IN connected to the 10-switches three-level inverter (Aux. leg+H-Bridge inverter) with a three-phase RL load.
The experimental tests were carried out under two different scenarios of input voltage to evaluate the converter response to different modulation indexes. Therefore, to generate the AC output voltage of 110V RMS, the modulation index was determined to be 0.8985 and 0.8856 according to (31)- (32) and the values in TABLE III. Hence, the total output voltage of the two-level network should be 6.2 and 7.5 times the input voltage.
In the following, the input inductor current waveform is shown in Fig. 15. The input voltages of the 2/3 hybrid inverter, VO and VO1, are shown in Fig. 16. According to Fig. 15, the experimental peak value of the two-level network (Vo) is 155V for both cases, which is following (31)- (32). The three-phase output voltage, load current, and load voltage for phase-A are shown in Fig. 17(a) and Fig. 18(a), and the three-phase output voltage in Fig. 17(b) and Fig. 18(b), which emphasizes the correct operation of the inverter with RL load in generating the 110V RMS line voltage with different values of input voltage and modulation indexes. It should be noted that the negligible difference between the theoretical and experimental results is due to the existence of leakage in the transformer and parasitic elements. Finally, efficiency curve of the laboratory prototype is measured and shown in Fig. 19.
Furthermore, simulation are performed under two scenarios of perturbation on the input voltage and duty cycle to validate the given theories and especially dynamic behavior of the converter. In the first scenario, shoot-through duty cycle (dST) increased from 0.89 to 0.9 at 0.08 seconds. Output results are according to Fig. 20. As expected, output voltages have been increased and their final values are according to theoretical concepts. Furthermore, in the second scenario, input voltage (Vin) increased from 25V to 30V at 0.08 seconds. Output results are according to Fig. 21

VIII. CONCLUSION
In this paper, a new three-level A-source impedance network and its connection to a 2/3 hybrid inverter were discussed. The structure's main feature is the capability to apply an active voltage vector during the shoot-through state. This improves the boosting ability and reduces the required DC-link voltage of the inverter. The space vector PWM modulation with the maximum boost strategy was presented, and equations were derived. A comparative study with several topologies was performed in terms of the voltage gain and switches voltage stress, which demonstrated the advantages of the proposed inverter. Finally, the validation of the given theories was provided by experimental results with a laboratory prototype.