Medium Voltage Power Switch in Silicon Carbide – a Comparative Study

This paper discusses various solutions of energy conversion in medium voltage using power switches in Silicon Carbide (SiC) technology. In particular, a comparative study is focused on four different variants of an inverter phase leg operating at 1.5 kV DC, which has not been presented in the literature yet. The first one is based on a standard two-level half-bridge built from a 3.3 kV SiC MOSFET power module rated at 450 A. Then, the two-level solution with series-connected devices inside 1.2 kV/450 A power modules is taken into account. Finally, a flying-capacitor phase leg also based on the same 1.2 kV devices is investigated in two different modes: a standard three-level operation and quasi-two-level mode with a significantly reduced capacitor. The presented study is founded on in-depth experiments: all four phase legs were designed, built, and tested in the laboratory. All versions were connected in a half-bridge configuration with an inductive load. Tests were conducted under identical conditions to test the overall performance and switching behavior for various gate resistances. In addition, different aspects are analyzed and compared in this paper, including parasitics, cooling performance, gate drivers and layout considerations, providing selection guidelines for power switches with SiC power devices in medium voltage power electronics applications.


I. INTRODUCTION
Silicon Carbide power devices have a substantial impact on power electronics [1][2][3] employed in energy conversion and management systems, as they offer lower on-state resistances and higher switching speeds in comparison to Silicon (Si) counterparts, and more efficient or/and more compact power converters can be designed [4]. This conclusion may be drawn from a number of research works and industrial applications in various fields where mostly low voltage (650 V to 1200 V) SiC diodes and transistors can be found. In the case of devices developed to operate at medium voltages, an influence of the new technology may be even more significant as SiC MOSFETs reach blocking voltages not available for Si technology [5,6] and can replace Si IGBTs. Thus, in many applications, SiC transistors enable operation at higher DC voltages [7,8], and complex multilevel converters structures required for Si devices can be replaced by two-level ones. At the same time, SiC power devices can compete against Si IGBTs rated at 1700, 3300, and 6500 V in applications where the switching frequency is an essential factor. As the switching energies of SiC MOSFETs with a comparable current rating are usually a few times lower, the outcome of this competition is not hard to be predicted. On the other hand, the cost of SiC power devices, especially those rated at medium voltage, is much higher than Si counterparts. All in all, SiC technology offers new possibilities, but it is not necessarily advantageous in all applications [9]. Another issue is that SiC power devices are still a new technology at medium voltage and, in the authors opinion, a discussion on the most beneficial way to use them is still not over. At the moment at least four approaches can be taken into account.
As mentioned above, using medium voltage (MV) rated SiC devices in simple two-level topologies [1,10,11] is the most obvious as such devices are available. Unfortunately, the cost is a limiting factor, and in this basic case, it has to be balanced with the system's simplicity. On the other hand, many works have been done on series-connection of SiC MOSFETs [12][13][14][15][16][17][18], and a power switch based on less expensive low voltage devices is also an attractive solution.
However, the drawback of this approach is higher complexity. Moreover, there are no power modules with series-connected devices, therefore, the layout is more challenging. Finally, additional effort is also required in terms of the control system. Thus, an interesting alternative to series-connection of SiC MOSFETs is a multilevel flying capacitor (FC) inverter operating in quasi-two-level (Q2L) mode where middle states are used only for a very short time, and thus the flying capacitor is very small [19][20][21][22][23]. Finally, it is also possible to take a well-known path and employ any multilevel topologies using low-voltage SiC power devices [4,[24][25][26]. All these approaches were thoroughly discussed in the literature separately, but a suitable multicriterial comparison, based on experimental models and test, for MV converters employing SiC power devices was missing.
That is why this paper contains a comparative study of four options mentioned above, with circuit schemes and idealized operating waveforms shown in Fig. 1, starting from a twolevel with medium voltage devices (2LMV, Fig. 1a), through a two-level with series-connected transistors (2LSC, Fig. 1b), a three-level flying-capacitor in quasi-two level mode (2LFC - Fig. 1c) to a standard three-level flying-capacitor (3LFC- Fig. 1c as well). All four cases are explained briefly in section II, but here, only general description of the specific approaches, required to understand the basic operation principles, is presented. The idea of this paper is to provide a general comparison useful for designers and researchers for initial choice of an appropriate method to create SiC power switches in medium voltages for a specific application. For more thorough analysis with detailed theoretical description, after the initial choice, the authors recommend to get acquainted with the referenced literature. This work's essence are physical models (section III) and experiments on phaselegs based on 450 A-rated SiC MOSFETs operating at 1.5 kV DC (section IV) along with a thorough discussion and the comparison of the presented approaches shown in section V, while the paper is concluded in section VI.

A. Two-level with medium voltage devices (2LMV)
The basic approach to employ SiC power devices in the medium voltage range is to directly apply single MV transistors as the power switches, as shown in Fig. 1a. The most considerable merit of such a method is the simple structure -a single power module per converter leg is used. Therefore a simple control can be applied (Fig. 1d). The whole leg is compacted within a single power module, thus leading to a more straightforward layout of the power circuit and high cooling capabilities. However, as high dv/dt ratios characterize such power devices, driver design is not trivial [14,[27][28][29]. Finally, even though SiC power devices reaching as high as 15 kV have been shown in the literature [30], commercially available transistors with reasonable current ratings are still limited to 3.3 kV, and thus such a simple approach is not applicable for higher voltage ratings and more sophisticated options have to be considered. Last but not least, the cost of such devices is still high.
B. Two-level with series-connected low voltage devices (2LSC) Series connection of low-voltage transistors is a wellknown method to construct switches capable of blocking higher voltages [31]. In general, this approach is also based on a simple structure. A number of series-connected SiC MOSFETs are used instead of a single transistor, as shown in Fig. 1b. In the discussed case, two transistors per switch are considered, as this provides the possibility to have a transistor pair within a half-bridge power module. Thus the whole leg consists of two such half-bridge modules, however, the best option would be a power module with series connected chips. In an idealized case, each seriesconnected device should receive the same control signal as shown in Fig. 1e, and the leg output voltage vout is identical to the 2LMV case. However, unbalanced voltage distribution among the power devices in the stack leads to a more complex structure of the series-connected system, either through adding supplementary circuits or altering the control scheme, depending on the voltage balancing method used. This is especially prominent for SiC transistors, where the switching speed is very high, and the impact of parasitic parameters and mismatches, leading to voltage imbalances, is higher than in conventional Si power devices [12]. In order to attain safe operating conditions for the series-connected power devices auxiliary structures in the form of simple passive systems (e.g., snubbers or clamping circuits) [31] or more sophisticated active systems, often including additional measurement systems, for example, based on active gate driving or active gate delay methods [13][14][15] have to be employed.

C. Quasi-two-level with low voltage devices (2LFC)
Another approach to employ low-voltage SiC MOSFETs in the MV range is to use the well-known multilevel flying capacitor converter (FCC) structure, showcased in Fig. 1c, in a quasi-two-level control mode [19] -see Fig. 1f -which results in an output voltage shape nearly identical to the conventional two-level approaches. Such a method can, in fact, be recognized as an alternative approach to seriesconnection of transistors, in which a small flying capacitor is an additional component that assures proper voltage distribution among the power devices. While the general operating sequences are akin to a conventional multilevel FCC, the difference is visible in the length of the three-level states -in the Q2L mode, these are employed for very brief moments, usually less than 1% of the switching period, just to balance the voltage among the transistors. Thus, the flying capacitor is very small. However, to sustain proper voltage distribution among the transistors, balanced flying capacitor voltage is also required, which necessitates alterations in the switching pattern and usually requires additional measurement circuits.

D. Three-level with low voltage devices (3LFC)
Finally, employing multilevel converters is also a viable and well-researched approach. A large variety of different topologies may be named, each with its advantages and disadvantages, most notably, neutral-point-clamped, active neutral-point-clamped, T-type, flying capacitor, as well as cascaded and modular structures [32]. Here, the flying capacitor-based system ( Fig. 1c) was chosen because of the similarities to the 2LFC circuit. In the conventional, multilevel-operated FCC, the three-level states are employed for a substantial amount of time, as depicted in Fig. 1g. Therefore, the flying capacitor is quite bulky, as it has to sustain high values of the current. On the other hand, threelevel output leg voltage vout provides a lower harmonic component, and smaller filtering inductance may be applied compared to the discussed two-level options.

III. EXPERIMENTAL SETUP
As a basis of the comparisons, four experimental models rated at 1.5 kV DC were designed, constructed, and testedsee the parameters in Tab. I, where the values in the brackets indicate the parameters for one device. The test setup was in half-bridge topology with an inductive load (roughly 55 µH/400 A choke), so only power losses of the system had to be supplied from the DC source, as presented in the circuit scheme in Fig. 2a, where the red box corresponds to the specific approach showcased in the scheme in Fig. 1a to 1c. DC-link capacitor bank was built from 5 x 150 μF capacitors connected in parallel per half of the DC-link (see Fig. 2b photo of the test circuit) and used for each approach, so that identical electrical conditions from DC-side could have been obtained. For the 2LMV approach, the 3.3 kV, 450 A SiC MOSFET module (MSM450FS33A [33] - Fig. 2c) was selected, the other three options used 1.2 kV modules with the same current rating (CAB450M12XM3 [34] visible in Fig. 2d), as unfortunately, the commercially available 1.7 kV SiC power modules are not as highly-performant, mostly due to enlarged parasitic inductances and high power loss.
Moreover, the heatsink and the liquid cooling system was identical for all the setups. Therefore, the thermal conditions and temperatures for different approaches were strictly based on the individual performance of each system.
The design for 2LMV is the most compact as there is no additional circuitry in this approach. Moreover, the parasitic inductance of the switching loop is minimal due to low internal inductance and a simple layout. On the contrary, the power circuits for the other three approaches with two modules are more complex and contain higher parasitic inductance. The majority of the layout is the same, however, extra components, for instance, flying capacitors, differ for 2LFC and 3LFC. In particular, two 150 µF capacitors connected in parallel were applied for 3LFC to obtain the same voltage ripples as in 2LFC (820 nF, built from 2212 C0G SMD capacitors). These capacitors contribute to an increased inductance of the switching loop. In all three cases, the performance could be improved if a specific, dedicated power circuit for each option existed, including DC-link capacitor selection. Additional control circuitry was also different among the approaches as presented in Tab. I. The 2LSC was based on active gate delay voltage balancing, executed within the gate driver. The operation principle is as follows: the master control sends switching signals as to a conventional single-module half-bridge. Then, each gate driver for the power module, based on DC and one transistor from switch voltage measurement, employing a closed-loop control algorithm implemented into the TMS320F28069 microcontroller included in the gate driver, adds very short delays, in the span of single nanoseconds with a resolution of 150 ps, to the appropriate gate signals to balance the voltage among the transistors in the stack [15]. In the 2LFC approach, the proper voltage distribution among the transistors is ensured with a closed-loop control based on DC and flying capacitor voltage measurement [23], and a hysteretic regulator is also employed. Finally, a standard, less challenging method was applied to the 3LFC.

IV. EXPERIMENTS
The main goal of the performed experiments was to test, validate and compare all developed models and methods under the same conditions close to the real operation of the medium voltage converters, including the assessment of the semiconductor power losses, further used for comparison. Thus, all variants acting as 1.5 kV-rated half-bridges were loaded with identical inductors (Fig. 2b), and a simple square wave control with adjustable frequency was applied. This method enables operation at high voltages and currents (1.5 kV/300 A) with limited power from the DC supply as energy is circulating between load inductor and DC-link capacitors. All in all, current and voltage waveforms presented in Fig.  3a to Fig. 6a for all four approaches are comparable while switching processes illustrated in Figs. 3b to 6b show differences.
At first, Fig. 3 showcases the exemplary results for the 2LMV approach using a single 3.3 kV power module at 12.8 kHz switching frequency. Specific waveforms shown in Fig.  3a confirm the correct operation of the circuit with square wave control -triangle shape of the load current iL and its part contributing to the current of the upper transistor iTL.
Only the turn-off process occurs in such an operation, as shown in Fig. 3b, taking over 300 ns (RG = 1.6 Ω). The advantage of the reduced parasitic inductance is the low overshoot of the drain-source voltage, which reaches a maximum of 1656 V (approx. 10% over DC-link voltage). The turn-off energy calculated from this waveform equals to 61.4 mJ -see Tab. II. Next, Fig. 4 presents the waveforms recorded at the same conditions but for the 2LSC approach with active voltage balancing. Since this is still a two-level topology as well, the inductor current behaves identically as in 2LMV (Fig. 4a). As shown in Fig. 4a and in the zoomed view in Fig. 4b, the balancing loop works properly, and the voltage is evenly distributed across two transistors, leading to safe operating conditions. For the 1.2 kV transistors, the switching speed is much higher, and the parasitic inductance effect is more severe, leading to an overshoot of 22% and maximum drain-source voltage of 915 V at TL2 accompanied by highfrequency oscillations. However, the total energy in the two transistors is equal to 32.2 mJ (@RG = 1.6 Ω) -roughly half of the value measured for the 3.3 kV counterpart (Tab. II).
The results for the 2LFC approach are shown in Fig. 5. Since the Q2L method can be recognized as just another method to connect transistors in series, the general waveforms are similar to 2LSC. However, the current path length is slightly enlarged due to an additional component in the power circuit, namely, the small flying capacitor, and the voltage overshoot was higher as well, reaching approximately 34% with a maximum voltage of 1007 V. Slight increase in the measured turn-off energy is also observed in Tab. II.
Finally, Fig. 6 showcases the results for the 3LFC method. Since the operation is different from the previous approaches, the inductor and transistor current shapes resemble a trapezoidal form due to extended three-level states (Fig. 6a). This also resulted in different RMS current values as well as the operating frequency. In order to compare this method with other approaches, it was decided    to set the operating point so that the switched transistor current was identical as for the different techniques. Due to the additional inductance introduced by the large flying capacitor, the system with 1.6 Ω gate resistance was unstable. Thus, the observed waveforms are shown in Fig.  6b for higher RG = 3.3 Ω, the drain-source voltage reached a maximum value of 1148 V, resulting in an overshoot at 53%. In addition to severe oscillations, a rise of the switching energy to 45.2 mJ is observed (Tab. II). However, this is also impacted by enlarged gate resistance compared to other cases. Based on the measured waveforms, estimations of power losses and junction temperatures were also conducted and are presented in the same Table. They confirm the best performance of the 2LSC approach, highly comparable to the 2LFC variant. The 3LFC method cannot be directly compared at the same switching frequency, as for the same inductance, the power level shifts. Therefore, values in the brackets refer to a possible 12.8 kHz case, mimicking the frequency for two-level approaches used for comparison, where the switching energy loss was scaled using larger frequency. All in all, it seems that this approach is less favorable in terms of power loss, but the worst case is 2LMV.
In the further measurements, the same tests were performed but for higher values of the gate resistors -see results in Fig. 7. Moreover, it is worth noting that the internal gate resistances for both modules were highly comparable (2.5 Ω vs 2.6 Ω) and thus omitted in the comparison. With the slowest slopes, problems with voltage overshoots and high-frequency oscillations decrease, and, in consequence, the 3LFC variant becomes closer to 2LSC and 2LFC. On the other hand, the distance between the best case and 2LMV rises.

V. DISCUSSION & COMPARISON
In this section, all four approaches are analyzed and compared using different factors starting from the converter layout through gate driver issues to the system cost, based on the performed tests, as well as on insights from referenced    Table III. Note that this comparison is performed for a 1.5 kV DC system with 450 A modules, and not all conclusions may be suitable for other current/voltage ratings.

A. Quality of waveforms at the input/output
Three out of four systems are two-level, while the 3LFC delivers regular three-level voltage to the phase output. For the same switched power and frequency, the content of highfrequency components in output voltage with this variant is lowest, and current ripples are also less severe than in the other approaches. The other three options show the same performance, waveforms in Fig. 5a prove that a short middle state in the 2LFC case makes very little difference. Similar observation can be done in terms of EMC performance: a common-mode noise is less severe for the three-level converter and 2LFC (due to middle states dv/dt is comparable to 3LFC). All in all, a classic multilevel approach seems to be preferable from this point of view.

B. Power layout -parasitic inductances
In terms of power circuit simplicity 2LMV approach is the most convenient, the parasitic inductance and switching conditions are as good as the module packaging [35,36] and busbar design [28]. As recent SiC MOSFET modules are improved compared to previous versions and the layout of this half-bridge is not challenging, the results in Fig. 3b prove low inductance. At the moment of the paper writing, it was not possible to find a commercial module with seriesconnected SiC MOSFETs inside. Therefore, the 2LSC option requires two low voltage modules, and the switching loop inductance contains internal inductances of two modules (each of the considered components shows 6.7 nH [34]) and additional connections. But this approach seems advantageous over 2LFC and, especially 3LFC with the large capacitor causing higher inductance and voltage overshoots (Fig. 6b). When the 2LFC approach is discussed, the smaller capacitor is less inductive, and the way of connecting to the circuit is less complex, resulting in better performance.

C. Power losses
In the considered case of 450 A rated modules, the on-state resistance of 3.3 kV SiC MOSFETs (rDS(ON) = 5.3 mΩ) is clearly higher than in 1.2 kV counterparts (2.6 mΩ), but two low-voltage devices are required per switch position. The resistance increase with junction temperature is more visible for MV transistors (87.5% vs. 60% for the rise from 25°C to 150°C [33,34]). Thus, the conduction losses for the same current are slightly lower for low-voltage modules.
The results in Tab. II proves that the switching losses are dominant, and the low voltage devices outperform the medium-voltage counterparts. A datasheet-based comparison of switching energy per pulse rated to switched power shows an approximately ten times higher value for MSM450FS33A than for CAB450M12XM3 (802 mJ/kW vs. 78 mJ/kW [33,34]). In practice, the switching speed of the 3.3 kV module can be increased over datasheet values while low-voltage modules suffer from the voltage overshoots increasing switching energies, and the difference is not as significant. The lowest values of switching losses are observed for series-connected devices, while Q2L operation leads to slightly higher loss. Next are the same modules in three-level operation and the definitely worst case, 2LMV, due to a much slower switching process and significantly higher switching energy.

D. Power layout -cooling
In this aspect, all three solutions with low voltage devices are similar and should be compared together to the 2LMV version. Higher chips size of the medium-voltage power module and a special nHPD2 package offer very low thermal resistance (39 K/kW for MOSFET [33]) -in the case of the low-voltage module, these values are higher (110 K/kW -MOSFET [34]). The heat exchange area is also much higher for MSM450FS33A (140 cm 2 vs. 42.4 cm 2 ), but this may also impact contact resistance. On the contrary, the power losses are distributed among two smaller power modules (84,8 cm 2 in total), and the heat source is more spread among the heatsink. It is also less challenging to obtain low contact resistance. All in all, it seems that the 2LMV solution is better when cooling is considered, but a higher amount of power loss ends with higher junction temperatures.

E. Gate drivers and auxiliary units
The 2LMV approach with two transistors and standard gate drivers is preferable as the least number of drivers is apparent. On the other hand, four gate drivers are necessary for the other three options, but the crucial disadvantages lie in auxiliary circuits. 3LFC approach always requires an additional voltage balancing system, the same for 2LFC. The worst-case here is the series-connection of the lowvoltage devices (2LSC) as a complex control system with fast measurements and high-resolution PWM control must be applied.

F. Reliability and robustness
Long-term reliability data for new SiC technology is limited, especially for medium voltage devices, which can be more problematic due to higher blocking voltages. Thus, at the moment, it can be predicted that, similarly to Si transistors, devices in 3.3 kV power modules are less reliable than their 1.2 kV counterparts. On the other hand, when the whole system is considered, the number of components in 2LMV is the lowest, while the other three approaches require twice as many transistors and additional auxiliary circuits. The authors believe that two cases 3LFC and 2LFC, would be comparable: 3LFC contains the capacitor operating at high current while 2LFC requires additional circuitry. Again, the system that is the most prone to reliability issues seems to be 2LSC variant as a failure of any component, also in the active balancing system, ends in complete damage of the phase-leg and the time constants to respond to these faults are much shorter compared to 2LFC, and, especially 3LFC, options, as the flying capacitor stores some energy and is capable of enduring faults longer.

G. Cost
At this point, the time scale is crucial as medium-voltage SiC technology is delayed and less popular in reference to low-voltage devices available on the market for almost ten years and currently mass-produced. Thus, it is highly likely, that cost factors may change in the future when MV devices also reach higher production volumes, but at the moment, the 1.2 kV modules are around 6-7 times less expensive. Even for two modules necessary in 2LSC, 2LFC, and 3LFC, this factor is unfavorable. On the other hand, 3LFC requires an additional capacitor rated at a high current, while 2LSC and 2LFC need additional measurements and control blocks. However, the cost of these components for the auxiliary circuitry is rather low compared to the medium-voltage power module.

H. Start-up issue
Finally, the last issue is the start-up. Obviously, the 2LMV approach is the simplest as no additional control mechanisms are required, and the systems boots with no issue. When 2LFC and 3LFC methods are considered, there is the need to precharge the flying capacitor or implement special start-up procedures, leading to more complicated control. Lastly, the 2LSC approach also requires addressing this issue, as even when active methods are used, initial voltage conditions may lead to transistor breakage, either in the form of auxiliary circuits or start-up procedures.

VI. CONCLUSION
The comparative study conducted in this paper shows different aspects of MV power switches in SiC technology. While the specific approaches, namely 2LMV, 2LSC, 2LFC and 3LFC, were already presented and analyzed in the literature, a fair comparison with identical operating conditions for all approaches was missing. The conclusions are based on a thorough experimental and multicriterial comparison conducted for four methods, and at such power level (1.5 kV and 300 A). When power losses and system efficiency are key factors, low voltage components are the best choice. In particular, the series-connection of lowvoltage transistors shows extraordinary performance, which may be improved with dedicated low-inductive power modules. The additional gain is a low junction temperature and reduced cost, however, the control circuitry is complex. Comparable gains can also be achieved with Q2L operated flying capacitor phase-leg, which in terms of system complexity and reliability is even better than seriesconnection. This approach is relatively new but seems that it may become popular at medium voltages. But those who can afford system simplicity would definitely prefer a mediumvoltage power module. However, in addition to higher cost, an increase in power loss and junction temperature must be taken into account. This approach may look better in a longer time perspective under the assumption that the prices of MV power modules decrease with higher volume. Finally, multilevel solutions, in particular FC topology, may also be attractive for the users familiar with these topologies despite slightly worse switching performance. Last but not least, this approach may also become more favorable when suitable power modules will be available on the market. PRZEMYSŁAW TROCHIMIUK received the B.Sc. and M.Sc. degrees in electrical engineering from the Warsaw University of Technology (WUT), Poland, in 2017 and 2018, respectively, where he is currently pursuing the Ph.D. degree with the Institute of Control and Industrial Electronics. His main research interests include SiC-based power converters, energy conversion in MV range with series connection, active gate drivers of power SiC MOSFETs, as well as power converters for EV fast charging stations and renewable energy sources. He also works on magnetic issues in power electronic converters and, recently, on EMC concerns in power supply units. His current research interests include power converters based on wide bandgap devices: topologies, design aspects, pulse width modulation techniques, and, especially, gate and base drivers. Moreover, he also works in area of medium voltage power conversion and, recently, on power converters for EV charging. In 2012-2015 dr. Rabkowski was a chairman of the Joint Industrial Electronics Society/Power Electronics Society Chapter in the frame of the IEEE Poland Section. He has been an Associate Editor of IEEE Transactions on Power Electronics since 2015. He is also a member of the European Power Electronics and Drives Association, involved with the International Scientific Committee. Dr Rabkowski is a co-author of over 190 scientific papers and two books.