DC Performance Variations by Grain Boundary in Source/Drain Epitaxy of Sub-3-nm Nanosheet Field-Effect Transistors

Grain boundary (GB) at the source/drain (S/D) epitaxy was investigated using fully-calibrated TCAD. Because the S/D epi is grown separately at the bottom and the NS channels, nanosheet field-effect transistors (NSFETs) have unwanted GB within the S/D epi which fully relaxes the channel stresses. This GB changes the doping profiles and the stress values, which thus degrade the DC performances. We focused on single GB with different inclined angles and positions. N-type NSFETs have similar DC performances regardless of the GB since the changes of doping and stress were small. P-type NSFETs suffer from DC performance degradations but different depending on the GB positions. As the GB splits the p-type S/D epi into two, lower S/D below the GB has tensile stress and upper S/D above the GB has compressive stress. Since tensile stress increases boron diffusivity, more boron dopants diffuse into the NS channels as the device has lower S/D region, thus suffering the short channel effects greatly. The device having upper S/D region loses the channel stress much, so it degrades the on-state performance. This study provides clear understanding of the GB effects of NSFETs.


I. INTRODUCTION
Silicon gate-all-around nanosheet field-effect transistors (NSFETs) have been introduced as one of the strong candidates to substitute FinFETs by achieving higher gate-tochannel controllability and greater current drivability [1]. Since the NS widths (W NS ) are easily tuned, more flexible device design is possible to optimize power and performance under the given footprint [2], [3]. However, similar to FinFETs, NSFETs also suffer from device-to-device variations as the devices are scaled down aggressively.
The associate editor coordinating the review of this manuscript and approving it for publication was Adamu Murtala Zungeru .
Previous work analyzes the process variations between FinFETs and NSFETs in detail [4]- [16]. Because NS channel thickness (T NS ) is determined by epitaxial growth instead of anisotropic etching for fin, T NS variation is negligible [1], [4], [5], and thus induces smaller DC performance variations than FinFETs. But other variation sources such as critical dimension for anisotropic etching source/drain (S/D) and middle-of-line [7] and parasitic bottom transistor induced by S/D over-etching [17]- [20] affect the variations of NSFETs greatly. There are also the process variations uniquely for the NSFET process such as SiGe 0.3 /Si intermixing [21], work function (WF) variation by limited NS spacing [22]- [24] and crescent inner-spacer [25], [26]. Meanwhile, since the S/D epi is grown separately from the bottom and the NS channels, S/D epitaxies of NSFETs have unwanted grain boundary (GB) which fully relaxes the channel stress [27], [28]. However, there are no quantitative analyses of the GB effects to the device performances.
Therefore, in this work, we analyzed GB-induced DC performance variations of sub-3-nm n-and p-type NSFETs using fully-calibrated TCAD which considers the device structure and the experimental transfer curves at two different drain voltages (V DS ) for fitting. By changing the position and the inclined angle of GB (A GB ), we investigated doping profiles and stress values of the devices, and identified the physical effects to the DC performance variations in detail.

II. DEVICE STRUCTURE AND SIMULATION METHOD
All the NSFETs were simulated using Sentaurus TCAD [29]. Drift-diffusion transport model was solved along with Poisson and electron/hole continuity equations. Slotboom bandgap narrowing model was adopted to consider dopingdependent bandgap. Density-gradient quantization model was used for the structural and electrical confinements of carriers within the NS channels. Mobility models used in this work were Lombardi for the channel interface, lowfield ballistic model, and inversion & accumulation layer model for impurity, phonon, and surface roughness scatterings. Shockley-Read-Hall generation-recombination model was used. Hurkx band-to-band tunneling model was used to consider the gate-induced drain leakage. Deformation potential model was used to consider the stress effects to the bandgap, effective mass, and effective density-of-states. All these models were used equivalently as in [3], and the NSFETs were calibrated as in [30]. Fig. 1a shows 3-D schematic diagram of p-type NSFET. We used rectangular S/D and focuses on the GB effects only. S/D and gate are arranged repetitively, and the deviceunder-test is at the middle. All the process flows are the same as in [4] except the GB formation. We turned on stress-rebalancing step only when we form the GB in S/D epi to reflect GB-induced stress effects. We adopted advanced calibration to consider the doping profiles induced by stresses and GBs of Si and SiGe which were calibrated with experimental data [31]. The GB splits S/D epi into two at different A GB . Table 1 shows geometry parameters and their values. Gate length (L g ) is 12 nm for sub-3-nm node, which is similar to the L g for the 3 nm node in [3], [10], [32], [33]. Equivalent oxide thickness, adding SiO 2 and HfO 2 thicknesses, is 0.8 nm. Doping concentration for punch-through-stopper (PTS) is 5 × 10 18 cm −3 to prevent sub-sheet leakage current.    the |V DS | of 0.70 V. There are four different A GB of 36.9, 56.3, 66.0, and 71.6 • which form the GB touching at the middle of NS spacing regions and the PTS region. These four A GB values were used to understand how the GB affects the NS channels each. Threshold voltages (V th ) are extracted using constant current method at the I th of 10 −8 W eff /L g , where W eff is the effective width (2N NS ×(W NS +T NS )). The NSFETs with no GB have the greatest on-state currents (I on ) and the smallest short channel effects (SCEs). N-type NSFETs have similar V th and I on , but p-type NSFETs decrease V th and I on as the A GB increases. Fig. 3 shows the doping profiles of p-and n-type NSFETs. All the units for doping concentration are cm −3 . GB is indicated as yellow dotted line. For p-type NSFETs, as the  GB splits drain epi into two, boron dopants greatly penetrate into the NS channels which are located next to the GB in the horizontal direction. For example, at the A GB of 36.9 • , only top NS channel is affected by the GB and has large penetration of boron dopants. As the A GB changes to 66.0 • , boron dopants diffuse into all three NS channels greatly. On the other hand, all the n-type NSFETs have similar doping profiles regardless of the A GB . For both n-and p-type devices, doping profiles of sub-sheet regions are not affected by GB. Fig. 4 shows the stress profiles (stresses in the channel direction: S ZZ ) of p-and n-type NSFETs. All the units for S ZZ are GPa. For n-type NSFETs, the GB decreases the S ZZ of the NS channels, but the S ZZ does not change much. The n-type NSFET with no GB has 0.868 GPa in average for all the NS channels, and the device with GB at the A GB of 66.0 • has 0.675 GPa in average (−22 %). However, p-type NSFETs decrease S ZZ significantly by the GB, described clearly that highly-stressed blue region vanishes as the GB splits the drain epi (Fig. 4). The p-type NSFET with no GB has −2.03 GPa in average for all the NS channels, but the device with GB at the A GB of 66.0 • has −1.01 GPa in average (−51 %).
The GB also affects the S ZZ of drain epi, and this affects the dopant diffusion into the NS channels. Compressive stress and Ge content increase phosphorus diffusivity, whereas tensile stress increases boron diffusivity [34]. NS channels have Ge diffused from SiGe 0.3 spacing region [21], but it is not affected by the GB. So, all the n-type NSFETs have similar Ge contents within the NS channels. N-type NSFETs have compressive stress right below the GB, but its value is not large enough to change the phosphorus diffusivity. Thus, n-type NSFETs without and with GB have similar doping profile as shown in Fig. 3. Thus, because n-type NSFETs have small decrease of S ZZ and similar doping profile, I on change by the GB is small.
On the other hand, p-type NSFETs lose compressive stress greatly as the GB presents and there is tensile stress below the GB within the drain epi. This induces more boron dopants diffusing into the NS channels. Since p-type NSFETs with GB lose the S ZZ and have much amount of boron dopants inside the NS channels, p-type NSFETs degrade the SCEs as well as the I on .

B. DC PERFORMANCE VARIATIONS BY SINGLE GB: ALL CASES
For the case 1, n-type NSFETs are not affected much by the GB, whereas p-type NSFETs degrade the DC performances greatly. Since n-type NSFETs show similar aspects of DC performance changes by GB for all the cases, we do not address n-type NSFETs further. Fig. 5 shows the subthreshold characteristics of p-type NSFETs without and with GB at different A GB for all the cases. Drain-induced barrier lowering (DIBL) was calculated by the V th difference at the |V DS | of 0.05 and 0.70 V. Subthreshold swing (SS) was calculated by using four points below the V th . Cases 1 & 3 suffer from V th decrease and SS increase greatly as the A GB increases. Especially, case 3 has the worst V th decrease from 0.393 to 0.359 V as the A GB increases to 71.   The bottom of Fig. 6 shows the energy band diagrams for no GB, case 1, and case 3 at the A GB of 71.6 • . Case 3 has the GB at the source epi, so more boron dopants diffuse into the source-side NS. As the doping concentration increases, the energy barrier at off state becomes lower. Thus the top-of-the-barrier is formed near the drain. Case 1 has the doping profile opposite to case 3, thus forming the top-ofthe-barrier near the source. The device with no GB has the highest energy barrier, so it is much immune to the SCEs than the devices having GB. Case 3 has worse SCEs than case 1 because the energy barrier height is the smallest as −0.28 eV at off state. Thus, case 3 has larger DIBL than  case 1. For the same reason, case 4 has smaller energy barrier height than case 2, thus having larger DIBL than case 2. Fig. 7 summarizes the I on and the off-state currents (I off ) of p-type NSFETs for all the cases. Both I on and I off are the drain currents (I ds ) normalized by the W eff . WF of all the devices are fixed at the same value where the device with no GB has the I off of 0.1 nA/µm. Operation voltage (V DD ) is 0.70 V. I on or I off changes are significant when the GB presents in the source epi (cases 3 & 4). As the A GB increases, cases 1 & 3 increase the I off greatly, whereas cases 2 & 4 decrease the I on greatly. Since cases 1 & 3 decrease V th and increase SS, the I off increase greatly. Case 3 increases the I off by 275 % at most, and case 4 decreases the I on by 26 % at most as the A GB changes.
The reason why cases 2 & 4 degrade the I on much than cases 1 & 3 as the A GB increases is explained by Figs. 5 and 8. S ZZ values are averaged within all the NS channels. All the cases lose the S ZZ as the A GB increases, and the I on of p-type NSFETs are degraded greatly as a result. For cases 1 & 3, higher boron concentration within the NS channels also degrades the I on by reducing hole mobility [7], but it is compensated by the I ds shift toward right due to the increased SCEs. On the other hand, cases 2 & 4 do not shift the I ds much due to the similar SCEs (similar V th at different A GB ), so the small S ZZ mainly affects the DC performance and thus decreases the I on greatly. VOLUME 10, 2022  But the I on increase for all the cases as the A GB increases from 66.0 • to 71.6 • . For cases 1 & 3, this is because the I ds shift by the increased SCEs is severer than the S ZZ reduction. The devices have smaller V th as the A GB increases toward 71.6 • (Fig. 5). But all the NS channels already lose the S ZZ at the A GB of 66.0 • and further increase of A GB does not change the S ZZ much (Fig. 8). So, the I ds shift increases the I on . For cases 2 & 4, the I on increase is due to the increase of S ZZ under the similar SCEs. Since the upper S/D next to the NS channels becomes larger as the A GB increases from 66.0 • to 71.6 • , the devices have larger S ZZ and thus larger I on .  Fig. 9 shows the p-type NSFETs having double GB at the source epi. This is the mixture of cases 3 and 4. Similar to single GB cases, double GB also affects the boron doping profiles. Here the bottom NS channel is not affected by the GB since the GB is not present next to the bottom NS channel. But top and middle NS channels have large amounts of boron dopants. Fig. 10 summarizes V th , I off , and I on of p-type NSFETs without and with GB at different A GB . Single GB shows the worst case only to compare with double GB. With respect to the A GB , V th and I off changes of single GB are from case 3, and I on changes of single GB are from case 4. P-type NSFETs with single and double GB have similar DC performance degradations, indicating that the double GB has an additive effect of two single GB cases. Thus, the combinations of single GB cases can explain the DC performance variations by double GB. Fig. 11 shows the I on /I off of p-type NSFETs for all the GB cases at different A GB . Cases 1 & 3 suffer from small I on /I off as the A GB increases because the I off increase greatly along with the I on decrease. Especially, case 3 has the smallest I on /I off among all the single GB cases. The I on /I off of cases 2 & 4 decrease as the A GB increases but less than cases 1 & 3 because the I off do not change much. At the A GB of 36.9 • , cases 2 & 4 have larger I on /I off than the devices with no GB since the I off decrease much than the I on . P-type NSFETs with double GB suffer from the I on decrease by S ZZ reduction (similar to case 4) as well as the I off increase by dopant penetration (similar to case 3), thus showing significant I on /I off decrease.

IV. CONCLUSION
We address the DC performance variations induced by the GB inside the S/D epi of NSFETs using fully-calibrated TCAD. Single GB splits the S/D epi into two and changes doping profiles and S ZZ of the channels and the S/D regions. N-type NSFETs have small changes of I off and I on . P-type NSFETs suffer from the I on decreases along with severer SCEs, but DC performance degradations are different depending on the positions and angles of GB. Cases 1 & 3 induce more boron dopants diffusing into the channels, so the I off and SCEs degrade greatly. Cases 2 & 4 lose compressive stress of the channels much rather than changing doping concentration, thus degrade the I on greatly. Double GB shows similar DC performance variations as the one having two different single GB. Therefore, this work provides clear understanding of DC performance degradations of n-and p-type NSFETs by the GB.