A Detailed Full-Order Discrete-Time Modeling and Stability Prediction of the Single-Phase Dual Active Bridge DC-DC Converter

The standard methodology to obtain the model of a power electronic converter is achieved by averaging the state-space dynamics of the converter’s state variables. But the average of the transformer current is null over a switching cycle in the resonant dc-dc converter. Therefore, the conventional method is not suitable for resonant converters, including the phase-shifted bidirectional dual active bridge (PSBDAB) converter. The two-time scale discrete-type models can resolve the problem associated with the standard state-space averaging methodology. The time-scale segregates the dynamics of the PSBDAB converter into fast and slow state variables, which can be modeled separately and eases the analysis of the PSBDAB converter. The effect of the core-loss of the inductor, dead-time of the semiconductor devices, output filter capacitor’s equivalent series resistance, semiconductor on-resistance, and the transformer copper loss components are included in the model to improve its steady-state and dynamics characteristics. Moreover, the stability analysis using a bifurcation diagram is carried out for the digitally controlled closed-loop of the system. Furthermore, the critical gain for the stable region with variations in the circuit parameters like load resistance, circuit equivalent inductance, and voltage demand is extensively studied. The modeling and stability analysis is validated in the simulation and experimental setup. The results verify that the proposed method accurately predicts the stable region with variations in the system circuit parameters. Thus this study provides a guide to select and tune the controller parameter to ensure the converter operates within the boundaries of the stable region.


I. INTRODUCTION
The phase-shifted bidirectional dual active bridge (PSBDAB) converter has been used extensively in various applications like a solid-state transformer (SST) [1], more-electric aircraft [2], automotive application [3], microgrid [4]. It is of utmost importance to properly analyze converter behavior and dynamic performance to get the best performance.
The associate editor coordinating the review of this manuscript and approving it for publication was Meng Huang.
A system's dynamics or behavior can be studied through detailed time-domain simulation (DTDS) software like MATLAB, PLECS, PSIM. However, the computation burden is much higher compared to its equivalent circuit model (ECM) [5]. Moreover, the converter's essential characteristics, like the critical gain of the closed-loop controller to ensure stability or the critical phase-shift between the bridge to ensure soft switching, can only be obtained by manually tuning the control parameters. This requires a lot of fine-tuning and becomes cumbersome when applied with varying circuit parameters. Therefore, there is necessary to obtain a simple but accurate model to study the system's behavior. Moreover, the model of the system assists in selecting and designing the semiconductor device, inductor, transformer, filter capacitor, and closed-loop controller. There are some modeling methodologies to obtain the ECM of the PSBDAB converter that is classified as continuous-time models and discrete-time models.
The simplest continuous-time model excluding input and output filter components from the system dynamics has two state variables. These two state variables (transformer current and output filter capacitor voltage) are used to study the nonlinear characteristics of the PSBDAB converter [2]. The average of the transformer current in a full cycle of the PSBDAB converter is zero [2]. Hence the PSBDAB converter can be modeled by ignoring the effect of the transformer current dynamics on the system behavior. The expression of the output voltage or output current (which is required for control) is obtained by studying the dynamics of rectified transformer current [1]. This kind of methodology where one of the state variables' dynamics is ignored is known as reduced-order modeling. The reduced-order-model of the PSBDAB can be classified as a continuous-time reduced-order model (CTROM) [6]- [11], Fourier series reduced-order-model (FSROM) [1], [12] and frequency domain reduced-order model (FDROM) [13]- [16]. Other methods use both state variables (full-order) to model and study the large and small-signal behavior of the system. These kinds of techniques to obtain the full-order model of the PSBDAB converter are known as a generalized average model (GAM) [17]- [22] and discrete-time model (DTM) [3], [23]- [27].
The CTROM of the PSBDAB converter is also known as average value modeling (AVM). Dependent current sources substitute the semiconductor devices of the converter. The expression of the dependent current source is the average value of the current flowing through the semiconductor devices over a time period of the converter. The AVM in [6] is obtained from the expression of the power by applying the conventional state-space averaging method [5], and then the output current is obtained for the ideal case. The exclusion of the system losses from the model reduced the overall efficacy of this model. The effect of all kinds of system losses except the core-loss of the inductor is considered in [7], [11] to improve the model accuracy. This method is extended to model a dual active half-bridge-converter in [8] by only considering the dynamics of the output voltage. The reduced-order modeling is also used to develop the model of a modular architecture of the PSBDAB converter [10], which helps to achieve the decoupled control strategies between the modules.
The behavior of the PSBDAB converter is identical to the synchronous machine model [1]. Therefore, its state variables can be expressed as the sum of the fundamental and higher-order switching frequency components. Since the primary and secondary voltages of the transformer are square waves or three-level pulse voltages, it can be expressed as a Fourier series [12], [28]. Likewise, the Fourier series expression can describe the transformer current, output power, and output voltage [12] of the system. The smallsignal model (SSM) and large-signal model (LSM) obtained through the FSROM is also a reduced-order type model due to the zero average of the transformer current or the inductor current.
The FDROM of the PSBDAB converter [13]- [16] is very identical to the FSROM [1], [12]. The difference between these two is that the current dynamics of the transformer current are not studied in the FDROM. The ripple in the transformer current and output voltage can be established in the FSROM. The output power of the PSBDAB converter is first computed using the infinite series sum followed by obtaining the expression of the output voltage. Similar to the CTROM [7], the equivalent SSM and LSM of the PSBDAB converter can be expressed through the dependent current source. The frequency-domain modeling in [14] is applied to model phase-shift, or duty cycle modulated control [29] of the PSBDAB converter. The same method has been applied to the three-phase PSBDAB converter [13]. A new frequency domain methodology based on the Floquet and Hill theory [30] is proposed to obtain the SSM and LSM of the PSBDAB converter [15]. The model in [15] also includes output and input filters in the system's model. In [16], the authors have analyzed the steady-state operation of a high-frequency PSBDAB converter whe0n the switching transition times cannot be neglected. It has been shown that expressions of power and the soft-switching range can be inaccurate if voltage transitions are considered instantaneous. This scenario is essential for the wide bandgap (WBG) devices that have low output capacitance.
The conventional continuous-time state-space based modeling of a power electronic converter system is based on the assumption that the DC part of its Fourier series dominates the behavior of the state variable. However, it is not true in the case of the resonant converter like the PSBDAB converter. Therefore, GAM includes the dc term, cosine term, and sine term of the Fourier series, which improves the dc-dc converter's modeling accuracy [17]. The averaging of the Fourier series is performed on the finite time duration of the state variables. The first literature to model a power electronic converter using GAM was proposed by Sanders at MIT [17]. The same methodology is then applied to the PSBDAB converter by Qin [18]. However, when the ESR of the input or output filter capacitor is added to the GAM, the number of state variables is increased from three to six. The accuracy of the GAM is compromised to simplify the model by disregarding cosine and sine components of the higher-order Fourier series term. The higher frequency Fourier series component of the switching frequency is added to GAM in [21] to improve the efficacy of the SSM and LSM. But the number of state variables is increased to nine. The performance of GAM is much better for the three-phase PSBDAB converter due to the absence of the odd multiples of the third harmonic switching frequency component in the Fourier series [9]. This helps to accurately predict the stable region of the three-phase PSBDAB dc-dc converter [22]. The efficacy of the single-phase PSBDAB converter can be improved by introducing a correcting factor that compensates for the error caused by the absence of the higher-order Fourier-series component [19]. The correcting factor uses the analytical solution of the power flow [28]. The accuracy can be further improved by introducing a second correcting factor to compensate for the system losses [20]. Moreover, the same methodology is applied to phase-shift, and advance modulation strategy [29]. GAM can also be used for the stability prediction of the three-phase PSBDAB converter [22]. However, GAM's accuracy is only good when two correction factors are introduced [20], or a high number of the state variable is included in the model [21].
The power electronic converter system modeling can be obtained through the discrete-time domain to predict the steady-state, and dynamic response of the pulse width modulated converters [31]. The discrete-time system can give the state variable's information at each sub-interval. The information of the transformer current at the switching time helps to study the zero voltage switching region of the PSBDAB converter [27]. The accuracy of the SSM obtained through DTM of a dc-dc converter is better than its continuous-time counterpart [32]. The DTM of a PSBDAB converter has been developed in [3], [23]- [27]. The modeling approach in [3], [24] does not explore the behavior of the systems at steadystate, open-loop, or the stability of the system. The bilinear DTM is used to predict the stability margin of a closed-loop system. However, bilinear DTM doesn't discuss the behavior of the converter's dynamics in the open-loop, which helps to integrate the battery with the PSBDAB converter [2]. The mixed system-based modeling of the PSBDAB converter is proposed in [27]. Although the modeling obtained in [27] discusses the LSM of the model unlike, [3], [23], [24], the system loss is neglected in the model. The mixed system model developed in [27] is lossless, which limits its accuracy at a higher frequency. Moreover, the absence of the transformer current dynamics limits its use in the stability analysis of the model. Therefore, a time-scale model considering the dead-time of the semiconductor devices, core-loss of the inductor, and other system non-linearity are included in The inclusion of the filter ESR improves the stability prediction of the system. 2) The proposed TTSM includes the dead-time of the semiconductor devices and core-loss of the external inductor, which improves the SSM and LSM in the light and heavy load. The past work on the TTSM [27], [33]- [36] only provides an ideal model of the converter. The unavailability of the system loss component from the model affects its steady-state and dynamic accuracy.
3) The effect of circuit parameters like load resistance, filter capacitance, external inductor inductance, and the voltage demand on the stability prediction is discussed. 4) A detailed analysis and comparison of proposed TTSM, FSM [1], [12], AVM [7], DTM [24], GAM [18] for the open and closed-loop behavior of the system have been presented. The proposed TTSM offers the best accuracy among the methods in the literature. Moreover, the proposed model can predict the critical gain to ensure the stable operation of the converter.

II. CONVERTER OPERATION AND ITS DESCRIPTION
The PSBDAB converter consists of two H-bridges connected through the medium frequency ferrite transformer. There is an external inductor L ext connected between the transformer and one of the H-bridge, as shown in Fig. 1. The external inductor L ext can be used as a control parameter to limit or manage the power flow in the PSBDAB converter [37]. The transformer primary to secondary turn ratio of the converter is denoted by N ps . The output filter capacitance, switch conduction loss resistance, transformer input side & output-side resistance, the inductance of the external inductor, external inductor total loss resistance, and load resistance is denoted by C o , R sw , R pt , R st , L ext , R ext , and R, respectively. The effective loss resistance of the inductor R ext consists of the core loss component R co and the copper loss component R cu . The overall resistance and inductance of the PSBDAB converter referred to the output side of the transformer is denoted by r e f and L e f . The exact expression of r e f and L e f can be represented as, The wide bandgap semiconductor devices like SiC or GaN can be used to form an H-bridge, which improves the efficiency and power density of the converter. The signal from the controller given to the semiconductor devices S p1 − S p4 and S s1 − S s4 has a 50% duty cycle. The flow of power is controlled through the phase-shift difference between the primary and secondary side bridges V p and V s , respectively. The steady-state waveform of the primary-side bridge voltage, secondary-side bridge voltage, transformer current, rectifier transformer current, and output filter capacitor voltage of the converter are shown in Fig. 2. The phase difference between the bridges for the primary and secondary for the forward power flow is dT /2. The analysis and expression of the inductor current, output voltage, or other important characteristics of the system remains the same for input voltage greater than the output voltage or vice versa. The waveform in this paper shown in Fig. 2 assumes that the input voltage is greater than the output voltage. There are four sub-intervals in the phaseshifted controlled PSBDAB converter, as shown in Fig. 3. The description of each sub-interval for the forward power flow is as follows. a) Sub-interval I [t 0 , t 1 ]: The gating signals are applied to the primary side switches S p1 and S p4 to turn it on at t 0 . The voltage across the input side H-bridge (V P ) for the first sub-interval is V in . Since switches S s2 and S s3 are still conducting, the voltage across the H-bridge at the output side V S will remain at −V o . The voltage across the external inductor V ind is more than zero in the first sub-interval; the transformer current i(t) increases from I 0 to I 1 . The negative transformer current at time-instant t 0 illustrates the switch S p1 and S p4 are turned on with zero voltage switching. b) Sub-interval II [t 1 , t 2 ]: The secondary side switches S s1 and S s4 are turned on at t 1 . The input side H-bridge voltage V p remains the same at V in . The polarity of the voltage across the H-bridge at the output side V S changes from −V o to V o . The transformer current increases in this sub-interval from I 1 to I 2 . However, the transformer current will decrease from I 1 to I 2 when N ps V in is less than V o . The positive transformer  c) Sub-interval [t 2 , t 3 ]: The primary side switches S p1 and S p4 are turned off & S p2 and S p3 are turned on at t 2 . Therefore, the polarity of the input side bridge voltage changes from V in to −V in , as shown in Fig. 2. The secondary side bridge voltage V S remains the same at V o . The voltage across the external inductor V ind is less than zero, the transformer current decreases from I 2 to I 3 . The positive transformer current at time-instant t 2 means that the switches S p2 and S p3 have been turned on with zero voltage switching.
The gating signal to the output side semiconductor devices S s1 and S s4 are removed, while gating signals are applied to the devices S s2 and S s3 at t 3 . The input side bridge voltage for this sub-interval is the same as the last sub-interval at V in . The output side bridge voltage V s reverse its polarity from V o to −V o . The transformer current reduces from I 3 to I 4 for N ps V i > V o . The negative transformer current at time instant t 3 means that the devices S s1 and S s4 are turned on with zero voltage switching. The fourth sub-interval end at the switching period T .

III. CONVENTIONAL DTM OF A PSBDAB CONVERTER
The state variables of the PSBDAB converter are transformer current and capacitor voltage. The dynamics of the VOLUME 10, 2022 state-variable in each sub-intervals can be represented as [23], where, α = 1, 2, 3, 4 denotes the sub-interval of the PSBDAB converter equivalent circuit as shown in Fig. 3.
T represent state-variables of the PSBDAB converter, while the variables A α and B α represents state matrices of the system. The expression of state matrices depends on the output filter capacitance, transformer turnratio, and other circuit parameters of the converter. The statematrices A 1 − A 4 and B 1 − B 4 in each sub-intervals can be expressed as [23], The solution of differential equations given by (3) -(6) can be evaluated by the conventional method of linear algebra [38]. These differential equations can be solved with the help of the state variable initial value, matrix exponential that depends on the circuit parameters, and time-period of sub-interval and voltage at the input side of the converter V in [38]. The unified solution of differential equations (3) -(6) is expressed as, where, where k = 0, 1, 2, 3 and j = k + 1 defines the statevector x j for time-interval t k to t j as shown in Fig. 3. I is the two by two identity matrix. The phase-shift of the PSBDAB converter is unaltered in each switching period T as the gating signals to the semiconductor devices are supplied through the digital signal processor [39]. The solutions of the expressions (3) -(6) can be determined by using the standard linear algebra given by (10) as shown below, where x i represents the state variable at the end of the i th subinterval for i = 1,2,3,4. x 0 and x 4 are state variables at the start and end of the switching cycle with time-period T , as shown in Fig. 2. The sub-intervals I-IV of the PSBDAB converter repeats itself each switching cycle at the steady-state. Moreover, changes in the state variables during a switching cycle T add to zero. Therefore, the state variables at the start of the switching cycle x 0 will equal the state variables at the end of the same switching cycle x 4 . The expression of the state variable [i v c ] at time-instant t 4 represented by x 4 can be evaluated by substituting the exact expression of x 3 , x 2 , and x 1 from (12) - (14) into (15). The discrete-time expression of x 4 can be written as, where The state variable x 4 in (16) involves matrix-exponential that is cumbersome and hard to gain useful or important information about the PSBDAB converter's behavior. The model obtained through the conventional linear algebra method (16) is challenging to use for the controller design and tuning its parameters. The model given by (16) can be made simple by expanding the exponential matrix [3]. The simplest matrix exponential expansion is first-order or second-order approximation that can be represented as, The simplest first approximation of the exponential matrix approximation using (19) gives accurate information about the transformer current. However, there is a significant difference between the actual value and the predicted value from the first-order approximation in the output voltage v o , as discussed in [40]. Therefore, most of the literature on the DTM uses a second-order approximation of the matrix exponential. Although the second-order approximation of the matrix experiential has good accuracy, the resultant model obtained is more complicated than the continuous-time models like CTROM, FSROM, or FDROM. The problem associated with the complexity of the model due to matrix exponential can be eased by a two-time scale model. The theory and the detailed explanation of the mixed system model, which includes timescale modeling, are well explained in [41].

IV. DETAILED ANALYSIS OF THE PROPOSED TTSM FOR THE PSBDAB CONVERTER
The presence of a big filter capacitor at the load side does not allow the output voltage of the PSBDAB converter to vary significantly in a short period of time. But, the transformer current i(t) has a large ripple change from the negative peak to the positive peak in a switching cycle of T . The output voltage of the PSBDAB converter acts as a slow state variable (SSV), while the transformer current behaves as a fast state variable (FSV). After the SSV and FSV are defined based on their inherent properties, the time-scale-based generalized theory proposed in [42] can be used. The analysis is carried out in the existing literature [27], [33]- [36] by ignoring the loss component of the system (copper loss and semiconductor on the resistor, filter capacitor ESR), which in turn reduces the accuracy of the SSM. The core loss of the transformer is neglected in this paper because it does not have a significant impact on the accuracy of the SSM or on the stability analysis of the PSBDAB converter [7], [23]. However, it does affect the efficiency of the system, especially at the light load in the phase-shift modulation. Moreover, the efficiency of the phase-shifted controlled PSBDAB converter is thoroughly studied in [7]. Therefore, the study of the efficiency of the converter is not included in this paper.
The transformer current (FSV) dynamics will be evaluated in the beginning, while the SSV (input and output voltage) will be considered as fixed variables in one particular subinterval. Subsequently, the dynamics of the SSV will be solved. The circuit state equation of the transformer current and the output voltage in the first (t 0 ,t 1 ) and second subinterval (t 1 ,t 2 ) can be represented as, The The expression of the transformer current is further modified to make the modeling and analysis of the PSBDAB converter simpler and easier, as shown below, where, The expression of the transformer current for the first sub-interval is obtained by using the conventional first-order differential equation solution, where τ = L/r. i(t 0 ) is the current at the start of the switching period or sub-interval I. Likewise, the dynamics of the transformer current for the second sub-interval II have been expressed in (28). i(t 1 ) is the current at the start of the sub-interval II.
Once the dynamics of the transformer current in the first and second sub-interval is obtained (27) -(28), the expression for the capacitor voltage v c (t) can be obtained by averaging the transformer current dynamics over the first sub-interval as discussed in [33], [41]. The expression of the capacitor voltage for the first-sub-interval is denoted as, The above expression of the capacitor voltage needs to be rewritten as a function of the state-variable [i v c ] T . It can be obtained by substituting the expression of v o from (22), (29), The capacitor voltage at the end of the first sub-interval can be obtained by integrating (30) from zero to t 1 [33], [41]. Therefore, the expression of the capacitor voltage for the first and second sub-intervals can be written as [33], [41], and v c (t 2 ) = v c (t 1 ) The exact expression of the transformer current at the end of the first and second sub-interval can be evaluated by substituting ''t = t p1 '' and ''t = t p2 '' in (27) and (28), respectively. The transformer current at the end of the first and second sub-interval as a function of the state variables and circuit parameters can be written as, The converter dynamics of the SSV at the end of the sub-interval I and II can be evaluated by substituting the expression of the FSV from (27) and (28) into (31) and (32). The resulting capacitor voltage is expressed in (35) and (36). and The SSV and FSV of the PSBDAB converter for the first two sub-intervals have been developed in (33) - (36). The PSBDAB converter's discrete-time model can be obtained using (33) - (36). The state-space model for the first and second sub-interval is represented as, where and where The standard state-space matrix for the first two sub-interval can be written as, where φ 12 = φ 2 φ 1 and ψ 12 = (φ 2 ψ 1 + ψ 2 ) Once the model is derived for the half-cycle, there are two methods to obtain the full model. Either by using the same methodology to achieve the state equation for the III and IV intervals as done in [23] or using the half-cycle symmetry proposed in [31]. In this paper, the half-cycle symmetry property of the resonant converter is exploited to obtain the state variable dynamics for the next two sub-intervals [31]. The in-depth explanation of the half-cycle symmetry is discussed in [31]. The final discrete-time model of the PSBDAB converter over a switching period in terms of the first two subintervals can be written as, where

A. LARGE-SIGNAL MODEL
It is vital to develop the steady-state expressions of the transformer current and output voltage to study modeling and the stability prediction of the system [23]. The half-cycle symmetry is used to obtain the expression of the state variables [31]. The steady-state transformer current at time-instant t 2 will have the same magnitude with an opposite polarity of the transformer current at the time-instant t 0 . This is due to its odd half-cycle symmetric property, as shown in Fig. 2. But the capacitor voltage has an even half-cycle symmetric property. Therefore, the magnitude and polarity of the capacitor voltage at time-instant t 2 will be the same as that of capacitor voltage at time-instant t 0 , as shown in Fig. 2. Therefore, the steady-state expression of the FSV and SSV at the end of the second sub-interval w.r.t. start of the first sub-interval I can be written as, The combination of (43) and (47) can be written as, The state variable dynamics of the PSBDAB converter over a switching period T is expressed in (45). The LSM of the output voltage v o (z)/d(z) can be achieved through z-transform on (45).
The transfer function (50) of the open-loop is essential to study the complex system , which involves the PSBDAB converter like modular structure [10]. The ECM of the PSBDAB converter given by (50) reduces the overall time to run a simulation compared to the DTDS. The reduced time required by ECM is beneficial to study the characteristics of the PSBDAB converter with the energy storage like battery, ultracapacitor [2] that need to operate for a long time around, an hour or more.

B. SMALL-SIGNAL MODEL
It is vital to study the system's behavior around its equilibrium point. The study about its equilibrium point is also known as the SSM of the converter [5]. The SSM is required to select and design a controller to ensure stable operation throughout the operating range. The SSM is obtained by perturbing and linearizing the LSM (45) around its operating point. The waveform of the PSBDAB converter shown in Fig. 2 is under the steady-state operation. However, it takes a number of cycles to reach equilibrium [5]. We assume in this study that the steady-state is reached at the η th cycle. Therefore, it can be concluded that the state variables at the time-instant t 0 are equivalent to the state variables at the start of the η th cycle and the state variables at the time-instant t 4 is equivalent to the state variables at the end of the η th cycle or the start of the (η + 1) th cycle, respectively. The state variable at the start and end of the η th cycle is denoted by x η and x η+1 . The phase-shift in the η th is represented by d η T s /2. The non-linear state equation given by (45) can be rewritten separately for state variables as, The above non-linear equations (51) and (52) need to linearized around the operating point by perturbing the state variables, control variable, and the input voltages as [5], x 2(η+1) = X 2ss + δx 2(η+1) (54) X 1ss , X 2ss , d, and V in are the steady-state value of the transformer current, capacitor voltage, phase-shift, and the supplied voltage of the PSBDAB converter, respectively. δx 1(η+1) and δx 2(η+1) represent perturbation in the transformer current and capacitor voltage in the (η + 1) th cycle, respectively. δx 1η and δx 1η represent perturbation in the transformer current and capacitor voltage in the η th cycle, respectively. δd η and δv in represent the perturbation in the phase-shift and input voltage, respectively. The expressions given by (53) (57) The large-signal model of the PSDAB converter (45) is compared to (51) and (52). Subsequently, the generalized expression (57) is used to obtain the SSM of the PSDAB converter. The simplified expression of the SSM can be represented as, where, The SSM of the PSDAB converter can be achieved by applying z-transform on (58), which results in control to capacitor voltage transfer function and input voltage to the capacitor voltage transfer function as,

C. STABILITY
The closed-loop block diagram of the digitally controlled PSBDAB converter is shown in Fig. 4. The study of the stability analysis for a proportional controller is taken as an example for its simplicity. The feedback output voltage from the ADC is sampled at the start of the switching period. Therefore, digital control implementation always causes a unit delay. The difference between the sensed output voltage and the reference voltage is fed to the proportional gain. The output of the proportional gain block gives the required phase-shift between the input and output side bridge voltages. The approach to obtain the stability prediction for proportional-integral (PI) control, proportional integral plus derivative (PID) control, or any other control is almost similar. The digitally controlled phase-shift (d) for the closed-loop block diagram of the PSBDAB converter shown in Fig. 4 can be represented as, where, When output filter ESR is ignored, the output voltage equals the capacitor voltage, i.e., M esr = [0 1]. However, output filter ESR is considered; the output voltage expression depends on both the output filter capacitor voltage and the rectified transformer current i d . The voltage is sampled at the start of each cycle. Therefore, the output voltage's expression in terms of the state variable can be attained from (45), as shown in Fig. 4. The final discrete-model (45) and (63) can be used for the stability prediction of the DSP controlled closed-loop PSBDAB converter.

V. EXPERIMENTAL VALIDATION OF THE TTSM
The circuit parameters of the experimental prototype are shown in Table 1. The low on-resistance MOSFETs are selected as semiconductor devices. The ETD core material of the transformer (ETD59) and external inductor (ETD49) is 3C90, developed by Ferroxcube. The inductor is designed with a magnetic flux density of 200 mT . The core loss per VOLUME 10, 2022 unit volume (ρ d ) of the inductor can be calculated as per the datasheet from the Ferroxcube [43]. The core-loss for ETD49 core and 3C90 material is around 150 mW /cm 3 [43]. The effective core volume (V e ) of the ETD49 core is 24000 mm 3 . Therefore, the effective power loss due to the core loss, equal to ρ d V e in the external inductor, will be around 3.5 W.
The transformer current's root means square (RMS) for the phase-shifted PSBDAB converter is around 5A with little variation around the light and heavy load. However, the RMS current is assumed to be constant in this paper for simplicity. The effective resistance due to core-loss can be calculated as around 150 m as mentioned in Table 1. The digital implementation of the converter results in a unit delay of one switching period [14]. The unit delay can be approximated by a first-order pade approximation as given in (64). A low-cost analyzer (Digilent analog discovery 2), a part of the national instrument corporation, has been used to obtain the smallsignal response.
The dead-time of the semiconductor devices is 75 cycles of the 150 MHz DSP. The dead-time can be calculated as the product of the number of cycles and time-period of the oscillator of the digital processor, which corresponds to 500 ns. This dead-time causes the deviation in the phase-shift between the bridge voltages (v pr and vsc) from dT /2 to (d + d dt )T /2. The 500 ns dead-time causes the phase-shift of the converter to increase by d dt = 0.015. However, the value of d dt will change around the critical phase-shift d cr . The critical phase-shift d cr is the minimum phase-shift of the system to ensure the soft-switching operation of the converter. The value of the critical phase-shift can be calculated, as discussed in [44]. Moreover, the dead-time will not cause any deviation in the phase-shift for d > d cr .
The PSBDAB converter integration with the energy storage ( battery or ultra-capacitor) needs to be operated for a long time to study the charging and discharging behavior of the energy storage. The DTDS demands a very high computation and takes a longer time than the ECM simulation. Therefore, the model developed in this paper (50) can be used to study the charging and discharging behavior of the energy storage integrated with the PSBDAB converter. The open-loop transfer function (50) is implemented in MATLAB. Initially, the system was operating at light-load with d = 0.05. At t = 0.5 s, the variable d is changed from the 0.05 to 0.075. The output voltage also increases due to a step-change in the variable d. The proposed model gives the best accuracy and predicts the response of the open-loop behavior with almost no error, as seen from Fig. 8 (a). The accuracy of the various models is compared at heavy load with step-increase in the variable d from 0.25 to 0.35, as shown in Fig. 8 (b). The proposed TTSM accurately predicts hardware results with almost no error compared to other models.
The output voltage open-loop response obtain from all models and experiment shows first-order behavior. This is due to the fact that the transformer current has a pole and zero very near to each other. Therefore, they cancel each other and have little impact on the open-loop behavior of the converter. The proposed method gives the best results compared to the other proposed model in the literature, as visible from Fig. 8.

B. EXPERIMENTAL VALIDATION OF THE SSM OF THE PSBDAB CONVERTER
The comparative study of the existing literature and the proposed TTSM is studied in this subsection. The effect of the capacitor current dynamics on the SSM is ignored in this study for simplicity. The magnitude plot of the proposed model is obtained from (61). The frequency response at light load (d = 0.05) is shown in Fig. 9. The low-frequency gain at 10 Hz from the hardware, proposed TTSM, conventional DTM [3], [24], FDROM [14], CTROM [7], GAM [18], and FSROM [12] [24], FDROM [14], CTROM [7], GAM [18], and FSROM [12] are 12.4 dB, 12.4 dB, 11.7 dB, 10 dB, 12 dB, 11 dB and, 11.7 dB, respectively. The proposed TTSM has discrepancy of only 0.1 dB at 10 Hz and null at 4kHz, respectively.
The phase response is obtained using (61) in MATLAB. It is important to note that the phase caused by the sensor and the unit delay is omitted in the hardware results. Moreover, the discrete-model [3], [24] and the proposed model are converted from the discrete-model to the continuous model. A small phase is obtained at the low frequency (10 Hz) around -6 • , as seen from Fig. 9. The phases at the higher frequency (4 kHz) from the experiment and the rest of the models are around −88.6 • and −92 • , respectively.
The phase response at d = 0.25 is shown in Fig. 10. Identical to the low phase-shift (d = 0.05), the phase-response of all models at d = 0.25 are identical. All models can predict the phase response correctly. There is a small discrepancy of around 3-4 • . It can be seen from Fig. 9 and 10 that the proposed model provides better accuracy for the magnitude plot at low and high frequencies compared to other previously presented models. VOLUME 10, 2022

VI. STABILITY ANALYSIS OF THE PSBDAB CONVERTER
The circuit parameter of a system has significant effects on the system's stability and dynamic behavior. The output voltage and transformer current can have significant oscillation due to wrong choices of the system's parameters. The system's behavior can undergo regular instability because of a shift in the PSBDAB converter's circuit parameters. The system's behavior can be studied with the help of the bifurcation diagram, Jacobian matrix, stability curve, or Lyapunov exponent. The bifurcation diagram will be used in this paper to analyze the PSBDAB converter. The analysis, simulation, and experiment are conducted for the circuit parameter listed in Table 1.
A bifurcation diagram is a visual summary of the succession of period-doubling produced, as the gain of the controller 'k g ' increases [26]. The periodic behavior of the transformer current's steady-state value at t η 1 can be plotted as a function of proportional gain 'k g '. A singular point indicates that the transformer current's steady-state is settled at a fixed and stable point. The transformer current can undergo from a fixed and stable point to periodic double, periodic quadruple, or higher period [45].
The LSM of the PSBDAB converter given by (45) is established for one cycle. The LSM for the state variable in the (η + 1) th cycle (x η+1 ) with respect to the state-variable in the η th cycle (x η ) can be written as (65). Moreover, the expression of the closed-loop control variable is modified as ( ), which is represented in radian to have a better understanding of the phase-shift between the bridge voltages.
and The bifurcation map can be studied from (65) and (66). The control parameter k g is varied from 0.01 to 10, as shown in Fig. 11 to Fig. 18. At first, the output capacitor ESR (R c = 0) is neglected, and the proportional gain (k g ) is increased. It can be seen from Fig. 11 that the system goes to the unstable region when k g is more than 1.71. When the capacitor ESR is included in the model, the critical value of k g for the stable operation is reduced to 1.35, as shown in Fig. 12. The nature of the bifurcation diagram with the inclusion of capacitance ESR shown in Fig. 12 or exclusion of the capacitance ESR shown in Fig. 11 is similar. This contradicts with the explanation about the inclusion of the filter capacitor ESR (R c ) changes the transformer current variation swing [23]. Moreover, the ESR of the filter capacitor (R c ) is increased thrice to 0.45 , and the bifurcation diagram is plotted in Fig. 13. The drift in the transformer current is identical to R c = 0 or R c = 0.15 . The critical gain to ensure stability k gc is only reduced to 0.82 for R c = 0.45 . Therefore, it can be interpreted that the drift in the transformer current not only depends on the filter capacitor ESR but also on other circuit parameters. The standard electrolytic and film capacitor has a tolerance of around ±20%. Therefore, the bifurcation diagram with 20% less capacitance of the output filter capacitor (132 µF) is plotted in Fig. 14. There is not much difference in the behaviors of the inductor or its bifurcation diagram shape in this scenario. However, the critical gain has been reduced to 1.1. Moreover, the bifurcation diagram remains the same, with a 20% increase in capacitance. However, the actual plot is not shown in this paper due to repetitive behavior. Most of the work on the time-scale model [27], [33] [34], [36] does not include the system loss on the model. Therefore, the bifurcation with r = 0 is plotted in Fig. 15. It shows the    Bifurcation diagram using k g as a parameter for C = 132µF . effect of the system loss resistance (r) on the stability of the system. The gain for the system to be stable should be less than 1.38 for the lossless model (r = 0). However, the effect  of the capacitor ESR is considered for the lossless system, as shown in Fig. 15. When neither r nor R c is considered [27], [33], [34], [36], the critical gain of the system increases to 1.46.
The bifurcation diagram with 90% of the equivalent inductance of the system (L = 98µH ), double load resistance (R = 22 ), and around 85% of the reference voltage (V ref = 38V ) are shown in Fig. 16, Fig. 17 and Fig. 18, respectively. It can be seen that that unlike the previous case, the trends of the transformer current are different, as gain (k g of the closes-loop is increased. The critical gain for L = 98µH , R = 22 and V ref = 38V is 0.81, 0.55 and 0.84, respectively. It can be seen that each circuit parameter affects the critical proportion gain k gc of the converter.

A. SIMULATION VERIFICATION OF THE STABILITY ANALYSIS OF THE PSBDAB CONVERTER
The theory and analysis in Sections IV and VI are verified in simulation (MATLAB/Simulink) and experimental prototype. The system was operating with proportion gain k g = 1.3 in a stable region of the converter. The closed-loop gain is increased from 1.3 to 1.4 at the time t = 0.01 s. It can be seen from Fig. 19 that the converter comes out of the stable region at k g = 1.4, as predicted from the bifurcation diagram in Fig. 12. The bifurcation diagram of the system for k g = 1.4, as shown in Fig. 12 comprises transformer current magnitude from 5.6 A to 8A. The same observation is also obtained through the simulation studies, as shown in Fig. 19(d). The oscillation in the transformer current increases as the gain VOLUME 10, 2022  of the closed-loop k g is increased, as seen from Fig. 19. The output voltage and phase-shift waveform with the function of gain are shown in Fig. 19 (c). The ripple in the output voltage increase as the k g is increased. The simulation results approve of the results obtained from the bifurcation diagram. It is important to note that the oscillation in the transformer current is increases slowly when k g is increased, even with the inclusion of the capacitor ESR. However, it was claimed in [23] that the transformer current goes directly into the chaotic region when the system goes from stable to the unstable region when capacitor ESR is considered. However, such behavior depends on the circuit parameter of the system. The behavior of the system is the same in all cases shown from Fig. 11 to 18 except for load resistance R = 22 .
The bifurcation diagram of the system with double load resistance shows different behavior than other cases. The instability of the system increases much faster than in other cases. The same statement is also verified through simulation results carried out in MATLAB/Simulink. The system was operating with proportion gain k g = 0.54 in a stable converter region. The closed-loop gain is increased from 0.54 to 0.56 at the time t = 0.01 s. It can be seen from Fig. 20 that the converter comes out of the stable region at k g = 0.56, as obtained from the bifurcation diagram in Fig. 17. There is a small oscillation at k g = 0.56. However, when the gain is increased marginally by 0.02, the system goes into chaotic behavior. The chaotic nature increases much faster at k g = 0.56, as shown in Fig. 20(c). This nature is much more predominant when closed-loop gain k g is moved only by 0.04 from its critical gain k gc . However, in the other cases shown in Fig. 11 to 16 and 18, the chaotic nature is relatively less even though the critical gain increases by 0.3 or more.

B. EXPERIMENTAL VERIFICATION OF THE STABILITY ANALYSIS OF THE PSBDAB CONVERTER
The stability analysis of the converter is validated in the experimental setup with the same system parameters used in the analysis and the simulation studies. The hardware set-up for the closed-loop operation of the PSBDAB converter is shown in Fig. 21. The low resistance MOSFET IRFP4321PBF from Infineon is used as a semiconductor device. The voltage transducer LV25-P from LEM is used as a voltage sensor. The signal to the semiconductor is controlled through Texas Instrument TMS320F28335 experimental kit.
The experiment is conducted with load resistance R = 11 . Initially, the controller's gain is set at 1.3; the system remains in the stable region. There are no unwanted oscillation or dc components in the transformer current, as shown in Fig. 22. However, the oscillation starts to appear when the gain is increased more than 1.4. The system undergoes significant oscillation at gain of 1.7, as shown in Fig. 23.
There are a small discrepancies between the theoretical and experimental value of the critical gain to obtain stability for R = 11 . The control variable d to obtain the output voltage for R = 11 is around d ≈ 0.4, as shown in Fig. 19. The effective resistance of the system is increased at the higher value of d due to more conduction loss in the transformer, inductor, and turn-on loss of the semiconductor devices [7]. The increase in the effective resistance increases the critical gain of the close-loop for load resistance R = 11 , as shown in Fig. 15. It was shown in Fig. 15 that the rise in the effective resistance increases the critical gain k cg of the system and vice versa. The increase in the equivalent resistance r also reduces the maximum current in the unstable region.
The system is also validated with double load resistance (R = 22) to show how the oscillation of the transformer current varies at different loads. Initially, the converter was operated with the gain of the closed-loop k g at 0.54. The system operated in the stable region with no unwanted oscillation in the transformer current or output voltage, as shown in Fig. 24. However, when k g is increased to 0.6, a very high oscillation in the transformer, current and the output voltage, as observed in Fig. 25. The maximum current in the analysis (bifurcation diagram), detailed time-domain simulation, and the experimental results are the same to be around 8 A.
The comparative studies of the stability prediction between proposed TTSM and existing DTM in the literature have been listed under Table 2. The proposed model offers better accuracy than the other DTM proposed in the literature [3], [23] [24] [27]. There is a minor difference between all the models at R = 22 . This is due to the low current required to obtain a reference voltage of 45 V at 22 compared to the current requirement at 11 . The same argument can be made when the reference voltage is reduced from 45 V to 38 V. The aging of the capacitor causes its ESR to increase with time.     The ESR of the capacitor can increase significantly than its normal value with prolonged usage [46]. There is a significant difference in the critical gain k cg when the output filter capacitor ESR is higher (0.45 ). The error in the predicted critical gain conventional DTM, lossless DTM is more than 50%. The contribution of this paper is again explained in the next section with the theory, simulation, and experimental results.

VII. DISCUSSION
The TTSM for the PSBDAB converter is proposed in this paper. The procedure to obtain the LSM and SSM is simpler than the conventional DTM. The conventional DTM  presented in (16) comprises an exponential matrix, results in a complicated model. The complex model obtained from DTM fails to give insightful information about the converter's behavior. Moreover, the segregation of the state variables (transformer current and capacitor voltage) into fast and slow variables eases the analysis of the PSBDAB converter. The segregation into FSV and SSV helps to apply conventional mixed system-based time scale modeling to the system [41]. The segregation helps to decouple the dynamics of the transformer current given by (22) and (23), and capacitor voltage given by (26) and (27). Each of the state variable's behavior has been obtained separately, which eases the analysis of the system.
The proposed modeling in this paper incorporated deadtime, core-loss of the external inductor, and other kinds of converter's non-linearity. The inclusion of the dead-time improves the model's steady-state, LSM, and SSM. It can be seen from Fig. 6 that the inclusion of the dead-time improves the steady-state. Fig. 8 and 9 depict the improved accuracy of the proposed model compared with the other existing methods. Moreover, the inclusion of the core loss of the inductor improves the model accuracy at the light and heavy load operation of the system, as seen from Fig. 6 to 10.
The effect of the circuit parameters such as load resistance, the equivalent resistance of the model, the equivalent inductance of the model, output capacitor filter capacitance, and its ESR on the stability of the system are shown in Fig. 11 to 18. It has been observed that the load resistance  of the converter has affected the nature of the transformer current more predominantly than the other circuit parameters, as shown in Fig. 17.
The comparative studies of the proposed TTSM and models developed in the literature for the steady-state, LSM, SSM are shown in Fig. 6, 8 and 9 & 10, respectively. Moreover, the comparative studies for the stability prediction among the discrete-time models are presented in Table 2. The characteristics of different modeling in the literature compared to the proposed model are listed in Table 3. The proposed model has the best accuracy among the full-order and the reduced-order model with RMSPE around half of a percent. The proposed model gives the best stability prediction compared to the existing literature on the stability analysis of the PSBDAB converter.

VIII. CONCLUSION
This paper proposes a mixed system-based time-scale methodology of the phase-shifted bidirectional dual active bridge converter. The state variable of the PSBDAB converter (transformer current and capacitor voltage) are termed as fast and slow states. The separation of the fast and slow variables based on their inherited characteristics results in the decoupling of the state variable, which simplifies the analysis of the system. The steady-state, open-loop response, and frequency response (small-signal) of the output voltage is verified with experimental results. The inclusion of the dead-time and core-loss of the inductor in the model has been studied. The inclusion of the dead-time of the semiconductor devices and core-loss of the external inductor improves the model's overall accuracy at the light and heavy load operation. The proposed model can accurately predict the output power flowing through the system. The output voltage open-loop response with a variation in the control variable is verified with hardware results. The open-loop behavior from the proposed model is also compared with the existing model presented in the literature. The proposed model gives the closest behavior compared to the behavior obtained from the actual prototype. Similar to steady-state and the open-loop response, the control to output voltage frequency response from the proposed model provides the best accuracy than the other models. A detailed study about the stability of the closed-loop system with variation in circuit parameters is established. The critical gain to ensure the converter stays in the stable region is obtained and verified in the simulation and experimental setup.