MIOTA-Based Filters for Noise and Motion Artifact Reductions in Biosignal Acquisition

This paper presents a new low-voltage CMOS structure for operational transconductance amplifier (OTA) exploiting the bulk-driven, the self-cascode and the multiple-input transistor techniques (MI). The multiple-input OTA (MIOTA) circuit operates in subthreshold region using 0.5V supply voltage and offers enhanced linearity. The MIOTA is developed for biopotential signal as well as electrocardiogram (ECG) signal processing circuit and it is exploited to design a 5th-order Chebyshev low-pass and 3rd-order band-pass filters with a dynamic range (DR) of 57.6 dB and 60.4 dB, and nanopower consumption of 50 nW and 60 nW, respectively. Due to the electronic tuning of cut-off frequency, the low-pass and band-pass filters are suitable for random noise and motion artifact noise reductions in biopotential signals. The circuits were designed in Cadence environment using the standard N-well $0.18~\mu \text{m}$ TSMC CMOS technology. Intensive post-layout simulation results along with the process, voltage, temperature analysis (PVT) and Monte Carlo (MC) prove the robustness of the design. The chip area of the proposed MIOTA is 0.00725 mm2 ( $118~\mu \text{m}\,\,\times 61.5\,\,\mu \text{m}$ ). Compared with standard OTA the MIOTA offers simplification of filter topology and reduced number of active elements. In order to demonstrate these advantages, the MIOTA-based filter was also build using commercially available OTA LT1228. The experimental results of OTA LT1228 confirm both the filter functionality and the advantages of the proposed MIOTA.


I. INTRODUCTION
Nowadays, as people become more health conscious, the growing popularity of wearable devices is the factor to stimulate the transformation toward telehealth. The wearable device also provides the wireless communication function to deliver the patient's biological data to medical professionals in real-time. Health and medical equipment must be prioritized for accuracy which is able to correctly identify the conditions of the user and diagnosis of the patient's symptoms.
Regarding to the portable and wearable devices, they become widely popular equipment in everyday life. The lowpower integrated circuits are an extremely challenging topic for researchers, due to requirement of low power supply and minimal power consumption. The strict energy requirements The associate editor coordinating the review of this manuscript and approving it for publication was Dušan Grujić . must be satisfied for all subsystems such as ADC (analogto-digital conversion) unit, computer processing, and wireless transmission. All the blocks need to work accurately and provide correct results. The portable biomedical device is an essential equipment to diagnosing a patient's disease. The ECG monitoring system is usually a 3-channel detector (multichannel system), which have the advantage of singlechannel recorders being able to capture multiple leads of abnormalities at the same time as shown in Fig. 1. Electrode is identified as an acronym and has different colors: right arm (RA white), left arm (LA black), left leg (LL red), may remember: white, black and red for RA, LA and LL, respectively.
Traditional 3-channel measurement systems use differential-input instrumentation amplifier (IA) as a preamplifier to receive very small amplitude input signals and amplifying it [1]. The passive or active frequency filter VOLUME 10, 2022 This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/ circuits are used to remove the unwanted noise. The signals are converted into digital form by the ADC circuit. The digital signals are next processed by a central processing unit (CPU) and then the data are displayed or wireless transmitted. Because noise is amplified together with the ECG signals, a high-efficiency filter is required. Most often, the operational amplifier (OA)-based filter is used with high power supply voltage. Generally, the bio-signals are signals located in low-frequency band (below 2kHz) which are listed in Table. 1 [2]. In ECG bandwidth (0.05Hz-250Hz), the design of the RC passive filters is not effective, because it requires high resistances and large capacitances. Moreover, the passive RC circuits are difficult to realize and are not suitable for portable integrated circuits. Biosensor devices used in the past were designed using discrete components in monolithic form, that required high voltage and high power [3]. Therefore, a biosensor has been developed in the form of a SOC (system-on-chip) to combine the necessary equipment into a single chip, but the high-power consumption was required at the beginning. The CMOS circuits are widely used for low-voltage designs, exploiting operation of a MOS transistors in ohmic region [4]- [6]. Although the results are acceptable, the minimum supply voltage is still limited by the threshold voltage of MOS transistors. However, very lowvoltage circuits can operate from supply voltages lower than the threshold voltage by biasing the MOS transistor in a weak inversion region [7]- [10]. Nevertheless, even for circuits operating in weak inversion, the voltage swing is limited by V GS voltages of MOS transistors. To overcome the above mentioned constrains, the so-called bulk-driven technique was introduced [11], [12]. This technique can be used with sub-volt power supply and very low biasing currents in the range of nanoamps. Moreover, controlling the MOS transistors with their bulk terminals allows extending their linear range. A large number of low-voltage bulk-driven circuits devoted to different applications, have been proposed in recent years [13]- [18]. The MOS transistors operating in weak-inversion are preferred to realize low-voltage biopotential filters [19]- [23]. However, even the bulk-driven circuits in weak inversion show limitations of the voltage swing under ultra-low voltage supply.
It is worth noting that active devices with multipleinput like OTAs [31]- [34], [42]- [46] or multipath dynamic comparators [48], [49] attracted the attention of the integrated circuit designers. It is because these devices offer the advantage of arbitrary summing or subtracting the voltage signals at the inputs, allowing topology simplification and reducing the number of used components. This is evident in applications like OTA-C filters [31]- [34], [42]- [46] or successive-approximation-register (SAR) Analog-to-Digital Converters [48], [49]. Multiple-input devices were firstly constructed by a proper parallel connection of the input transistors that create the input differential stages [31], [32]. However, this increase the count of transistors, the power consumption and the complexity of the devices. Later, multiple-input devices were obtained by multiple-input MOS transistor acquired by the capacitive divider concept using the floating-gate (MIFG) MOS transistor technique [44]- [46]. However, the MIFG becomes inappropriate for modern nanoscale CMOS technologies with gate leakage since MIFG is based on the concept of charge conservation [47]. Besides, to create the input capacitors, MIFG requires technology with double poly-silicon that limits its engaging in standard CMOS technologies with one poly-silicon. In addition, due to the charge trapped in the floating gate, the MIFG suffers from higher voltage offset than conventional gate-driven transistor. To avoid the above-mentioned disadvantages associated with MIFG, the multiple-input MOS transistor technique (MI-MOST) that based on parallel capacitive-resistance divider concept offers the solution [28]- [30]. Unlike the MIFG, the MI-MOST can be used in any standard CMOS technologies (i.e. with one poly-silicon). It has no floating gate and hence no additional technological steps are needed to eliminate the compact of the gate's trapped charge on the voltage offset.
The proposed circuit is supplied from only 0.5V, and a wide input range can be obtained with a compact structure. The circuit is devoted for low-frequency application, e.g. in biosignal detectors. To show the advantage of multiple-input, the MIOTA-C based high order low-pass (LPF) and band-pass filters (BPF) were realized for ECG signal acquisition with low-number of MIOTA. The signal flow-graph (SFG) technique with RLC ladder prototype is employed to design the active filters. The filter can be tuned through the bias currents of MIOTA. The proposed lowpass filter can remove the noise, and band-pass filter can also reduce the low-frequency motion artifact from ECG signals.
The paper is organized as follow: Sec. II presents the highorder filter design, Sec. III describes the CMOS structure of the MIOTA, Sec. IV shows the simulation of the MIOTA based filters and Sec. V shows the experimental results of OTA LT1228 based filters. Finally, the conclusion is given in Sec. VI.

II. HIGH-ORDER FILTER DESIGN
Many design concepts, such as ladder or cascade structures can be used to realize high-order filters. Due to the lowsensitivity, the RLC ladder filter is used in this paper as a prototype. The signal flow graph (SFG) is often used to describe the filter design, which allows easy transformation of the equations to particular values of the circuit elements. It has been assumed, that the synthesized circuits will operate in a voltage mode and use only multiple-input transconductors and grounded capacitors.
A. CHEBYSHEV LADDER LOW-PASS FILTER Fig. 2 shows the 5 th -order RLC Chebyshev low-pass filter (LPF). The current and voltage are assigned in the several branches and nodes of the prototype. Using the SFG method [24], the final voltage-mode SFG can be drawn in Fig. 3.  The lossless and lossy integrators [50] are realized by using multiple-input OTAs and grounded capacitors as shown in Fig. 4. The transfer functions of lossless and lossy integrators can be expressed as Eq. (1) and (2), respectively.
From the SFG in Fig. 3, the relevant branches are replaced by the lossy and lossless integrators. The completed Chebyshev 5 th -order LPF can be constructed as shown in Fig. 5.

B. CHEBYSHEV LADDER BAND-PASS FILTER
The motion artifact noise is usually located in very low-frequency, which is a problem of ECG signal acquisition [25]- [27]. To obtaining a clean ECG signal, the random noise and motion artifact noise at very low-frequency should be filtered out by a wide-band BPF. Fig. 6 shows the 3 rd -order RLC Chebyshev band-pass filter (BPF). Using the SFG method [24], the final voltage-mode SFG can be drawn in Fig. 7.
It consists of series and parallels LC network as shown in Fig. 9. The normal magnitude response of BPF is exhibited in Fig. 10 (gray). Regarding the bandwidth tuning, lower and upper cut-off frequency of wideband BPF (Q 1) can be obtained by specific conditions. If the upper cutoff frequency (ω 2 ) is fixed, the lower cutoff frequency can be decreased (ω 1n < ω 1 ) by increasing the series capacitor (C Sn > C S ) and parallel inductor (L Pn > L P ) by the following condition (Case I). The magnitude response of BPF is achieved in Fig. 10 (blue).
Case I: On the contrary, if the lower cutoff frequency (ω 1 ) is fixed, the upper cutoff frequency can be increased (ω 2n > ω 2 ) by decreasing the series inductor (L Sn < L S ) and parallel capacitor (C Pn < C P ) by the following condition (Case II). The magnitude response of BPF is achieved in Fig. 10 (brown).
Case II: L Sn < L S , C Pn < C P and C Sn = C S , L Pn = L P According to the bandwidth tuning technique, the BPF based on MIOTA-C in Fig. 8 can be tuned through the bias current of OTA 2,3,6 (case I) and OTA 1,4,5 (case II) with fixed all capacitors.

III. BULK-DRIVEN MIOTA
The CMOS structure of the proposed bulk-driven MIOTA is shown in Fig. 11. The input transistors utilize the multipleinput MOS transistor technique that was first presented and experimentally verified in [28], [30]. Based on this technique, a number of applications were recently presented in the literature [28]- [37]. As shown in Fig. 12, the multiple-input terminals of a MOS transistor is constructed simply by a parallel connection of n arbitrary number of input capacitor C B along with high resistance R MOS of two MOS transistors M R connected as cut-off diode. Note, that the input capacitors create a voltage divider, which attenuate the signal at the inputs of ''internal'' OTA (i.e. OTA without multiple input), that improves the linearity of the overall structure. The high resistances R MOS are used for proper DC biasing of the input terminals of the ''internal'' OTA. The ''internal'' CMOS structure of the OTA (M 1 -M 8 with a biasing transistor M 9 ) can be seen as a modification of the non-tailed differential stage first proposed in [38]. The nontailed architecture is suitable for ultra-low supply voltages, due to the lack of a tail current source. Despite the lack of this source, the circuit behaves as a truly differential amplifier. Neglecting the impact of second-order effects, the currents flowing through all transistors, and consequently the output current I out are not sensitive to the common-mode signals, being sensitive only to the input differential signals [38]. The modification proposed here is based on replacing the transistors M i (i = 1 . . . 6) of the original circuit with selfcascode composite transistors M i -M ic , as shown in Fig. 11. Such a modification increases the linear range of the OTA, as well as increases its output resistance. The linear range is increased thanks to a negative feedback, introduced by the transistors M 1c -M 4c , operating in a triode region. Note, that the limitation of the output voltage swing due to transistors M 1c -M 4c is very small, since voltage drops across these transistors are in the range of several mV only.
Assuming operation in a weak inversion region, the drain current of a p-channel MOS can be expressed as: where I T = 2nµC OX U 2 T is the technology current, n is the subthreshold slope factor, U T is the thermal potential, µ is the carrier mobility, C OX is the gate capacitance per unit area and V T is the threshold voltage, which can be approximated as: where V TO is the threshold voltage for V BS = 0. Assuming the above model and fully-differential input signals, the large-signal transfer characteristic of the ''internal'' OTA in Fig. 11, for identical self-cascode transistors M 1,1c -M 4,4c and M 7 = M 8 = M 9 can be expressed as: where η = (n − 1) = g mb1,4 /g m1, 4 and V id is the input differential voltage of the ''internal'' OTA (between bulk terminals of M 1 and M 4 ). The factor a is associated with negative feedback introduced by transistors M 1c−4c in self-cascode transistors M 1−4 -M 1c−4c . With linear approximation, which is justified by small variations of the potentials at the source terminals of transistors M i (i = 1..4), it can be expressed as: In a weak inversion region this factor is equal to 2, since g mi = g mic . Note, that for the original circuit, without self-cascode connections, this factor is equal to 1.
Taking into account the input capacitive divider of the MIOTA, the large-signal characteristic from i-th input, and other inputs grounded for AC signals, can be expressed as: where C Bi is the capacitance of the i-th input and C TOT is the sum of all capacitances of the input capacitive divider and the input capacitance of the ''internal'' OTA C in . Note that assuming C Bi C in , the impact of C in can be neglected. From (7), the third-order harmonic distortion (HD 3 ) can be expressed as follows: Thus, the combination of several techniques, namely, the BD approach (η < 1), the self-cascode connections (a = 2) and the MI approach (C i /C TOT < 1) extends the linear range of the MIOTA, and allows achieving sufficient linear range even in a weak inversion region. For instance, assuming η = 1/3, C Bi /C TOT = 0.5 and nU T = 35mV, the HD 3 = 1% for V i+ − V i− = 205 mV, which is a relatively large range for sub-0.5V circuits. Note, that for a classical BD differential pair HD 3 = 1% for V i+ − V i− = 18mV/η, which is equal to 54mV for η = 1/3. The linear range will even be more extended with larger number of inputs, due to the input capacitive divider. It is also worth noting, that according to (8), application of self-cascode connections (a = 2) reduces the HD 3 four times as compared with the classical solution without self-cascode connections (a = 1) for the same input voltage. From (7) the small-signal transconductance of the MIOTA, (a = 2), can be calculated as a first derivative, and is equal to: Since (I B /nU T )η is equal to the bulk transconductance of the p-channel transistors M 1 -M 4 (g mb1,4 ), then: Thus the small-signal transconductance is reduced by the triode-operating transistors M 1c -M 4c, that can be considered as source degeneration resistors, introducing a negative feedback (2g mb1,4 in original circuit without negative feedback [38]) and by the input capacitive divider. The transconductance can be tuned with the biasing current I B .
The low-frequency voltage gain of the MIOTA (A vo ) can be expressed as: The low-frequency gain of the ''internal'' OTA is the same as for the original circuit, since both, the input transconductance as well as the output conductance are reduced in the same proportion. However, the input capacitive divider reduces the voltage gain of the MIOTA, since it further reduces the input transconductance of the circuit. Assuming for simplicity that the subthreshold slope factors of p-and n-channel MOS transistors are equal to each other, the input referred thermal noise of the OTA can be expressed in the following simple form: where: Hence, the input capacitive divider increases the input referred noise in the same proportion, as extends the linear range, that suggest, that it does not affect the dynamic range. However, if the MIOTA would be realized as a connection of n OTAs, each biased with n-times lower current, then such a circuit would have lower dynamic range than the approach based on the input capacitive divider [31]. It is worth noting that despite of using the bulk-driven and multiple-input techniques, the proposed circuit in Fig. 11 has the advantage of being applicable in any standard CMOS technology. Note, that the bulk terminal of only one type of transistor (PMOS in case of N-well technology) is used as input terminal. Also, the input capacitors that create the multiple-inputs are also standard one that are available in any CMOS technology. VOLUME 10, 2022

IV. SIMULATION RESULTS
The proposed circuits were designed and verified in Cadence environment using the 0.18 µm CMOS technology from TSMC. Intensive post-layout simulation results along with the process, voltage, temperature analysis (PVT) and Monte Carlo (MC) are presented in this section to prove the robustness of the design. The voltage supply was 0.5 V. The transistor aspect ratio of the MIOTA are depicted in Fig. 11. The input capacitors of the MIOTA are high-linear metal insulator metal capacitor (MIM) available in TSMC technology and each has a 0.5 pF. This capacitor value was selected based on post-layout simulation in order to minimize its value and hence the chip area from one side and to minimize the influence of the parasitic capacitances of the other components on the circuit performance from side other. The transistor M R has W/L = 4µm/5µm. Note, that since M R is based on PMOS transistors operating in cut-off region the value of this resistance is quite high (G range) even with minimum transistor dimension. The layout of the proposed MIOTA is shown in Fig. 13. The chip area is 0.00725 mm 2 (118µm × 61.5 µm).   The transient response of the MIOTA for a sine wave input signal with 300mV pp @ 10Hz applied to the input while the output is grounded is shown in Fig. 15(a). The output signal spectrum in Fig. 15 (b) shows that the third harmonic HD3 is lower than the fundamental by 54.89dB and the total harmonic distortion (THD) was 0.18%.  The THD versus V in−pp and different frequencies: 10Hz, 50Hz, 100Hz for the proposed MIOTA with and without selfcascode (SC) transistors is shown in Fig. 16. It is evident that the circuit with self-cascode transistor offers much lower THD even below 1% for 500mV pp that confirm the good linearity of the circuit. Note, that the THD (≈ HD 3 ) for the version with self-cascode connections is approximately 4 times lower than for the version without self-cascode, for the same input voltages, which agrees with (8). The basic performance of the MIOTA-based integrator (with two inputs), with 20 pF load capacitance and I B = 5nA are shown in Table 1.
The value of the passive elements of the RLC prototypes shown in Figs. 2 and 6 and the proposed LPF and the BPF shown in Figs. 5 and 8 are listed in Table 2.  Note that MIOTA-based BPF has been derived from the RLC prototype with two significant poles (low-and highfrequencies). The low-frequency pole requires a large capacitor (0.8nF). The off-chip capacitors used for the BPF are recommended. The magnitude responses of the RLC prototypes and the proposed LPF and BPF are shown in Fig. 17 (a) and (b), respectively. For LPF the bias current I B , used to set the g m value of all OTAs, was selected 2.67 nA to achieve same cutoff frequent as the RLC prototype which is f c = 112 Hz, both curves are in good agreement. For BPF two bias currents are used I B1 used to set the g m value of OTA 1,4,5 and I B2 used to set the g m value of OTA 2,3,6 . The bias currents were selected as I B1 = 2.6 nA, I B2 = 2.1 nA to achieve bandwidth (BW) around 111 Hz for the proposed BPF. The lower cutoff frequency (f L ) was 1.3 Hz and 1.6 Hz and the upper cutoff frequency (f H ) was 120 Hz and 113 Hz for the RLC prototype and the proposed BPF, respectively. Fig. 18 shows the magnitude responses of the proposed LPF for different bias current I B = 1nA to 7 nA. The tunability and the linear relation of the cut-off frequency and I B is confirmed in Fig. 19.   The capability of tuning the lower and/or upper cutoff frequency of the BPF is shown in Fig. 20. For Fig. 20 (a) the bias current I B2 was varied from 1 nA till 7 nA while I B1 was fixed at 5 nA, while in Fig. 20(b) the bias current I B1 was varied from 1 nA till 7 nA while I B2 was fixed at 5 nA. Fig. 20 (c) the bias current I B1 = I B2 was varied from 1 nA till 7 nA. The wide tunability of the cutoff frequency is evident in all cases.
The process, voltage, temperature (PVT) corner analyses of the LPF with I B = 5nA and the BPF with I B1 = I B2 = 5nA were provided with MOS transistor corners: slow-slow, slow-fast, fast-slow and fast-fast, MIM capacitor: slow, fast, the voltage supply rail corners ± 10mV, and the temperature corners: -10 • C, 55 • C. The results of the PVT corners of the LPF and BPF are shown in Fig. 21 (a) and (b), respectively, and are in acceptable range.
To check the influence of the process and mismatch variations on the circuit functionality, the Monte Carlo analysis with 200 runs was provided for the gain and the cutoff frequency of the LPF with I B = 5nA and for the BPF with I B1 = I B2 = 5nA. The histograms of the gain of the LPF and BPF are shown in Fig. 22 (a) and (b), respectively. The gain mean value is -6.65 dB with 0.29 dB standard deviation for LPF and -6.57 dB with 0.14 dB standard deviation for BPF. The histograms of the bandwidth of the LPF and BPF are shown in Fig. 22 (c) and (d), respectively. The bandwidth mean value was 203.8 Hz with 9.79 Hz standard deviation for LPF and 209.5 Hz with 5.87 Hz standard deviation for BPF. All cases confirm the robustness of the design against process and mismatch variations. Fig. 23 shows the transient responses of the LPF and BPF filters when a sine wave signal with 60mV peak to peak at 100 Hz was applied to the input of the filters. The total harmonic distortion was 0.62 % and 0.58 % for the LPF and BPF, respectively. The dynamic range (DR = 20 × log(V rms−max /V rms−noise )) for LPF and BPF for 1 % THD while rms noise was integrated over the filter bandwidth was calculated to be equal to 57.6 dB and 60.4 dB, respectively.
To test the LPF and the BPF for ECG signal. The ECG signal combined with random noise signal of 3 mV amplitude at 500 Hz was applied to the input of the LPF. The original ECG, the noisy ECG and the recovered ECG are shown in Fig. 24. The BPF was tested with noisy ECG signal including motion-artifact noise with 3mV at 200mHz and noise with 3 mV at 500 Hz. The noisy ECG and the recovered ECG signal are shown in Fig. 25. Table 3 compares the proposed work with some previous related works [20]- [22], [39]- [41], where the following figure of merit (FoM) [40], has been used for better comparison: FoM = (PV DD )/(Nf c DR) where P, N , and f c are the power, order, and cutoff frequency of the filter, respectively. The lower the FoM, the better the performance of the filter. It is evident that the proposed filters offer the best FOM, less number of active devices, the lowest voltage supply and the best low voltage capability from all others OTA-C based filters [20], [22], [39], [40]. Compared with filters based on cascade of two stages of transistor-level biquad flipped voltage follower (FVF) [21] and flipped source follower (FSF) [41] the proposed filter still offers better dynamic range. Note that, the cascade biquad filters are pseudo differential structures that requires additional signal conditioning at the input. The motion artifact noise can be reduced thanks to the proposed wideband ladder BPF. The fine-tuning of lower and higher cutoff frequencies is another advantage offered by the proposed BPF. This, for instance, is practically required for trimming the motion artifact signal in very low frequency.

V. EXPERIMENTAL RESULTS OF OTA LT1228 BASED FILTERS
The functionality of the proposed filters will be experimentally confirmed using commercially available OTAs LT1228.  Using commercially available OTA LT1228 will also confirms the advantages of MI-OTA in term of reduced number of active elements in the filter application. The experimental setup of the proposed LPF and the BPF is provided using the off-the-shelf active and passive components. Regarding to Figs. 5 and 8, at least two differential inputs are required for MIOTA.
The MIOTA has been constructed by two commercially available OTAs LT1228 with ±12V power supplies as shown in Fig. 26. The bias currents of OTA are controlled by V Bias and 80k series resistors. The capacitors of LPF and BPF are listed in Table 2. The front-end preamplifier (OTA A ) and final gain amplifier (OTA B ) have been included in the LPF and BPF as shown in Fig. 27. The ECG signal and noise are applied in the preamplifier OTA and the signals are measured after the preamplifier. Fig. 28 shows the experimental setup of LPF and BPF with ECG signal simulator (Symbio).  The frequency characteristic of the proposed MIOTA-based 5 th -order LPF was verified by using Bode100 vector network analyzer (VNA) [37]. The cutoff frequency was regulated within 25-250Hz by regulating the bias currents (I B ) in the range 50-500µA as shown in Fig. 29. The variable gain of the proposed LPF is illustrated in Fig. 30. The gain can be adjusted up to 30dB by adjusting the bias current of OTA B . For the ECG application, the cutoff frequency of, 250Hz is required that is achieved for the bias current of 500µA. The in-band frequency has been tested by applying the sine wave signal of 20Hz and amplitude 210mVp-p at the input of the proposed LPF. Fig. 31 illustrates that the 3 rd harmonic component output was appeared lower than the fundamental    The frequency characteristic of the proposed MIOTA-based 3 rd -order BPF was also verified by VNA. The frequency response tunability is provided by varying the bias current (I B ) from 10-100µA as shown in Fig. 33. The constant bandwidth has been carried out and illustrated by three bias current cases. The upper and lower cutoff frequencies were 5Hz and 3kHz for I B = 100µA (green line), 2Hz and 1kHz for I B = 30µA (blue line) and 0.5Hz and 300Hz for I B = 10µA (red line). It is noted for the red line that cannot be shown the lower cut-off frequency due to the VNA spanned is limited.
This proposed BPF allows independently adjust the upper and lower cutoff frequency by tuning the bias current of relevant OTA. The OTA 2 , OTA 3 and OTA 6 control the lower cutoff frequency while OTA 1 , OTA 4 and OTA 5 control the upper cutoff frequency. The independent tuning of the lower VOLUME 10, 2022    For the ECG application with motion artifact reduction, the bandwidth of the BPF at 0.5-250Hz required that the bias current 10µA has been assigned. The in-band frequency has been tested by applying the sine wave signal of 20Hz and amplitude of 210mVp-p at input of proposed BPF. Fig. 37 illustrates that the 2 nd and 3 rd harmonic components were lower than the fundamental component by 45.6 and 46.4dB, respectively.  The ECG signal from the generator with random noise and motion artifact noise (300mHz) was applied at the proposed BPF filter input. The clean ECG output can be recovered without motion artifact and random noises, as shown in Fig. 38, agreed with the simulation result.
Finally, it is worth mentioning that although the experimental results were obtained by commercially available OTA using a different power supply and power consumption but the design concept, the simplified structure, tunability, and actual application are confirmed consistent with the simulation results. Furthermore, the proposed MIOTA has two differential inputs (constructed by two commercially OTAs); hence the advantage of the MIOTA in terms of a reduced number of active elements and power consumption is evident.

VI. CONCLUSION
This paper presents a 5 th -order Chebyshev low-pass and a 3 rd order band-pass filters for ECG signal processing. The filters employ an innovative CMOS structure of OTA that exploits the bulk-driven, the self-cascode and the multiple-input to achieve enhanced linearity under 0.5V voltage supply. The simulation results including MC and PVT confirm the robustness of the circuit. The circuit functionality is also confirmed by commercially available OTA LT1228 and the experimental results agree with theory. The proposed filter can efficiently reduce the random noise and motion artifact noise in ECG.
The filter circuits offer attractive FoM and DR compared with most related published works.