Improvement of Recursive DFT for APF With Higher Switching Frequency to Suppress Wideband Harmonics

Shunt active power filter (APF), with higher switching frequency, has a potential market for suppressing wideband harmonics in the more electric aircraft (MEA) or high-speed train (HST) power grid. In this case, the selective extraction of harmonic current reference is essential. Recursive discrete Fourier transform (RDFT) is widely adopted for its excellent selectivity and low computational burden. However, RDFT is tough to implement in the higher frequency APF with the shorter switching cycle, and suffers from the demerit of slow dynamics. To alleviate those, three improved RDFTs are proposed in this paper. Firstly, it is revealed that RDFT can be regarded as a series of DFT and inverse-DFT (IFT), and its settling time depends on the comb filter of DFT. Then, by rearranging the sampling frequency of DFT according to the extracted harmonic, the computational burden of twice-sampling RDFT (TS-RDFT) is reduced while satisfying the same extraction accuracy. Furtherly, to improve the dynamics of TS-RDFT while retaining the merits of simplicity and selectivity, the comb filter is reconfigured based on the load current spectrum. For balanced loads, the settling time of TS-RDFT can be shortened from 1 to 1/6 fundamental cycle in the synchronous reference frame. For unbalanced loads, it is shortened to 1/2 cycle in the $\alpha \beta $ frame. Finally, the simulations with Matlab for harmonic extraction in 400Hz grid and the experiments with the APF prototype for harmonic suppression in 50Hz grid are carried out to verify the effectiveness of the proposed methods.


I. INTRODUCTION
Shunt active power filter (APF), with the representative 10k-20kHz switching frequency, is an effective apparatus to suppress 5 th -31 st dominant harmonic currents in the 50/60Hz utility grid [1]- [3]. However, with the increase of high-speed train (HST), more electric aircraft (MEA), distributed power generation system (DPGS), and other grid-tied converters based on the pulse width modulation (PWM), more and more attention has been paid to the suppression of high frequency The associate editor coordinating the review of this manuscript and approving it for publication was Nagesh Prabhu . and wideband harmonics. For the HST converter, its gridside current might be distorted by the high-frequency harmonics caused by resonance and characteristic harmonics nearby its switching frequency [4], [5]. The 24-hour recorded waveforms in [4] show that the voltage of the traction grid is highly distorted by around 50 th and 90 th harmonics. For the constant frequency grid in MEA, its fundamental frequency is 400Hz [6], [7], which means that the harmonic frequency is much higher than that in utility grid. As for DPGS, the wideband harmonics are mainly generated by the resonance between LCL grid-tied converters and weak grid. The frequency of resonance harmonic can be up to 1/2 of the switching frequency, which brings challenges to the stability of DPGS [8], [9]. Unfortunately, it is difficult to suppress high frequency and wideband harmonics with the traditional APF, because of the limited control bandwidth.
To extend APF current bandwidth, some researches have been carried out. Obviously, it is direct to reach a wider control bandwidth with a higher switching frequency. Two types of APFs with 100kHz sampling frequency are proposed in [10] and [11], respectively. The higher frequency APFs are effective in suppressing wideband harmonics, due to their achievable wider bandwidth. However, the total execution time in digital signal processors (DSP) is limited by the shorter switching cycle, and attention needs to be focused on that in digital implementation [10], [11]. In [12], an iterative learning control and variable switching frequency strategy is proposed to provide high gains within a wider frequency range. But, its upper limit of switching frequency is only 16kHz. Besides, using multilevel converters is a promising way to broaden APF bandwidth, while power switches can operate at a lower frequency. A five-level cascaded H-bridge APF is adopted in [7], whose equivalent switching frequency is 26kHz with submodules switching at 6.5kHz. Nevertheless, it might be too costly and complicated to meet reliability requirements. Thus, higher frequency APF might be a simple and effective apparatus to suppress wideband harmonics.
The extraction of current references is the prerequisite for APF to suppress harmonics. Several extraction methods have been discussed in recent years [13]- [25], which can be generally summarized as time-domain and frequency-domain methods. Although little steady-state error and relatively fast transients can be attained with time-domain methods, some limitations exist in the application. For the methods based on bandpass filtering, such as the harmonic-dq-frame [13] and second-order generalized integrator (SOGI) [14], the tradeoff between steady-state error and dynamic should be considered. The multiple reference frame (MRF) [15], adaptive notch filter (ANF) [16], Kalman filter (KF) [17], and multiple SOGI (MSOGI) approaches [18] extract harmonics based on the harmonic decoupling. But, their computational burden is proportional to the number of harmonics in the input signal. Besides, the cascaded-delayed signal cancellation (CDSC) extracts harmonics by attenuating undesired components with a series of DSCs [19]. However, it is not suitable for the selective APF, because many DSCs are required in this case.
Frequency-domain methods typically refer to the Fourier transform based techniques. Discrete Fourier transform (DFT) selectively extracts harmonics by transforming input signals from the time into the frequency domain and reconstructing the desired harmonic back into the time domain [2], [3]. DFTbased methods are widely adopted for their superb simplicity, selectivity, and steady-state accuracy. For realizing real-time harmonic extraction, the recursive form of DFT (RDFT) has been proposed [11], [20]. With the sliding window to execute DFT cycle-by-cycle, RDFT is of low computational burden. But, it is difficult for higher frequency APF to selectively extract multiple harmonics and accomplish other tasks in the shorter switching cycle. To further reduce the computational complexity, the RDFT based on synchronous reference frame (SRF) is presented in [21]. Although the computational burden is reduced nearly by half for extracting harmonics of balanced loads, the selectivity of RDFT also shrinks. In [10], a multiple resolution scheme is put forward. By reducing the control frequency of low bandwidth loops, such as phaselocked loop (PLL) and the control loop of DC voltage, the computing resources of DSP can be released for harmonic extraction and the control loop of inner current. However, the control frequency of the current loop is variable, which will deteriorate the harmonic suppression capability of APF. Another frequency-domain method is the discrete wavelet transform (DWT) [22], [23]. Unlike the DFT, the DWT-based methods provide a nonuniform division of frequency domain, so its time-frequency resolution is flexible. These methods are effective tools to estimate harmonics and inter-harmonics in the power grid, especially in the case of time-varying signals. But, RDFT is preferred in APF applications, because of the higher requirements of DWT on hardware resources.
The major drawbacks of the DFT-based methods are the slow transients with at least one fundamental cycle. In order to improve extraction dynamic, the generalized DFT (GDFT) is presented in [24], [25]. By reconfiguring the comb filter of DFT, the settling time of GDFT for balanced loads is reduced by 5/6 [24] and that for unbalanced loads is 1/2 [25]. But, complex adjustment factors are required for GDFT to recover the amplitudes and phases of extracted harmonics, rather than real factors for RDFT. Therefore, the digital implementation of GDFT is more complicated than that of RDFT.
To realize selective and fast-dynamic harmonic extraction for higher frequency APF, three improved RDFTs with less computational burden are proposed in this paper. The key ideas are rearranging DFT sampling frequency according to the extracted harmonic and reconfiguring comb filter based on the spectrum of load current. The remaining of this paper is organized as follows. The control architecture of APF and the principle of traditional RDFT are presented in Section II. Twice-sampling RDFT (TS-RDFT) is proposed to reduce the computational burden in Section III. Considering balanced and unbalanced loads, two TS-RDFTs with fast dynamics are introduced in Section IV. The simulation and experimental results with different methods are compared in Section V and VI. Conclusions are finally drawn in Section VII.

II. APF WITH RDFT
A. CONTROL ARCHITECTURE Fig.1(a) illustrates the control architecture of the higher frequency APF. L g and R g are the equivalent inductor and resistor of the grid. Load I is a typical three-phase bridge diode rectifier, which is widely used as the front-end of industrial AC drives. It is chosen as the balanced nonlinear load in this paper and is with a resistor R Labc at the DC-side. Load II is a VOLUME 9, 2021 single-phase bridge rectifier connected between phase A and B, and is selected as the unbalanced load. In order to generate unbalanced harmonics, the inductor L Lab and resistor R Lab are connected in series at the DC-side. L fc , L fg , C f , and R fd represent the converter-side inductor, grid-side inductor, filter capacitor and passive damping resistor of APF output power filter, respectively.
As shown in Fig.1(b), harmonic reference i * Lh is the sum of desired harmonics i * Lk , which are selectively extracted from load current i L . The phase angle θ 1 of PCC voltage v T is got by the PLL. The outer loop regulates the DC-side voltage V dc with PI v controller, and the output current i F is controlled in SRF with PI i . With the symmetrical PWM, the A/D sampling and switching frequencies of APF are both 100.8kHz.
Considering its shorter switching cycle, i.e. 9.92µs, a dualcore DSP TMS320F28377D is adopted to implement the digital control system of APF. With two identical floatingpoint CPUs, whose maximum core frequencies are 200MHz, 800 million instructions can be processed per second. As a C2000 series DSP, the F28377D with built-in PWM modules is low-cost and preferred in industrial applications. For programming convenience, CPU1 is taken as the master, and CPU2 as the slave. Additionally, 10ns-scale data sharing between two CPUs is accessible with the builtin inter-processor communication (IPC) unit. Consequently, the data transmission delay between two CPUs can be ignored. Table.1 shows the DSP execution time of different digital control segments. The total execution time in CPU1 except harmonic extraction is 6.26µs, which is about 63.10% of one switching cycle. Therefore, less than 3.66µs is left for CPU1 to extract harmonics. As the other part of current references, the harmonics extracted in CPU2 should be transferred to CPU1 in time. Thus, considering a certain time margin, the execution time for harmonic extraction in CPU2 is also less than 3.66µs. As a result, it is tricky to selectively extract harmonics in such a short time.

B. RDFT
Among the various selective extraction methods, RDFT is the most well-favored one for its low computational burden. Based on the DFT, the load current i L can be expressed as where K m is the maximum harmonic order to be concerned, ω 1 is the fundamental angular frequency of grid, and the k th harmonic frequency kω 1 is also noted as ω k . n is the present instant with the discrete cycle τ . A k and B k are the cosine and sine amplitudes of k th harmonic, and they are obtained by where N is the sampling points in each fundamental cycle T 1 , therefore T 1 = N τ . With (2), it will take N − 1 additions and N + 1 multiplications to calculate A k or B k in each sampling cycle. For the APF with 10k-20kHz A/D sampling frequency, N is 200-400. Because a large number of multiplications need to be processed by DSP, it is difficult to apply (2). To lower the computational burden, its recursive form is written as (3).
With the sliding window of N length required, only two additions and multiplications need to be taken. Then, the desired k th harmonic component i Lk can be obtained by the inverse-DFT (IFT) as (4).
The block diagram of RDFT k extracting k th harmonic is shown in Fig.2(a). In this paper, RDFT is regarded as a series of three parts, which are DFT, IFT, and adjustment factor. For general expression, the sampling cycles of DFT and IFT are noted as τ DFT and τ IFT . The extraction of k th harmonic is as follows. Firstly, the nonlinear load current i L (t) is A/D sampled at frequency f s . Secondly, to obtain the amplitude A k and B k , i L (n Ts ) is transformed from the time into the frequency domain with the DFT k , whose sampling frequency is f DFTk = 1/τ DFTk . Then, with the IFT k sampling at frequency f IFTk = 1/τ IFTk , A k and B k are transformed back to the time domain to reconstruct k th harmonic current reference i * Lk . Finally, the adjustment factor is adopted to recover the amplitude and phase of i * Lk .
The z-domain transfer function of RDFT k is derived as As the magnitude-frequency plot in Fig.3(a), G cf (z) is of zero gain for integer-order harmonics. Therefore, it is often referred to as the comb filter. Since the length of the sliding window is N , the delay of G cf (z) is N τ = T 1 , which determines the settling time of RDFT.
The G cf (z) can be further expanded as G cf (z) has N zeros, which are evenly located on the unit circle in the complex plane. Taking N = 24 as an example, the zero-pole map of G RDFT5 (z) is drawn in Fig.3 The introduced zeros make that integer-order harmonics of the input signal can be completely stopped, which is just as the zero-gain feature mentioned above.
G RDFTk (z) has one pole z = e j2kπ/N , which is also located on the unit circle and coincides with the zero corresponding to the k th harmonic. Because of the zero-pole cancellation, the k th harmonic of the input signal can be preserved. As the Bode diagram in Fig.3(c), it is of unit gain and zero-phase shift for the extracted harmonic, but zero gain for others. It means that all harmonics except the desired one are stopped, which makes RDFT superior in extracting harmonics.
Due to low computational burden and superb selectivity, RDFT is favorite for higher frequency APF. For the threephase three-wire APF, RDFT is generally realized in the αβ frame and the block diagram is shown in Fig.2(b). The DFT and IFT sampling frequencies of all the extracted harmonics are set to the same and equal to f s . That means To further lower the computational burden and reduce the occupied memory, all the RDFT k share a common comb filter and adjustment factor. In this way, it takes 3H + 1 additions and 4H + 1 multiplications to extract a total of H harmonics. However, about 13µs is taken to extract 6 harmonics with the TMS320F2812 [2]. Even with the dual-core F28377D, it takes 3.116µs to extract 12 harmonics. Therefore, for the higher frequency APF based on the low-cost DSP, it is too difficult to suppress wideband harmonics with RDFT. Adopting higher performance processors might avoid this, but it will cause additional costs. To further reduce the computational burden, an improved RDFT is proposed in the following.

III. TS-RDFT
The A/D sampling frequencies of load current and APF output current usually are f sw for the symmetrical PWM or 2f sw for the asymmetrical PWM. The sampling frequency of IFT is related to the harmonic current reference in the time domain, so it should be equal to that of output current. For the APF in this paper, f IFT = f s = f sw . As for the sampling frequency of DFT, it is related to the accuracy of harmonic amplitudes calculated in the frequency domain. If the error of amplitude is still acceptable when f DFT is reduced, it is possible to rearrange f DFT according to extracted harmonic for lowering the computational burden.
At first, it is necessary to derive the algebraic relationship between f DFTk and amplitude error for theoretically setting f DFTk . Taking the typical three-phase bridge rectifier as an example, its AC-side current i La is drawn in Fig.4(a). t a and t b are two commutation instants of the rectifier diode. For the simplicity of analysis, the square waveĩ La is adopted to approximate i La , where I L is its amplitude. Considering the symmetry of calculating A k and B k in the i La negative and positive half cycles, only the negative one is concerned.
As in Fig.4(b), τ DFTk infinitely approaches zero for the continuous Fourier transform (CFT) and A k is obtained as As for the DFT with sampling cycle τ DFTk , A k is got as where t a + t is the first sampling instant after t a , and t < τ DFTk . When N is an integer multiple of 3, t b + t is the first sampling instant after t b . With (10), we can further get The relative error of A k caused by discretization is When t varying from 0 to τ DFTk , the maximum error is The higher DFT sampling frequency f DFTk is, the smaller A err_m is. For the invariant A err_m , f DFTk is needed to increase along with the harmonic frequency f k . A err_m with different f DFTk /f k and the maximum error obtained by the simulation in Matlab are plotted in Fig.4(c). Due to the approximation in derivation, the difference between the obtained A err_m and simulation results exists, but it can be neglected. Moreover, the same procedure may be easily adapted to obtain the maximum error of B k , and B err_m is equal to A err_m . So, to lower computational burden, the DFT sampling frequency of specific extracted harmonic can be rearranged according to the given maximum error A err_m and (13). This method is defined as the twice sampling in this paper.
The block diagram of TS-RDFT is shown in Fig.5. The k th harmonic is extracted at the DFT sampling frequency f DFTk lower than f s , while the sampling frequencies of load current and IFT are still f s . Certainly, the harmonics with different frequencies can be set to the same f DFT . For the simplicity of digital implementation, it is recommended that where, M 1 and M 2 are positive integers, and M 1 is smaller than M 2 . A k err_m is the acceptable maximum error for the k th harmonic. In M 1 cycles of every M 2 A/D sampling cycles, twice sampling needs to be carried out. In these cycles, A k and B k can be recursively calculated by (15).
However, in the other M 2 − M 1 cycles, A k and B k can be simply obtained with where n TS is the latest twice-sampling instant, A k (n TS ) and B k (n TS ) are the execution results at n TS . The same as RDFT, the common adjustment factor and comb filter are set for TS-RDFT. Therefore, it takes 2M 2 additions and 2M 1 multiplications, instead of 2M 2 additions and multiplications, to obtain A k and B k . But, M 2 additions and 2M 2 multiplications are still required for IFT k . Because the execution time of addition in DSP is much shorter than that of multiplication, the computational burden for TS-RDFT to extract k th harmonic can be reduced by almost (M 2 − M 1 )/2M 2 . Moreover, RDFT can be regarded as the special case of TS-RDFT with M 2 = M 1 .
Although the computational burden of TS-RDFT can be reduced, its settling time is the same as that of RDFT. To alleviate this, two fast-dynamic TS-RDFTs are proposed in the next section by reconfiguring their comb filters.

IV. TS-RDFT WITH FAST DYNAMIC
The comb filter aims to filter out all components in the input signal, so its zeros should be placed according to the spectrum of load current. Balanced and unbalanced loads are considered respectively to redesign the comb filters.

A. TS6-RDFT FOR BALANCED LOADS
For balanced loads, the currents can be expressed as where I L1 and I Lk are the amplitudes of fundamental and k th components, ϕ L1 and ϕ Lk are their angles in phase A, and l is positive integers. In the abc frame, (6l − 1) th harmonic is of negative sequence, whereas (6l + 1) th is of positive. When i L is transformed into SRF, it can be expressed as below.
i Ld and i Lq only contain DC and 6l th components, where the zeros of comb filter are just required to be placed on. So, the comb filter can be redesigned as The sliding window length of G cf (z) can be reduced to N /6, which means that the settling time is shortened to T 1 /6. This method is referred to as the TS6-RDFT in this paper. The zero-pole map when N = 24 is plotted in Fig.6(a). Compared with RDFT, the number of TS-RDFT zeros are reduced by 5/6 and the redundant zeros are removed. The control block of the comb filter is shown in Fig.6(b), and the VOLUME 9, 2021  length of the sliding window only needs to be modified to N /6. The block diagram of TS6-RDFT is shown in Fig.7(a), and the adjustment factor is modified to N /12. Firstly, i L is transformed into SRF, and 6l th harmonics are extracted with TS-RDFT. Although its settling time is the same as that of GDFT in [24], the adjustment factor of TS6-RDFT is real. Consequently, it is easier to implement, and simplicity is preserved.
Moreover, (6l − 1) th and (6l + 1) th harmonics are both 6l th in the SRF, and TS-RDFT cannot distinguish between the positive-and negative-sequence harmonics with the same frequency. So, both are always extracted at the same time. If all harmonics are extracted in SRF, the computational burden will be reduced by half. Nevertheless, the (6l − 1) th and (6l +1) th harmonics cannot be extracted individually, and the selectivity of TS6-RDFT is weakened. To maintain the selectivity, a decoupling method is explored as follows.
For the convenience of analysis, harmonics are written in the vector form.
The d-axis and q-axis harmonics are With the DFT, the cosine and sine amplitudes of the 6l th harmonics on the d-axis and q-axis can be obtained as where Re[·] and Im[·] denote the operations of obtaining real and imaginary parts, respectively.
Positive-or negative-sequence harmonics with the same frequency can be individually extracted with (23). As shown in Fig.7(b), the decoupling part is added between DFT and IFT, which just takes 4 additions. Its execution time can be neglected, compared with that of multiplications in DSP. With the decoupling method, the settling time of TS6-RDFT can be shortened to T 1 /6 and computational burden can be reduced by half, while maintaining the selectivity.

B. TS2-RDFT FOR UNBALANCED LOADS
As for unbalanced loads, the currents are expressed as The harmonics of unbalanced loads are more abundant than those of balanced loads. 1) Load currents contain not only characteristic harmonics, but also other odd harmonics. 2) Each harmonic may contain both positive-and negativesequence components.
Therefore, the comb filter is redesigned in the αβ frame. To place zeros on the odd harmonics, it is designed as The memory window length of G cf (z) is reduced to N /2, and the settling time is shortened to T 1 /2. This method is referred to as the TS2-RDFT in this paper. The zero-pole map when N = 24 is drawn in Fig.8(a) and the control block of the comb filter is shown in Fig.8(b). The same as TS6-RDFT, the adjustment factors of TS2-RDFT are also real. The block diagram of TS2-RDFT can be easily obtained, so it is not plotted here.  (14), the twicesampling frequencies are set as The simulation waveforms for the balanced load are shown in Fig.9. The steady-state waveforms with three methods have the same shape, and the extraction errors are indistinguishable. The settling time of RDFT and TS-RDFT are both one fundamental cycle T 1 (2.5ms). But due to DFT frequencies is lower than those of IFT, overshoot exists in the dynamic of TS-RDFT. With TS6-RDFT, the settling time is shortened to T 1 /6 (0.42ms). The overshoot in the dynamic of TS6-RDFT is higher than that of TS-RDFT, because its sliding window is shorter.
The amplitude errors A err are shown in Fig.10. For RDFT, the harmonic with a higher frequency tends to a greater error. Because the DFT sampling frequency is lower than f s , A err of 5 th -25 th harmonics with TS-RDFT are greater than those with RDFT. But, they are still lower than the given limitation of 5%. For the 29 th and 31 st harmonics without twice sampling, A err with TS-RDFT are the same as those with RDFT. A err with TS6-RDFT is almost equal to those with TS-RDFT, except for the 7 th harmonic. The reason is the 5 th and 7 th harmonics are both 6 th in SRF, and f DFT6 is set equal to f DFT5 , which is lower than f DFT7 . For the balanced load, the amplitude errors with TS6-RDFT are lower than the given value, and the settling time is reduced by 5/6.

B. UNBALANCED LOAD
For the unbalanced load, both Load I and Load II are turned on. All 5 th -31 st odd harmonics are extracted with the RDFT, TS-RDFT, and TS2-RDFT. The twice-sampling frequencies of characteristic harmonics are the same as those in (26), and  the others are set as The simulation waveforms for the unbalanced load are shown in Fig.11. With the TS2-RDFT, the settling time is shortened from T 1 to T 1 /2. Overshoot also exists in the dynamic of TS-RDFT and TS2-RDFT. Because the A err of characteristic harmonics are the same as those in Fig.10, only amplitude errors of non-characteristic harmonics are shown in Fig.12. A err with TS2-RDFT are almost the same as that with TS-RDFT, and are lower than 5%. For the unbalanced load, the amplitude errors with TS2-RDFT are also lower than the given value, and the settling time is reduced by 1/2.

VI. EXPERIMENTAL VALIDATION
To verify the effectiveness of improved RDFTs, some experiments are carried out with the APF prototype, whose pictures are shown in Fig.13. The experimental parameters are listed in Table.2. The integrated power module of APF is SiC MOSFET CCS050M12CM2 with the driver board CGD15FB45P1. Experimental results are recorded by VOLUME 9, 2021   the Fluke 434 power quality analyzer and Agilent oscilloscope MSO-X 3014A. Experiments are carried out in 50Hz grid and APF aims to suppress the harmonics within 50 th order. Because APF can track current references without  steady-state error in this case, the quality of harmonic suppression is only related to the extracted harmonic references.

A. BALANCED LOAD
For the balanced load, only Load I is turned on and APF aims to selectively suppress characteristic harmonics (5 th -49 th ). The maximum amplitude errors are limited to 1%. With (13), we can get f DFTk f k ≥ 18.14 (28)  Harmonics are divided into four groups, and their twicesampling frequencies are set as Therefore, eight A/D sampling cycles are taken as one twice-sampling cycle and the schedules are shown in Fig.14. For RDFT, the DFTs of all harmonics need to be executed in every cycle, which means f DFTk = f s . Due to the limitation of DSP execution time, only 5 th -37 th harmonics can be extracted. However, the selective extraction of 5 th -49 th harmonics is achievable with TS-RDFT and TS6-RDFT. For the TS-RDFT in Fig.14(a), at most three DFTs need to be executed by each CPU in one sampling cycle, which is of less computational burden than RDFT. Moreover, with the TS6-RDFT in Fig.14(b), only CPU1 is occupied for harmonic extraction, and the computational resources of CPU2 are released. As shown in Fig.15(a), the load currents i L are severely distorted and the total harmonic distortion (THD) of i La is 29.6%. With APF turned off, the grid currents i g are equal to i L . Therefore, the THD of i ga is also 29.6%, which cannot meet limits of the IEEE std.519-2014 [26]. The results of APF suppressing 5 th -37 th harmonics with RDFT are shown  in Fig.15(b). With APF turned on, the waveform of i ga is almost sinusoidal and the THD of i ga is suppressed to 1.7%. It is reminded that the THD calculated by the analyzer only contains the harmonics within 40 orders, according to the user's manual [27]. The harmonic distortion factors (HDF) of 5 th -37 th harmonics are lower than 1%. But for 41 st -49 th harmonics, their HDF are still around 2%. This is because only 5 th -37 th harmonics are extracted with RDFT.
When TS-RDFT is adopted, the waveforms of 5 th -49 th harmonics suppression are shown in Fig.15(c). The THD of i ga is 1.8%, which is slightly higher than that with RDFT. The reason is that the amplitude errors with TS-RDFT are greater than those with RDFT. The HDF of all harmonics, including 41 st -49 th harmonics, are suppressed to below 1%. In this way, grid currents can meet the harmonic limit of the IEEE std. 519-2014. Fig.15(d) shows experimental results with TS6-RDFT. Because the zeros of TS6-RDFT are only placed on the position corresponding to the characteristic harmonics, other harmonics cannot be stopped. Therefore, the THD is suppressed to 2.0% and is higher than that with TS-RDFT.
The dynamic waveforms before and after Load I turned on are shown in Fig.16. As in Fig.16(a), Load I is turned on at t 1 and APF current i Fa reaches the steady state after 20ms. It is determined by the settling time of RDFT. As the waveforms with TS-RDFT in Fig.16(b), i Fa also reaches steady state after 20ms and a little overshoot exists in the dynamic. But with the redesigned comb filter, the settling time of TS6-RDFT is shortened to 3.3ms and the overshoot in dynamic is higher than that with TS-RDFT.
To verify the effectiveness of the proposed decoupling method, the experiment of APF selectively suppressing the 5 th harmonic with TS6-RDFT is carried out, and the results are shown in Fig.17. The HDF 5 is 0.6% and the settling time of i Fa is 3.3ms, which is consistent with the above analysis.

B. UNBALANCED LOAD
For the unbalanced load, both Load I and Load II are turned on and APF aims to selectively suppress all odd harmonics (3 rd -49 th ).
As shown in Fig.18(a), because Load II is just connected between phase A and B, the amplitudes of i La and i Lb are greater than that of i Lc . The THD of i La is 22.5% and the low-order non-characteristic harmonics (3 rd , 9 th , 15 th , and 21 st ) also need to be suppressed. The suppression results with RDFT are shown in Fig.18(b). Due to the limitation of execution time, only 3 rd -25 th harmonics can be extracted. Therefore, the THD of i ga is only suppressed to 4.0%.
For the TS-RDFT in Fig.14(c), not only all characteristic harmonics, but also the additional four non-characteristic harmonics can be extracted. Similarly, at most three DFTs are executed by each CPU in one A/D sampling cycle. As the suppression results with TS-RDFT in Fig.18(c), the THD of i ga is 2.2% and the amplitudes of harmonic within 50 orders are below 1%. The THD after suppression with TS2-RDFT is 2.3% and it is slightly higher than that with TS-RDFT.
The dynamic waveforms before and after Load I turned on are shown in Fig.19. Before t 1 , only the Load II is turned on. i ga is slightly distorted and is nearly sinusoidal, because the inductor L Lab is relatively small. It takes 20ms for i Fa to reach the steady state with RDFT and TS-RDFT. A little overshoot also exists in the dynamic of TS-RDFT. With the redesigned TS2-RDFT, the settling time is shortened to 10ms and the overshoot in the dynamic is higher than that with TS-RDFT. Table.3 shows the execution time of different extraction methods. With the traditional RDFT, only 6harmonics are extracted, and the average execution time is 0.519µs per harmonic. When TS-RDFT is adopted for the balanced load, the average time is 0.403µs and is reduced by 22.4%. When extracted in the SRF, the number of harmonics is reduced by half. Therefore, the average time can be reduced by 62.0%. The harmonics of unbalanced loads are more abundant than those of balanced loads. In this case, 10 harmonics are extracted with TS-RDFT and the average time is reduced by 31.4%. Because only the comb filter is redesigned for TS2-RDFT, its execution time is the same as that of TS-RDFT and the average time is also reduced by 31.4%.
To sum up, the improved RDFTs are of less computational burden and increase the total number of extracted harmonics without sacrificing accuracy. Compared with the traditional RDFT, they are more competitive and attractive in wideband harmonic suppression. With TS6-RDFT and TS2-RDFT, the dynamic time of harmonic extraction can be shortened to 1/6 and 1/2 fundamental cycle, respectively.

VII. CONCLUSION
Selective extraction is essential but tough to implement for higher switching frequency APF, due to the shorter switching cycle and DSP limited computational resources. Therefore, three improved RDFTs are presented for APF to selectively suppress wideband harmonics. Compared with traditional RDFT, they are summarized as follows 1) By rearranging DFT sampling frequency according to the extracted harmonic, the computational burden of TS-RDFT is reduced. Although there is overshoot in the dynamics, the steady-state accuracy can still be ensured. TS-RDFT is more valuable for the loads with more harmonics to be suppressed.
2) By redesigning comb filter in SRF, the settling time of TS6-RDFT for balanced loads can be shortened to 1/6 fundamental cycle, making it more attractive in the case of load changing frequently. Only 4 additions are required to decouple positive-and negativesequence harmonics with the same frequency and maintain the capability of single harmonic extraction. Besides, the computational burden of TS6-RDFT is further reduced by half. But due to the shorter sliding window, the overshoot in the dynamic of TS6-RDFT is higher than that of RDFT. Similarly, by redesigning the comb filter in the αβ frame, the settling time of TS2-RDFT for unbalanced loads is shortened to 1/2 cycle. Therefore, the fast-dynamic TS6-RDFT and TS2-RDFT are recommended to lower the computational burden and could be attractive alternatives for APF used in industry, where low-cost DSP is preferable. Additionally, the proposed twice-sampling methods could be also considered in other power electronic converters with higher switching frequency or equivalent switching frequency, such as onboard chargers, grid-connected inverters, and multi-level converters. From 1990 to 1995, he was an Electrical Assistant Engineer with Wuhan Marine Electric Propulsion Institute. In 1998, he joined the Department of Applied Electronics, HUST, as a Lecturer, where he became an Associate Professor, in 2004. From 2012 to 2013, he was a Visiting Scholar with the Department of Electrical Engineering and Computer Science, The University of Tennessee, Knoxville, TN, USA. He has authored or coauthored more than 100 technical papers published in journals and conference proceedings. His research interests include static chopper, converter and inverter, reactive power compensator, active power filter, uninterruptible power supply, universal power quality conditioner, unified power flow controller, power electronic system stability and power quality, renewable energy, distributed generation, and smart grid.