Impacts of Grid Voltage Harmonics Amplitude and Phase Angle Values on Power Converters in Distribution Networks

Motor drive systems based on diode-rectifier are utilised in many industrial and commercial applications due to their cost-effectiveness and simple topology. However, these diode rectifier-based systems can be affected by power quality and harmonics in distribution networks. Thus, this paper investigates the impact of grid voltage harmonics on the operation of power converters with three-phase diode rectifier using mathematical formulation of the drive voltage and current harmonics based on grid voltage harmonics. Simulation analysis and practical tests have been then carried out to validate the mathematical equations and the impact of grid voltage harmonics on the power converter harmonics. The results illustrate that even a small amount of grid voltage harmonics (around 4%) could significantly impact the input current harmonic contents of the three-phase diode rectifier. It is also shown that the phase-angle of grid voltage harmonics plays a crucial role to improve or deteriorate the input current harmonics of the power converters. In the next step, the optimum condition of grid voltage harmonics to minimise the input current harmonics has been evaluated and verified based on different grid codes. Finally, a harmonic mitigation technique in multi-drive systems using Electronic Inductor is proposed to mitigate the current harmonics at the PCC.


I. INTRODUCTION
In recent years, a higher installation level of nonlinear power electronics-based devices, such as Adjustable Speed Drives (ASDs), computers, and LED lighting, has become noticeable in residential, commercial, and industrial distribution networks [1]. A similar trend can be seen with the penetration level of renewable energy sources, such as solar power [2]. Thus, utility companies have become more concerned about harmonic distortion in the system, which could lead to higher losses, transformer temperature rise, and grid instability issues [3]. It is estimated that more than 40% of the global electrical energy is consumed by motor drives [4].
The associate editor coordinating the review of this manuscript and approving it for publication was Ruisheng Diao . This has led manufactures to utilise power electronic-based devices in motor drives, such as ASDs, to improve the efficiency and energy conservation of this significant part of loads [5]. In the literature, researchers have investigated the impact of the increased utilisation of nonlinear loads on the distribution networks. For instance, it has been shown in [6]- [8] that the installation of low quality Compact Fluorescent Lamps (CFLs) could increase the voltage distortion at the medium voltage level and lead to more harmonics-related power loss [8]. The impact of installing residential solar photovoltaic (PV) on the grid voltage distortion has been investigated in [9], [10]. It has been shown in [10] that in a microgrid, which is supplied by a photovoltaic station, replacing 30% of the conventional incandescent lamps by CFL could result in 8% THD v . The field measurements of VOLUME 9, 2021 This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/ typical residential distribution systems presented in [11] show that the average THD v was about 4.7% with 45% of the feeders having THD v above 5%. Typically, ASDs are designed based on front-end and rear-end power conversion stages, where the Front-end converts the AC voltage to DC, and the Rear-end converts the DC voltage back to the desired AC [12]. A DC-link capacitor is usually employed to maintain a low-ripple DC voltage. Although Voltage Source Inverter (VSI) is commonly utilised in the rear-end [13], different topologies can be used at the front-end stage. In [14]- [16], an active front-end is proposed to improve the quality of the input current by shaping it close to an ideal sinewave signal. However, conventional three-phase Diode Rectifiers (DR) are still used as front-end for a broad range of ASD systems due to their simplicity, reliability, and low cost [17]. Additionally, international standards allow a relatively high level of current Total Harmonic Distortion (THD i ) emitted by three-phase rectifier systems. For instance, according to IEC61000-3-12 Table-4, the THD i is permitted up to 48% for a system with a current of 16-75 Amps per phase [18]. However, there is still a lack of investigation about the behaviour and harmonic emission of ASDs under the impact of grid voltage distortion.
Authors in [19], [20] have investigated the input current harmonics of ASDs under grid voltage unbalance and sag conditions. A high level of voltage unbalance could lead the conventional three-phase rectifier to operate in single-phase mode, which generates a high amount of current harmonics [20]. In [21], [22], the current harmonics emission of three-phase diode rectifiers has been investigated at the system level. The simulation results in [22] show that the phase-angle of current harmonics is important for harmonic cancellation at the system level. In [23], the power quality issues in mining industry grids have been analysed. It has been shown that the grid impedance influences the current harmonic emission of nonlinear loads. Application of Electronic Inductor (EI) has been proposed in [24,25] to mitigate the current harmonics in a multi-unit system,. Similarly, it has been shown in [25] that the input current THD i of a multi-unit system can be dropped to 30% by using EI.
The reviewed literature indicates that there is a research gap in analysis of the impact of grid voltage harmonics on the input current of ASDs with three-phase diode rectifier. Thus, different cases of voltage harmonics at the PCC are considered in this paper to perform a comprehensive analysis in that area. For that aim, first, mathematical formulations of the rectified voltage, inductor current, and input currents in a distorted grid are presented. Then, simulation study and practical experiments are carried out to examine the impact of voltage harmonics on ASD's current harmonics emission. The results show that a small amount of grid voltage harmonics could have a high impact on the generated current harmonics at the drive rectifier input. Finally, a harmonic mitigation technique using EI is proposed to mitigate the current harmonics generated by conventional drives.
The main contributions of the paper can be mentioned as follows: • Propose a mathematical model to calculate the rectifier voltage and input currents under the distorted grid.
• Evaluate the impact of both magnitude and phase-angle of grid voltage harmonics on the current harmonics emission of a motor drive with three-phase diode rectifier front-end. This is done by considering different scenarios and the permissible voltage harmonics allowed by various international standards.
• Propose a mitigation technique using an Electronic Inductor to reduce harmonics generated by motor drives with conventional three-phase diode rectifier.
This paper is organised as follows: harmonic analysis in the distorted grid is discussed in the next section. Section III then presents the impact of voltage harmonic order, magnitude, and phase-angle on the power converter. Impact of voltage harmonics on the current harmonic emission is then discussed in Section IV. Section V presents a harmonic mitigation technique followed by discussions highlighting the significant outcomes of the work in Section VI. Finally, Section VII concludes the study.

II. HARMONIC ANALYSIS IN A DISTORTED NETWORK
High penetration of nonlinear loads in the distribution network can create voltage harmonics at the PCC due to the interaction between their high level of current harmonics and the network impedance. This voltage distortion could then impact other sensitive loads such as power electronic-based devices. One of these devices is the conventional three-phase diode rectifier with a passive filter, which is a common topology for three-phase ASD systems as shown in Fig. 1 (a). The presence of voltage harmonics at the PCC (shown in Fig. 1 (b)) affects the rectified voltage (v rec ) as shown in Fig. 1 (c) for the case of 4% of 7 th harmonic with phase-angles 0 • and 180 • compared with the base case of no harmonics. This change in the rectified voltage can then impact the generated current harmonics. Additionally, voltage harmonics could shift the conductivity of the diode rectifier, which changes the current conduction time at each phase. As a result, the Displacement Power Factor (DPF) of the converter will be impacted. Thus, this section first presents a mathematical formulation for the rectified voltage and then validates them with simulation results. Then, the equations of inductor current and grid currents of the drive are presented and validated by simulation results.

A. MATHEMATICAL FORMULATION OF THE RECTIFIED VOLTAGE
The PCC voltage at a Low Voltage (LV) distribution network with distortion can be presented as the sum of fundamental voltage (V 1 ) and harmonic voltage (V h ) as shown in Fig. 1 (a). In this study, voltage harmonics magnitudes are considered less than 5% to comply with international standards such as IEEE Std 519, where voltage THD and individual harmonics are limited to 8% and 5%, respectively [26]. Additionally, to evaluate the impact of harmonic phase-angle, the phase-angle of current or voltage harmonic with respect to the fundamental voltage is used. As defined in IEC 61000-3-12 [18], the positive zero crossing (transition from negative to a positive value) of the fundamental voltage is used as the reference. Thus, the phase ''a'' voltage at the PCC is as given in (1).
where V m and ω 0 are the peak magnitude and the angular frequency of the fundamental voltage, and V h and θ h are the peak and phase-angle of the voltage harmonic order h. The Fourier series of v rec considering voltage harmonics at the AC-side can then be calculated as given in (2).
The coefficient A 0 can be calculated as given in (3).
where is the phase delay (measured in radian) caused by the harmonic phase-angle, as shown in Fig. 2. Other coefficients A n and B n in (2) can be similarly calculated from (4) and (5), as shown at the bottom of the page. Fig. 2 indicates that the voltage harmonics phase-angle could shift the voltage crossing between phases, which will then shift the conductivity of each phase by . This can also impact the DPF of the converter and the phase-angles of input current harmonics. To calculate , (6) needs to be first solved to find ω 0 t 0 , and then (7) to find .

B. VALIDATION OF VOLTAGE EQUATION WITH SIMULATION RESULTS
To validate the analytical equation for v rec , the voltage magnitudes calculated from (2) are compared with simulation results in this section. Thus, the system in Fig. 1 (a) has been modelled in MATLAB Simulink, where the PCC voltage is distorted with 4% of the 7 th harmonic with a phase-angle of 180 • . For this case, Fig. 3 confirms that the time-domain waveforms of v rec in both analytical and simulation results are similar. Thus, the accuracy of (2) to find v rec in a distorted grid is verified. In the next stage, the input and inductor current harmonics of the power converter affected by grid voltage distortions is analytically evaluated.

C. INDUCTOR AND INPUT CURRENTS EQUATIONS
To calculate the phase ''a'' input current (shown as i a in Fig. 1 (a)) under the presence of grid voltage harmonics, the inductor current (i L ) must be first calculated.
With the practical assumption of Continuous Conduction Mode (CCM) operation, i L can be calculated in each harmonic frequency by dividing voltage by the inverter harmonic impedance. The impedance seen from the rectifier output at the angular frequency 6nω 0 (Z n ) can be calculated from (8).
where R Load represents the rear-end inverter impedance for low order harmonics, which can be determined based on the load power consumption. As the inductor current harmonic at each frequency is v rec divided by Z n in that frequency, its Fourier series can be calculated using (2) and (8) as given in (9).
The Fourier series of diodes switching function for phase ''a'' can be obtained as given in (10).
This equation represents a 120 • conductivity of i L seen at the grid-side current of i a (i a = s da i L ). Thus, the Fourier series of i a can be calculated by multiplying (9) and (10) as given in (11), as shown at the bottom of the page. It should be noted that the inverter-side current harmonics in Fig. 1 (a) are based on Pulse Width Modulation (PWM) with high switching frequency (5-24 kHz). These high-order harmonics can be neglected in this research as they tend to circulate mainly through the DC-link capacitor. To illustrate, Fig. 4 presents a circuit diagram of a conventional drive, where the inverter-side is represented by the resistor (R load ) to model the load power and the current source to model the high-frequency harmonics generated by the inverter PWM switching pattern.
As shown in Fig. 4, this current can be calculated by multiplying load-side currents (i load,a , i load,b , i load,c ) by inverter switching functions (s a , s b , s c ). Using Fourier series of load currents and switching functions for the case of sine-triangular PWM, i inv has been calculated in [27]. It has been shown that, besides the DC component, represented by R Load , other harmonics of i inv are concentrated around the switching frequency and its multiples which is represented as i inv−h . As can be seen in Fig. 4, the high-frequency components of i inv circulate through the DC-link capacitor C dc with a low high-frequency impedance (shown as ''low Z HF '') rather than the high-impedance path through the inductor (shown as ''high Z HF ''). Hence, the impact of high-frequency harmonics of i inv on the grid-side low-order current harmonics can be neglected in this study. Therefore, only R load is considered in (8). In the next section, the accuracy of (9) and (11) in calculating the inductor and grid currents of the power converter in a distorted grid is verified with simulation results.

D. VALIDATION OF CURRENTS EQUATIONS WITH SIMULATION RESULTS
To validate (9) and (11), a comparison of analytical equations with simulation results has been performed, where the grid voltage had a distortion of 4% of the 7 th harmonic with 180 • phase-angle. In this case, Fig. 5 confirms that the time-domain waveforms of both analytical and simulation results of i L and i a are similar. Thus, the accuracy of (9) and (11) to find the currents values is validated and they can be used to evaluate the effect of network voltage harmonics on the converter current harmonics emission. The next

III. IMPACT OF PCC VOLTAGE HARMONICS CHARACTERISTICS ON THE RECTIFIED VOLTAGE
The impact of different characteristics of the PCC voltage harmonics including their magnitude, order, and phase-angle on the rectified voltage is investigated in this section.

A. IMPACT OF PCC VOLTAGE HARMONICS ON THE RECTIFIED VOLTAGE
The phase-angle of the PCC voltage harmonics is unpredictable and rely in different aspects such as grid impedance characteristics. Additionally, the current harmonics magnitude and phase-angle generated by the non-linear loads connected to the PCC affect the phase-angle of the PCC voltage harmonics.  (2), the ripple magnitude of v rec (V ripple ) for all the cases have been calculated as shown in Fig. 6 (a). As can be seen from Fig. 6 (a), although the voltage harmonics at the PCC for all the cases are less than 5% (12 V rms ), their impact on V ripple could be significant. It should be noted that any change in the V ripple can also impact the inductor current ripple. Consequently, the AC-side currents harmonics can also be affected as they represent the inductor current with 120 • conductivity for each phase. The changes in V ripple compared with case 1 ( V ripple ) are shown in Fig. 6 (b). It can be seen from this figure that cases 2, 7, and 9 have the lowest voltage ripple with significant reduction by 56%, 44%, and 52% compared with case 1, respectively. Thus, these cases are expected to have lower input current harmonics due to having lower V ripple compared to case 1. On the other hand, cases 3, 6, and 10 have around 54% higher V ripple compared to case 1. Therefore,  these cases are expected to have the highest level of input current harmonics. These results show that the level of voltage harmonics at the PCC is similar in all the cases. However, the variation in V ripple is different in each case, which could be related to the voltage harmonic phase-angle. For example, the harmonic distortion is 4% of the 5 th harmonic in both cases 2 and 3. However, the difference in their voltage harmonic phaseangles leads to different impact on V ripple . To illustrate that, Fig. 7 presents the rectified voltage for cases 1, 2, and 3.
As can be seen from Fig. 7, in case 2, the voltage ripple is reduced significantly compared to case 1 (34 V versus 78 V), showing a flat peak. In contrast, V ripple of case 3 is considerably higher than case 1 (121 V versus 78 V). Thus, the phase-angle of the 5 th harmonic has a significant impact on V ripple . The scenario for the 7 th harmonic is the opposite, where V ripple is reduced when the harmonic phase-angle is 180 • as shown in Fig. 6 (a) for case 7. The V ripple has dropped to 44 V, which shows a reduction of 44% compared to case 1. In contrast, V ripple increases by around 54% when the harmonic phase-angle is 0 • as shown in Fig. 6 (a) for case 6.

B. IMPACT OF VOLTAGE HARMONICS PHASE-ANGLE ON DPF
It is worth mentioning that the voltage harmonic phase-angle could also affect the DPF of the converter when is nonzero, which happens at all voltage harmonic phase-angles except 0 • and 180 • . In this analysis, cases 4 and 5 have voltage harmonic phase-angles of 90 • and 270 • . Using (7), values are calculated 2.25 • and −2.25 • for cases 4 and 5, respectively. Thus, both V ripple and DPF are expected to be impacted in these cases by changing the phase-angles of the 5 th harmonic. To evaluate that, Fig. 8 shows the simulation signals of i a in cases 1, 4, and 5. It can be seen that there is a phase shift caused by for cases 4 and 5 compared to case 1. In case 4, due to a positive , the input current is lagging compared to case 1. On the other hand, the input current of case 5 is leading compared to case 1 due to the negative . Consequently, the DPF of case 4 is reduced to 0.970 compared to 0.986 in case 1, while it is improved to 0.994 in case 5. In the next section, the optimum condition of the distorted grid to minimize V ripple is investigated.

C. OPTIMUM V ripple BASED ON GRID CODES
To evaluate the optimum condition of voltage harmonic magnitude, order, and phase-angle, an optimization technique needs to be implemented. The aim of the optimization is to find the minimum and maximum V ripple considering the permissible harmonic levels at the PCC allowed by different international standards. Based on (2), v rec consists of a DC component of A 0 and harmonic components at angular frequencies 6nω 0 with coefficients A n and B n as described in (4) and (5). Thus, the harmonic magnitudes can be calculated as given in (12).
The idea to optimize V ripple is to minimize or maximize all the V rec,n values. To illustrate, when all the individual harmonic magnitudes of v rec are minimized (maximized), it is expected that the observed V ripple is also minimized (maximized). The optimization target is to search for a set of grid-side voltage harmonic values (V h and θ h ) over the permissible limits to minimize (maximize) V rec,n , so that V ripple can be minimized (maximized). The objective function (F obj ) can then be defined as either F obj−min or F obj−max for minimum or maximum V ripple as given in (13).
where a constant weight W n is given to each square V rec,n for prioritization and more flexibility [28]. To find the optimal solution for the objective function, MATLAB optimization function ''fmincon'' is used. The limits of voltage harmonics magnitudes and phase-angles, and THD v are set as the constraints based on the grid codes limits. Two international standards IEEE-519 [26] and IEC 61000-3-12 (testing conditions) [18] have been considered in this section to define the harmonics limits as described in Table 2. This table also presents the optimization results for the harmonics magnitudes and phase-angles to minimize or maximize V ripple . The optimization results of the minimum and maximum V ripple for both standards using calculated harmonics magnitudes and phase-angles in Table 2 are presented in Fig. 9. Figs. 9 (a) and (b) show the v rec waveforms for maximum and minimum V ripple based on the permissible limits in IEEE-519 and IEC 61000-3-12 standards, respectively, and compare them to the case of no harmonics (case 1). Fig. 9 (c) shows the calculated V ripple values, whereas V ripple compared to case 1 is presented in Fig 9 (d). As it can be seen from the figures, the harmonics phase-angle highly impacts the rectified voltage. For IEEE cases, V ripple reaches a maximum of 156% higher than case 1, whereas its minimum is around 70% below case 1. On the other hand, as the permissible harmonic injection is lower in IEC case, V ripple shows less variation compared with case 1. Fig. 9 (d) shows that with IEC harmonics limits, a V ripple of around 40% lower in the minimum case, or 40% higher in the maximum case compared with case 1 can be obtained. To evaluate the impact of grid voltage harmonics on rectifier voltage and power converter currents in a real-world scenario and verify the analytical and simulation results discussed so far, several practical lab tests have been performed and compared to simulation results as presented in the next section.

IV. IMPACT OF PCC VOLTAGE HARMONICS ON THE CURRENT HARMONICS EMISSION
As it was elaborated in the previous section, voltage harmonics at the PCC can highly impact the rectified voltage. Thus, input current harmonics and THD i are also expected to be affected as they are related to the rectified voltage ripple. To investigate that, this section evaluates the behaviour of input current harmonics under the presence of PCC voltage harmonics with both simulation results and practical measurements. As the analytical equations were consistent with the simulation results in Section II, the practical measurements in this section are compared with the simulation results for further validation of the analytical results. Hence, a motor drive system with conventional three-phase diode rectifier similar to Fig. 1 (a) has been modelled using Matlab Simulink as shown in Fig. 10. AC voltage sources at different harmonic frequencies have been used to represent the grid distortion at the PCC in that frequency. Additionally, some practical tests were performed in the lab with the setup shown in Fig. 11. A grid simulator is used as the input source of ASD VOLUME 9, 2021 to resemble a distorted grid to evaluate the analysed cases. A motor drive with conventional front-end (bridge diode with DC choke) and inverter rear-end connected to an induction motor coupled with a dc motor is used as the drive setup. Although the rated power of the drive is 7.5 kW, the test is conducted at a load level of 4.5 kW (60%).

A. GRID CURRENT HARMONICS AT DIFFERENT CASES OF PCC VOLTAGE HARMONICS
The 10 cases presented in Table 1 have been first tested using the Simulink model shown in Fig. 10. To validate the simulation results, practical measurements have been then conducted in the lab using the implemented setup shown in Fig. 11. The THD i comparison of current between the practical measurements and the simulation results for all cases is presented in Fig. 12 which confirms that the THD i values of phase ''a'' for all the cases are quite similar in the practical and simulation results. Fig. 12 (b) shows that in cases 2, 7, and 9, the THD i is reduced significantly by around 45%-50% compared to case 1. On the contrary, the THD i is increased in cases 3, 6, and 10 by 22%-30% compared  to case 1 as can be seen in this figure. These results show that even a small percentage of voltage harmonics at the PCC can profoundly impact the input current harmonics of conventional drives. However, for higher order harmonics (13 th or higher), the effect on the current harmonics is not as significant as lower orders (such as 5 th and 7 th ) as shown in Fig. 12 (b) for case 8, where the THD i is 73% and slightly higher than case 1.
The captured scope waveforms of grid-side currents and v rec in cases 1-3 are presented in Fig. 13 and Fig. 14 for simulation and practical results respectively. These figures validate the consistency of the simulation results with the practical measurements. Moreover, these figures confirm that the phase-angle of the applied voltage harmonic can highly affect the input current shape and THD i . To illustrate,   Fig. 14 (b) show v rec and the input three-phase currents of case 2 in both simulation and practical results respectively, where V h5 = 4(%) 0 • is added to the fundamental voltage. In this case, V ripple is around 35 V, which is relatively low. Therefore, it can be seen that the input currents also operate at a low ripple, which reduces the THD i to 40% compared to 71% in case 1. On the other hand, when the voltage is distorted by adding V h5 = 4(%) 180 • to the fundamental component as per case 3, V ripple is increased to around 120 V as can be seen in Fig. 13 (c) and Fig. 14 (c) for simulation and practical results respectively. Thus, the input currents operate at Discontinues Conduction Mode (DCM) with a high ripple, and a THD i of 88%.

B. GRID-SIDE CURRENT HARMONICS IN OPTIMUM CASES OF V ripple BASED ON GRID STANDARDS LIMITS
This section examines the impact of voltage harmonics on current harmonics emission based on the grid codes limits. Hence, the results from Section III.C are applied to the power converter to evaluate the impact of these voltage harmonics on the grid-side current harmonics emission. For that aim, Fig. 15 (a) presents the THD i of i a for both IEEE and IEC standards, whereas Fig. 15 (b) presents the THDi change compared to case 1. The results have been obtained from both simulation modelling and practical lab measurements with setting the PCC voltage harmonics. It can be seen from this figure that simulation and practical results are quite consistent with small error. The figure also indicates that even under the grid code limits, the impact of voltage harmonics phase-angle on the current harmonics is significant. Based on the limits of the IEEE-519 standard, the THDi can reach a minimum of 50% decrease or a maximum of 40% increase compared to case 1 with the calculated harmonics using the proposed optimisation method. As for the results of IEC 61000-3-12  standard limits shown in Fig. 15 (b), the impact of the voltage harmonics phase-angle on the THDi is still significant, where it can be reduced by 30% or increased by 20% compared to case 1.
The captured scope waveforms of grid-side currents and v rec in IEEE cases are presented in Fig. 16 and Fig. 17 for simulation and practical results, respectively. It can be seen from these figures that, in the case of IEEE-min, the currents waveforms are almost square waves with around 33% THDi, which shows a significant improvement compared to case 1. On the contrast, the currents waveforms in IEEE-max case are operated at DCM with a high THDi around 105%. These figures confirm that, even under the same permissible levels of harmonics (IEEE Std), the phase-angle of the applied voltage harmonic can highly affect the input current shape and THD i .

V. MITIGATION OF CURRENT HARMONICS IN MULTI-DRIVES SYSTEMS
Considering the high impact of the distorted grid on the current harmonic emission of the motor drive with conventional three-phase diode rectifier, in this section a harmonic mitigation technique is proposed to mitigate the high harmonics generated by these type of motor drives. The concept of the proposed technique is based on using an Electronic Inductor (EI) in multi-drive systems to compensate current harmonics generated by the conventional drives, which has been presented in [25]. In contrast to the conventional three-phase diode rectifier, the EI is resilient against the fluctuations of grid harmonics; thus, it can preserve a fixed current harmonic emission, even under the distorted grid condition. Hence, in this section, a system of two units as shown in Fig. 18 (a) is considered to mitigate the harmonics generated by conventional unit (Unit 2). Fig. 18 (b) shows phase ''a'' currents of the grid and input of both units. It can be seen that the EI current is a combination of a square-wave and ripple component. This ripple component is reverse to the ripple component of Unit 2, so they cancel out each other. Thus, the grid side current can be obtained as a square-wave with a fixed THDi around 30%, which is the lowest THDi that can be observed from three-phase diode rectifier systems. The control concept of the proposed mitigation technique is shown in Fig. 18 (c). In this figure, the inductor current of Unit 2 is measured and then the ripple is subtracted from the current reference of the inductor current of EI unit, which leads the EI to mitigate the ripple of Unit 2. In order to achieve a proper tracking of i * L,EI −HMF and maintain a desired output voltage of the EI (V o ), a fast and reliable controller is required. Hence, a PI controller is used for the voltage control and a hysteresis controller is adopted as a current controller. The concept of the hysteresis controller is based on regulating the current between the hysteresis bands of the current reference. The hysteresis controller is relatively fast, which makes it suitable for harmonics mitigation function. To mitigate the high level of harmonics generated by conventional rectifier under the presence of voltage harmonics at the PCC, Case 3 and IEEE-max case from the previous section are considered here. These two cases have the highest THDi with 90% and 105% respectively. Fig. 19 presents the simulation results for both cases, where the mitigation function of U1 is activated at 0.3 sec. It can be seen from this figure that, after activating the mitigation function, U1 compensates the harmonics generated by U2, which changes the shape of grid side current (i g ) to a square-wave with 30% THDi. Although the THDi of U2 stays around 90% in case 3 as shown in Fig. 19 (a), the THDi of the grid side current is significantly reduced from 43% to 30%. Fig. 19 (b) shows similar results for IEEE-max case, where the grid side current THDi is reduced to 30% compared to 48% before activating the mitigation function. These results confirm the robustness and effectiveness of the EI to mitigate conventional rectifier harmonics.
To show the impact of the proposed harmonics mitigation technique on the primary function of the drive system, the system response to the activation of the mitigation function is analysed. Fig. 20 shows the output voltage (V o ), the inductor current, and phase ''a'' inverter side current of the EI unit (U1). As it can be seen from the figure, after the mitigation function activated at 0.3 sec, the inductor current start compensating the harmonics of U2. However, the output voltage and inverter side current have not been affected by the activation of the mitigation function. Thus, the proposed technique can mitigate the harmonics generated by U2 while maintaining the desired operation of the motor drive system.

VI. DISCUSSION
Different types of linear and nonlinear loads in distribution networks generate reactive power, network disturbances, and harmonics. High penetration of power electronics converters has the potential to degrade the power quality of  grids by introducing harmonics and strong resonances, which pose severe risks to the distribution networks and equipment connected to them. International standardisation committees such as IEC and IEEE have developed different power quality standards such as IEC 61000-3-2 and IEC 61000-3-12 to control harmonic emissions in the grids. However, these standards are defined to control harmonic emission at product level based on test conditions such as setting the grid voltage with or without any background harmonic for any product tests. Other standards such as IEEE 519 are based on demand current at the system level without considering the impact of grid voltage harmonics on power converters. Thus, this paper presents that the impact of the grid voltage harmonics on three-phase diode rectifiers could be significant. Moreover, the power quality of the grid can be predictable based on grid voltage harmonics -amplitude and phase-angle -as the power quality of grids changes due to load variations.

VII. CONCLUSION
In this paper, the impact of grid voltage distortion on power converter current harmonics emission has been investigated. For that aim, ASDs with conventional diode rectifier has been considered to represent the power electronic system. A mathematical formulation of the rectified voltage, inductor current, and input currents of a three-phase diode rectifier is derived under the presence of voltage harmonics at the PCC. Different cases of voltage harmonics are then considered in the analysis to investigate the behaviour of the rectified voltage and the input current harmonics. The results show that the presence of even a small level of voltage harmonics (4%) at the PCC can change the current THD i by up to 30%. Furthermore, it has been shown that the phase-angle of the voltage harmonics can have a significant impact on the input current harmonics. Depending on the voltage harmonic phase-angle, the same amount of voltage harmonics could improve or deteriorate the rectified voltage ripple and the input current THD i . Moreover, the voltage harmonic phase-angle could create a phase delay ( ) in the diodes conduction time. A positive impacts the displacement power factor negatively, whereas a negative improves that factor. Finally, a harmonic mitigation technique to compensate the high level of current harmonics using Electronic Inductor (EI) is presented. He is currently a Power Electronics Professor and a Discipline Leader of Power, Energy and Control Engineering, The University of Queensland. He has more than 20 years of experience in academia, industry, and international standardization committees, including eight years in two large research and development centers working on power electronics and power quality projects. He has published four books, more than 270 journal articles and conference papers, five patents and 40 technical reports. His main research interests include power electronics topology, control, and applications, power quality and regulations, and pulsed power applications.
Prof. Zare has received several awards, such as an Australian Future Fellowship, the John Madsen Medal, the Symposium Fellowship, and the Early Career Excellence Research Award. He is a Task Force Leader (International Project Manager) of Active Infeed Converters to develop the first international standard IEC 61000-3-16 within the IEC standardization SC77A. He is a Senior Editor of IEEE ACCESS journal, a Guest Editor and an Associate Editor of the IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, an Associate Editor of IET Journal, and an editorial board member of several international journals. VOLUME 9, 2021