The d and q Axes Technique for Suppression Zero-Sequence Circulating Current in Directly Parallel Three-Phase PWM Converters

The directly parallel pulse width modulated converter (DPC) method is used to construct large-scale converter systems to increase system performance and reduce costs. However, circulating currents arise when the converters supply unbalanced currents or have different converter parameters. Circulating currents cause distortions in the current, increase the current coming from each converter, and degrade the system performance. This paper proposes a circulating current control (CCC) methodology to eliminate circulating currents through the analysis and approximation of the circulating current of the fundamental harmonic current at 150 Hz. By using the phase shift technique, this new model of the circulating current in the 0-axis was extended to the $0d$ - and $0q$ -axes. The proposed CCC was then designed according to the new circulating current model and added to the conventional controller. The performance of the proposed CCC converter was verified via simulation and experimentally with three directly parallel 5.5 kVA converters. The proposed CCC enhanced controller and conventional controller were tested with various current values, and all resulting circulating currents were recorded. The experimental results showed that the proposed CCC eliminated nearly all the circulating currents and that it had a fast, dynamic response to step-change currents. Using ramp current sharing, the experimental results were confirmed. Additionally, the efficiency of the proposed CCC in the DPC was significantly higher than the conventional controller, and the system’s efficiency was the same as that of a single converter connection. Thus, using the proposed CCC in DPC systems is economical, highly efficient, modular, and flexible.


I. NOMENCLATURE
d dx , d qx , modulation signal of the d-, q-axes d kx duty ratio for phase k of the x th converter d 0x zero-sequence modulation signal of the 0-axis of converter x d comαx , d comβx zero-sequence modulation compensation signal of the 0α-, 0β-axes d 0comd , d 0comq zero-sequence modulation compensation signal of the 0d-, 0q-axes d 0SVMx zero-axis modulation of the SVM HEPWM harmonic elimination pulse width modulation i a , i b , i c grid current i acx , i bcx , i ccx current of converter x: x = 1, 2, . . . n i dt , i qt grid current in the synchronous reference frame VOLUME 9, 2021 This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/ i dx , i qx current of converter x of the q-, d-axes: x = 1, 2, . . . n i 0x zero-sequence current of converter x: x = 1, 2, . . . n i 0x approximate circulating current i 0αx , i 0βx zero-sequence current of the converter of the 0α-, 0β-axes i 0d , i 0q current of converter x of the 0d-, 0q-axes L x inductance x: x = 1, 2, . . . n SVPWM space vector pulse width modulation v a , v b , v c grid voltage v acx , v bcx , v ccx voltage of converter x: x = 1, 2, . . . n v d , v q grid voltage in the synchronous reference frame v dc DC bus voltage v 0 ,v 0 zero-sequence voltage (instantaneous and peak) x abc variable in the stationary reference frame x dq0 variable in the synchronous reference frame of x abc ω fundamental frequency of the grid ω 3 = 3ω fundamental frequency at 150 Hz

II. INTRODUCTION
Pulse width modulated (PWM) converters are popular converters used for low-voltage and high-power applications, such as bidirectional conversion, renewable energy, energy storage systems, three-phase power factor correction (PFC), and distributed generators (DGs) [1]. These converters can be set up in parallel to increase the power rating, reliability, and efficiency and decrease the current and voltage ripples. Parallel converters work well in modular system designs, providing flexibility and ease in system maintenance [2], [3]. The structure of a DPC system is shown in Fig. 1. The grid sides of each converter have a common connection at nodes a, b, c, and the DC busses have a common connection at nodes P and N . The currents for each converter, namely, i acx , i bcx , and i ccx , are divided into two main parts. The first part flows to the grid, and the second part flows to the other parallel converters, resulting in circulating current. However, when the converters are directly parallel, circulating currents are generated automatically. These currents can cause current distortion, increase the current of each converter, and degrade the overall performance. Circulating currents can be the result of different parameters for each converter, unbalanced current sharing, and other aspects, such as unequal dead time, measurement errors, and analog-to-digital conversion errors. There are many techniques for avoiding circulating currents, such as using isolated DC supplies [4] or isolation transformers [5], [6]. Interphase reactors connected between the converters can be used to increase the impedance and thus reduce the circulating current, but these reactors can reduce only medium-frequency and high-frequency circulating currents, not low-frequency, circulating currents [7], [8]. In addition, these methods are bulky and costly because hardware needs to be added. The methods used to eliminate circulating currents without additional hardware are applied directly to the parallel PWM converters and are listed as follows.

A. SYNCHRONIZED CONTROL
This approach basically treats the DPC as one converter through a synchronization control signal. For example, a parallel converter system with two converters can be controlled as a single six-phase converter [9] in which the switch timing of the DPC is synchronized through fiber-optics [10]. This method can reduce the circulating currents, but it requires balanced current sharing. Furthermore, the control system design is complicated. References [11], [12] present a method to reduce the high-frequency circulating currents of the DPC by shifting the carrier signal of the converter to the proper position to reduce the circulating current. However, this method does not control the circulating current at low frequency (frequency 150 Hz).

B. SPECIAL PWM TECHNIQUE
The special PWM technique can be used in place of traditional space vector pulse width modulation (SVPWM) to eliminate the circulating current. In [13], Chen proposed the harmonic elimination pulse width modulation (HEPWM) method, which effectively eliminates the circulating current but suffers from high switching losses. A multicarrier PWM technique was proposed by Hou [14]. This technique can effectively mitigate the circulating current by eliminating the use of zero vectors, but it has difficulties in generating a PWM signal and requires additional hardware.

C. CIRCULATING CURRENT CONTROL
Circulating currents are caused by unequal zero-sequence modulation signals of the converters. A PI controller is used to eliminate the circulating current [15]- [17] by making the zero-sequence modulation signals of the converters the same, but its bandwidth is limited, so it cannot respond promptly. Tsung [18] proposed the feed-forward method, which allows each converter to use a common zero-sequence modulation signal. On the other hand, Zhang [19], [20] proposed a feedforward zero-sequence modulation signal to expand the bandwidth of the 0-axis current loop. Reference [21] proposes a PI-quasi resonant controller to control circulating current and feed-forward controller to reduce the difference in duty cycles. However, the zero-sequence modulation signal of the first converter needs to be sent to generate the modulation signals of the other converters. Both methods can effectively eliminate the circulating current, but a high-resolution analog zero-sequence modulation signal must be sent, so these methods are difficult to implement. This paper proposes a CCC method for a DPC that eliminates the bandwidth limitations of a PI controller in the 0-axis current loop without a feed-forward zero-sequence modulation signal. This proposed transformation technique has the following advantages: 1) Circulating currents are eliminated without additional hardware. 2) Each converter in the DPC is controlled independently to facilitate the modular design and to increase the overall performance.
3) The total cost is reduced.
In this paper, in section II, an equivalent circuit model of the DPC is derived to analyze the behavior of a circulating current when an SVPWM modulation technique is used. The circulating current approximation and transformation, the proposed circulating current model in the 0-axis, and the proposed CCC methodology are described in section III. Section IV discusses the simulation results, and section V goes over the experimental system, system parameters, and case studies. The last section offers conclusions.

III. CIRCULATING CURRENT BEHAVIOR IN A DPC A. EQUIVALENT CIRCUIT MODEL FOR A DPC
For the sake of convenience, node N in Fig. 1 is used as a reference point, and the duty ratio of the top switch in phase k (k = a, b, c) of converter x(x = 1, 2, . . . n) is defined as d kx . Hence, the average mathematical model of a converter in the stationary reference frame can be obtained as shown in Eqs. (1) and (2). Eqs. (1) and (2) can be transformed into a synchronous reference frame by using Eqs. (3) and (4).
Then, the average mathematical model of PWM converters in the synchronous reference frame can be obtained as Eqs. (5) and (6).
Using the average mathematical model in Eqs. (5) and (6), one can write the equivalent circuit model for each PWM converter in the synchronous reference frame, as shown in Fig. 2. Each equivalent circuit model is composed of four circuits; on the left-hand side of Fig. 2, the circuit is composed of three independent current sources, namely, d 0x i 0x , d qx i qx , and d dx i dx , that connect in parallel with a DC bus v dc . The three circuits on the right-hand side at the top, middle, and lower parts of the circuit represent the equivalent circuits in the daxis, q-axis, and 0-axis respectively. The top two circuits are each composed of an inductor, an independent voltage source, and two dependent voltage sources. There are two voltage cross-couplings between the two circuits, namely, ωL x i qx , and ωL x i dx . For the top circuit, the signal d dx is used to control the active power via i dx , and for the middle circuit, the signal d qx is used to control the reactive power via i qx . The bottom circuit is an open circuit, and it is composed of an inductor and a dependent voltage source. The zero-sequence modulation signal d 0x is used to control the dependent voltage source d 0x v dc . This circuit is open, so the zero-sequence current i 0x in this circuit is zero and does not affect the grid or converter.
The equivalent circuit model of the n DPCs is constructed from the model shown in Fig. 2 and can be seen in Fig. 3. From Fig. 3, the AC side has three parallel circuits in the d-axis, q-axis, and 0-axis at the top, middle, and bottom, respectively. The current i dx in the d-axis circuit of each converter is controlled to flow to the grid v d to supply the active power. The current i q in the q-axis circuit of each converter is controlled to flow to the grid or to zero to supply the reactive power. Because the currents i d and i q of each converter are controlled to flow only from the converter to the grid, no circulating currents flow between the converters in the d-and qaxes circuit. In the 0-axis circuit, the zero-sequence current i 0 is not controlled by the conventional controller and is parallel to the grid. If the voltages d 0x v dc of the converter are unequal, the currents flow between the converters. These currents are defined as circulating currents. In practice, the circulating current i 0x can be measured by combining the wires with the currents i acx , i bcx , and i ccx flowing together with a clamp ammeter, clamping the three wires, then reading the currents value, and dividing the value by three, as in Eq. (7) below.

B. ANALYSIS OF CIRCULATING CURRENT BEHAVIORS
From the 0-axis circuit on the lower right-hand side of Fig. 3, the circulating current i 0x does not occur when the zero voltages d 0x v dc or zero-sequence modulation signals d 0x of the converters are equal, as shown in Eqs. (8) and (9).
Circulating currents appear when the zero-sequence modulation signals d 0x are unequal, which could be the result of differences in the converter's parameters or unbalanced current sharing. If the zero-sequence modulation signals d 0x of the converters are the same, circulating currents do not appear. Fig. 4(a) shows the block diagram of the SVPWM signal generator of the conventional PWM converter. The modulation signals in the d-and q-axes (d dx and d qx ) are sent from the current controller and then transformed to d αx and d βx , respectively, via the dq/αβ block. The SVM block receives the d αx and d βx signals and converts them to sinusoidal signals located on the a-, b-, and c-axes with modulation indexes of 1. Then, the d 0x signal, according to Eq. (10), compensates to reduce the modulation index. For the output signals d ax , d bx , and d cx , the compensated signals, d ax , d bx , and d cx , respectively, are sent to the PWM block to generate the gate drive signals. Fig. 4(b) shows that the modulation signals of the a-, b-, and c-phases are d ax , d bx , and d cx , respectively, at a frequency of 50 Hz. The zero-sequence modulation signal d 0x has a triangular shape with a frequency of 150 Hz.
The zero voltage d 0x v dc has the same shape as d 0x but a different amplitude. By using the Fourier series transformation, the zero voltage, d 0x v dc can be written as Eq. (11).
where A x is the amplitude of the zero-sequence modulation signal. The zero voltage, d 0x v dc generates circulating currents when the amplitudes and phases of these voltage sources are unequal. From Fig. 5, the circulating current i 0x that flows through converter x can be written as Eq. (12). where i 0xn is the 0-axis current of x th converter caused by the voltage source d 0n v dc of the n th converter. The current i 011 is the 0-axis current caused by the converter and can be calculated by dividing Eq. (11) by its impedance at each harmonic frequency, as shown in Eq. (13), as shown at the bottom of the page.
where K = 8 jω 3 π 2 L T v dc From Eq. (12), the current i 01x (x = 1) is the current in 0axis flowing through converter 1 from other converters and can be calculated according to Eq. (16).
The circulating current of converter x, namely, i 0x , can be found with Eq. (18). where The circulating current of converter x can be found with Eq. (19). The circulating current i 0x is composed of odd harmonic currents with a fundamental frequency of 150 Hz. where

IV. THE PROPOSED CCC METHODOLOGY FOR THE DPC
The CCC for the DPC is achieved by adding the proposed CCC to the conventional controller, as shown in Fig. 6. When the current reference i * 0x of the proposed CCC is set to zero, the proposed CCC generates the zero-sequence modulation compensation signal d 0comx to be combined with the conventional modulation signals of phases a, b, and c in d ax , d bx , and d cx , respectively, to create the new modulation signals in d acx , d bcx , and d ccx , respectively. As a result, the zero-sequence modulation signal is modified by the proposed CCC according to Eqs. (20) and (21). To compensate for the zero-sequence modulation signals of the other converters, the magnitudes are equal and in phase. As a result, the circulating current of the DPC is zero.
The zero-sequence modulation compensation signal d 0comx needs to compensate the waveform at a frequency of 150 Hz. The PI controller is not able to respond to this frequency due to the limitations of the bandwidth. Therefore, this paper proposes new transformation techniques that are able to use the PI controller to control the circulating current i 0x . These techniques are presented in the next subsection.

A. CIRCULATING CURRENT APPROXIMATION AND TRANSFORMATION
This paper focuses on a three-phase balance system. When the symmetrical component method is applied to the converter currents, the components are divided into positive and zero-sequence components. In general, the transformation matrix is used to transform the stationary reference frame to the synchronous reference frame at the grid frequency while transforming only the positive sequence components into the d-and q-axes to control the active power and reactive power, respectively. However, the zero-sequence component is not transformed and controlled. To completely control the circulating current, the 0-axis current, which is the circulating current, must be transformed in the 0d-and 0q-axes, but there are two problems with this transformation, which are that 1) the circulating current Eq. (18) is nonsinusoidal and that 2) the circulating current i 0x has only one signal.
From Eq. (19), it is clear that the circulating currents consist of the sum of many odd harmonic currents. To completely control the circulating current, the many harmonic currents must be controlled. Hence, many bandpass filters (BPFs) must be designed to separate the signals of these harmonic currents. Then, the various odd harmonic currents must be transformed to the 0d-and 0q-axes. Subsequently, a controller must be designed to completely control the current at each harmonic order. Due to the many BPFs and controllers that must be designed, it is difficult to carry this operation out in practice. To reduce the complexity of the CCC system, this paper estimates the circulating current in a simple form. From Eq. (18), the coefficient for the fundamental harmonic current is very high relative to the others. By using the coefficient of the fundamental harmonic current as of the base value, the coefficients of the 1 st , 3 rd , 5 th , and 7 th harmonic currents can be computed in PU, as shown in Table 1. The magnitude of the fundamental harmonic current is very high compared with those of the other harmonic currents. Therefore, the circulating current i 0x can be estimated by using the fundamental harmonic current component, as shown in Eq. (22). The approximate circulating currentî 0x in Eq. (22) is represented by a sinusoidal function that has a frequency of 150 Hz.   The final problem facing the transform is that there is only one circulating current signal, which can be found with Eq. (22). The transformation block diagram from x(t) to the x d -and x q -axes is created by using the input signal x(t) as x α and shifting the phase of the input signal x(t) to 90 • to obtain the second signal x β and is shown in Fig. 7. Then, x α and x β are transformed to x 0d and x 0q , respectively, by using Eq. (23). [22] x d

B. PROPOSED CIRCULATING CURRENT MODEL
Using the 0-axis model on the lower right-hand side of Fig. 2 and Eq. (22), the 0-axis model can be rewritten as shown in Fig. 8. The approximate circulating current signal has a sinusoidal form with a frequency of 150 Hz. The signal is constantly changing, making the design of the controller difficult. Therefore, to simplify the design of the circulating current controller, the transform technique shown in Fig. 7 is used to create a new model on the 0d-and 0q-axes and then to design the circulating current controller. Using Fig. 8, the voltage equation v 0 can be written as follows: Using the phase shift technique to shift the signal in Eq. (24) 90 • moves the signals on the αand βaxes as shown in Eq. (25).  x Using Eq. (26), Eq. (25) can rewritten as shown in Eq. (27).
Now, we premultiply Eq. (28) by T αβ/dq to arrive at: By substituting ω 3 t for the θ of T αβ/dq and T −1 αβ/dq in Eq. (29), we obtain Eq. (30): Eq. (30) can then be used to construct the new model of the circulating current in the 0d-and 0q-axes, as shown in Fig. 9.
Replacing the model in the 0-axis in Fig. 2 with the proposed circulating current circuit model in Fig. 9 results in Fig.  10. As seen in Fig. 10, this model consists of three main parts: 1) There is a DC bus circuit on the left-hand side that is connected to the load or source. 2) The positive sequence components of d-and q-axes circuits are in the middle and connected to the grid voltage. The d-and q-axes components are used to control the active power and reactive power via the currents i dx and i qx , respectively. 3) The zero-sequence components of the 0d-and 0q-axes circuits are on the right-hand side; both circuits are open circuits. These 0d-and 0q-axes circuits are used to design the proposed circulating current controller. Note that this model uses a frequency of 150 Hz in the transformation.

C. PROPOSED CCC DESIGN METHODOLOGY
The proposed CCC model of the PWM converter in Fig. 10 is used to design the circulating current controller shown below in Fig. 11. The controller in Fig. 11 has two parts: the first part is the conventional controller, which is shown at the top of the figure and is used to control the active power and reactive power, and the second part is the proposed circulating current controller, which is shown on the bottom of Fig. 11 and is designed from the proposed circulating current circuit model of the 0d-and 0q-axes shown on the right-hand side of Fig. 10. This controller is added to the conventional controller to eliminate the circulating current i 0x . This CCC system measures the current of each phase, namely, i acx , i bcx , and i ccx , to calculate the circulating current i 0x according to Eq. (7), then estimates the circulating current i 0x according Eq. (22). The BPF is used to separate the fundamental frequency of the circulating current. The current i 0x is sinusoidal and has a frequency of 150 Hz. Due to the currentî 0x , there is only one signal. Hence, the phase shift technique is used to construct the second current signal i 0βx and then to transform the currents i 0αx and i 0βx into i 0dx and i 0qx , respectively. The relationship between the two currents follows Eq. (30). Eq. (31) includes the cross-coupling between the 0d-and 0q-axes. The decoupling between the two axes is accomplished by designing a voltage-decoupling controller, which is shown in the shaded area in Fig. 11. The reference currents i * 0dx and i * 0qx are set to zero, and hence, the output signals from this controller are d com0dx and d com0qx , then, d com0dx and d com0qx are transformed into d comαx and d comβx . The signal d comαx is used to compensate the signals d ax , d bx , and d cx in the SVPWM block diagram, where the signal d comαx = d 0comx , and the control signal d 0comx is combined with the modulation signals d ax , d bx , and d cx as in Eq. (20) to completely control the circulating current.

V. SIMULATION RESULTS
To verify the performance of the proposed CCC, a case study is conducted by using two directly parallel converters, one with a conventional controller and the other with the proposed CCC, and comparing their responses to various currents. By varying the currents, we can observe and compare the converter currents, grid currents, circulating currents, the modulation signals of phase a, and the zero-sequence modulations.
By setting the 1 st converter's supply current to 8 A and the 2 nd converter's supply current to 2 A (see Fig. 12(a)), we can show the responses of the conventional converters.
The top of the figure shows phase a of the grid current (purple line), the 1 st converter current (brown line), and the 2 nd converter current (blue line). The bottom of the figure shows the circulating current (green line). Fig. 12(b) provides the same information for the proposed CCC. The currents of the two conventional converters are nonsinusoidal, but they are combined in the grid current, and the result is sinusoidal. Additionally, the two currents of the proposed circulating current-controlled converters are sinusoidal, and when they are combined in the grid current, the result still has sinusoidal characteristics. When considering the circulating current i 0 , it is clear that when directly parallel, the conventional converters have a circulating current. This circulating current has a triangular waveform, where the amplitude i 0 = 3 A, and the frequency 150 Hz, while the proposed CCC converters can nearly completely control the circulating current.
The top of Fig. 12(c) shows the zero-sequence modulation signals of the 1 st and 2 nd conventional converters, namely, d 01 (brown line) and d 02 (blue line), which are triangles with the same amplitude but with a phase shift. At the bottom of the figure, the modulation signals of phase a of the 1 st and 2 nd converters d a1 (brown line) and d a2 (blue line) are shown. A phase shift is also present here because the two converters supply unequal currents. The zero-sequence modulation signals d 01 and d 02 are unequal, resulting in the generation of 0-axis voltages from the two converters that are unequal and a circulating current. Fig. 12(d) is the same as Fig. 12(c) for the proposed CCC. The proposed CCC generates the compensation signal d comαx , combined with the modulation of phases a, b, and c, according to Eq. (20). The zero-sequence modulation of both converters results in the same amplitudes and corresponding phase angles. Thus, the two converters generate the same 0-axis voltage. Therefore, there is no circulating current. From the simulation results, it is clear that the control system using the proposed CCC converter can completely control the circulating current generated by the directly parallel when the converters supply unequal currents.

VI. EXPERIMENTAL RESULTS
To verify the performance of the proposed CCC system in terms of eliminating the circulating current, a DPC experimental system with three PWM converters is constructed, 52220 VOLUME 9, 2021  as shown in Fig. 13. The diagram consists of PWM converter 1, PWM converter 2, and PWM converter 3, which are directly parallel. Each converter consists of a DC bus capacitor, H-bridge insulated-gate bipolar transistors (IGBTs), filter inductors, voltage and current sensors with a signal conditioner, a microcontroller unit (MCU) board implemented with a TMS320F28379D, a gate drive, and a magnetic contactor. The test system and the test parameters of the electrical system and the PWM converter parameters are shown in Fig. 14 and Table 2, respectively. In practice, the measurement of circulating current i 0x is achieved by taking the sum of the phase currents i acx , i bcx , and i ccx using a current probe, meaning that the measured value is 3i 0x ; that is, the oscilloscope shows 3i 0x instead of i 0x .

A. BEHAVIOR AND PERFORMANCE OF THE PROPOSED CCC SYSTEM
To examine the control performance of the proposed CCC system, the test system is configured so that the converters are directly parallel, as shown in Fig. 13. Two of the converters are used in two experiments. The first experiment is done in the same manner as the simulation in section IV and is designed to assess the steady state behavior and control performance. The second experiment uses stepping and ramping of the converter current during directly parallel activities to examine the dynamic behavior of the proposed CCC system.

1) STEADY-STATE BEHAVIOR
The testing of the two converters is conducted under two sets of conditions. In the first case, there is balanced current sharing, with both converters supplying i ac1 = i ac2 = 8 A rms to the grid. In the second case, there is unbalanced current sharing, and the converters supply, i ac1 = 8 A rms and i ac2 = 2 A rms to the grid. In both cases, the signals are measured. The test results are as follows. Fig. 15 shows the responses of the two PWM converters in case 1. Fig. 15(a) and (c) shows the responses of the conventional converters, and Fig. 15(b) and (d) shows the responses of the proposed circulating current-controlled converters. In Fig. 15(a), the currents in phase a for the two converters, namely, i ac1 and i ac2 , and the phase a current of the grid i a are sinusoidal. The current i a is the sum of the currents i ac1 and i ac2 . The circulating current 3i 0 should not occur with balanced current sharing, but in the figure, 3i 0 = 0.726 A. Circulating currents occur in practice because d 01 and d 02 are slightly different because the parameters of the two converters are slightly different. Fig. 15(b) records the responses to the test conditions in Fig. 15(a) using the proposed circulating current-controlled converters. The currents i ac1 , i ac2 , and i a are nearly the same as those in Fig. 15(a), but the circulating current decreases from 0.726 A to 0.646 A. Fig. 15(c) and (d) shows the zero-sequence modulation signals d 01 and d 02 and the modulation signals for phase a, namely, d a1 and d a2 of the conventional converters and the proposed circulating current-controlled converters, respectively. In Fig. 15(c) and (d), the zero-sequence modulation signals d 01 and d 02 are slightly different, as are the modulation signals for phase a, namely, d a1 and d a2 . As a result, the 0-axis voltages generated by the converters are almost the same. Hence, a small circulating current flows between the converters. Fig. 16 shows the responses of the two directly parallel converters when the currents are unbalanced; that is, i ac1 = 8 VOLUME 9, 2021 A, and i ac2 = 2 A. Fig. 16 shows the responses of the two directly parallel converters when the currents are unbalanced; that is, i ac1 = 8 A, and i ac2 = 2 A. Fig. 16(a) and (c) shows the response of the DPC using conventional control, and Fig. 16(b) and (d) shows the response of the proposed circulating current-controlled DPC. In Fig. 16(a), when the two currents are unbalanced, the circulating current is 3i 0 = 5.27 A because the zero-sequence modulation signals d 01 and d 02 have unequal amplitudes and phases, as shown in Fig. 16(c). As a result, the phase a currents of the two converters i ac1 and i ac2 are distorted by the sinusoidal waveform (which causes the inductors L 1 and L 2 to vibrate abnormally) and have values of 8.53 A and 2.59 A, respectively. The sum of the currents of the two converters combined into the grid current i a is still sinusoidal because the circulating current cannot flow to the grid because the grid is a three-phase, three-wire system. In Fig. 16(b), the converter currents i ac1 and i ac2 are sinusoidal, and when these currents are combined into the grid current i a , the resulting current is still sinusoidal. The circulating current 3i 0 decreases from 5.27 A in Fig. 16(a) to 0.87 A due to the proposed CCC generated compensation signal, which, combined with the modulation signal for phase a of the 2 nd converter d a2 , causes the modulation signal d a2 to be distorted from the modulation signal d a1 , as shown in Fig. 16(d). As a result, the signals d 01 and d 02 overlap, but at the peak of either signal they are unequal because the proposed CCC is designed to control the system at a frequency of 150 Hz. Consequently, the voltages of the converters generated in the 0-axis are almost the same. Therefore, the circulating current decreases to almost zero, and the inductors L 1 and L 2 vibrate normally compared to their performance in the conventional converters. Fig. 17 shows the stepped current responses of the two directly parallel converters, which are created by  disconnecting the 1 st converter and connecting it at time t 1 at a stepped current of i ac1 = 2 A and allowing the 2 nd converter to supply a constant current i ac2 = 8 A. Fig. 17(a) shows the currents i ac1 , i ac2 , i a and 3i 0 of the conventional converter. Before t 1 , i a and i ac2 are sinusoidal, and the circulating current 3i 0 is zero. At time t 1 , the current i ac1 = 2 A is stepped, and i a is still sinusoidal; however, i ac1 and i ac2 are distorted by the sinusoidal influence, and the circulating current 3i 0 is 5.27 A with an overshoot of 12 A. Fig. 17(b) shows the same response as that in Fig. 17(a) but for the proposed circulating current-controlled converters. Before t 1 , i a and i ac2 are sinusoidal, and the circulating current 3i 0 is zero. At time t 1 , a current of i ac1 = 2 A is stepped, i ac1 , i ac2 , and i a are still sinusoidal, and the proposed CCC system can keep the circulating current near zero. Fig. 18 shows the step current responses of the two directly parallel converters created by setting the 1 st converter up to supply a constant current i ac1 = 2 A. The 2 nd converter is disconnected and at time t 1 reconnected at a stepped current of i ac2 = 8 A. The response in this case is similar to the response in the first case, but the overshoot of the circulating current has a peak value of approximately 9 A and achieves a steady state within 60 ms at t 2 , as shown in Fig. 18(b). Fig. 19 shows the ramp current responses of the two directly parallel converters created by setting the 1 st converter's supply current i ac1 = 8 A and having the 2 nd converter supply current ramp up from 0 A to 8 A then down from 8 A to 0 A with slopes of ± 8 A/s. The proposed circulating current-controlled converters can almost completely control the circulating current 3i 0 throughout the operating range, as shown in Fig. 19(b). In the case of conventional control,  3i 0 increases when the currents i ac1 and i ac2 are less similar, as shown in Fig. 19(a).

B. OPTIMIZATION OF THE DPC USING THE PROPOSED CCC
To verify the control performance and the optimization of the DPC using the proposed CCC, the full experimental setup with three PWM converters (Fig. 13) is tested. Fig. 20 shows the responses of the DPC during unbalanced current sharing. Here, the 1 st converter's supply i ac1 = 8 A, the 2 nd converter's supply i ac2 = 6 A, and the 3 rd converter's supply i ac3 = 2 A. The current values at each converter are set before they are configured directly parallel. Fig. 20(a) shows the circulating currents of the conventional system. Here, 3i 01 , 3i 02 , and 3i 03 are 4.32 A, 2.80 A, and 6.06 A, respectively. From the figure, the circulating current that flows through the converter supplying the smallest current is the highest. This current is equal to the circulating currents from the other two converters combined but flows in the opposite direction. Fig. 20(b) has the same setup as Fig.  20(a), but the proposed CCC is used. Here, 3i 01 , 3i 02 , and 3i 03 are reduced to 1.29 A, 0.907 A, and 0.808 A, respectively. With three directly parallel converters, the proposed CCC can still nearly completely control the circulating current.
The efficiency of the proposed CCC system is determined by measuring the power while three directly parallel converters operate and supply currents of 8 A, 6 A and 2 A, respectively. The input power is measured at the DC bus, and the output power is measured at the grid. Comparative tests between the proposed CCC converters and the conventional converters are conducted. The measurement results and efficiency calculations are shown in Table 3. From the table, the total efficiency of the proposed CCC system is higher than  that of the conventional system by 1.12%. The total power loss of the proposed CCC system is 620 W (the 1 st , 2 nd and 3 rd converters have losses of 310, 220 and 90 W, respectively), and the total power loss of the conventional system is 730 W (the 1 st , 2 nd and 3 rd converters have losses of 340, 240 and 150 W, respectively). Table 4 shows the efficiency of a single PWM converter used in the experiment with currents supplied in different ranges. When the 1 st , 2 nd and 3 rd converter supply currents are 8, 6 and 2 A, respectively, the efficiencies are 93.14%, 93.47% and 92.10%, respectively, of those of the system ( Table 3 ). The converters have the same efficiencies. Thus, the proposed CCC system can nearly completely control the circulating currents of converters that are directly parallel and does not reduce the efficiencies of the converters, as is the case with the conventional controller. The DPC system works as if only one converter was connected.

VII. CONCLUSION
This paper presented a method for eliminating the circulating current in a DPC based on the compensation modulation signal technique used in the SVPWM. Using an analysis of the circulating current carried out on an equivalent circuit model in the 0-axis, it was discovered that the circulating current occurs because the zero-sequence modulation signals of the converters are unequal in both amplitude and phase. To design the proposed CCC system, the circulating current components of the circulating current were analyzed via a Fourier series. It was found that the circulating current can be estimated with the fundamental harmonic current of 150 Hz. Next, the 0-axis model of the converters was transformed to the 0d-and 0q-axes using the proposed transformation. Then, a controller was designed to control the circulating current by forcing the zero-sequence modulation signals of the converters to be identical. To examine the performance of the proposed CCC system, a DPC system was constructed using three 5.5 kVA PWM converters, and current sharing was tested under various conditions. The steady-state behavior of the conventional system showed that a circulating current occurs when there is an unbalanced current. As a result, the current of each converter is distorted due to the sinusoidal influence, causing the inductors to exhibit abnormal noise and vibrations. When the proposed CCC system was used, the zero-sequence modulation signals could be held at the same value, resulting in a circulating current of nearly zero. Any remaining circulating current when the proposed CCC was in use was controlled at the fundamental harmonic frequencies, so the circulating currents remained at the 3 rd , 5 th , . . . harmonic frequencies. As a result, the currents for each converter were nearly sinusoidal, and the inductors operated normally. The step responses of the proposed CCC system were quick to eliminate the circulating current caused by the step current; as a result, it was possible to instantly connect the proposed CCC converters to or disconnect them from the DPC system.
In addition, the ramp response test confirmed that the proposed CCC system can nearly completely control the circulating current throughout the operating range. Moreover, the overall efficiency of the proposed CCC system was significantly higher than that of the conventional system. If there is suitable management of current sharing through keeping each converter operating in its highest efficient range, then the proposed CCC system will be at its most effective throughout the operating range. This approach utilizes only software, so it is inexpensive, and the optimized converters can be chosen to reduce cost and increase efficiency.