Online Fault Diagnosis Method for High-Performance Converters Using Inductor Voltage Polar Signatures

Recently, the high-performance converter with wide range and high gain has been widely used in these cases such as PV power generation. On the other hand, there are more highly variable stresses on switch and diode in high-performance converter than the traditional DC-DC converters due to the wide range and high gain. Therefore, it is necessary to diagnose switch and diode faults in high-performance converter. In this paper, the switch and diode fault are analyzed and compared with traditional DC-DC converters. Then, an online diagnosis technique based on the inductor voltage polarity of the DC-DC converter is proposed. This technique only uses the inductor voltage polarity and the switch gate drive signal as signatures to diagnose short-circuit or open-circuit fault of the switch and diode. The technique is cost-effective and simple because it uses simple auxiliary windings to sense the inductor voltage polar and uses some logic circuit to generate indicators. The details of the technique are discussed through an example of the quadratic Boost converter. Experiments illustrate the correctness of the proposed technique and show its capability for switch and diode fault diagnosis.


I. INTRODUCTION
In recent years, new energy resources such as photovoltaic (PV) cells, wind power, and fuel cell, have been widely used to reduce air pollution from oil resources and others. In these cases, the high-performance converter, such as the quadratic Boost converter, gradually replaces the traditional Boost converter for the advantages of the wide input/output range, high gain, and low cost.
On the other hand, it is vital to assure the safety and reliability of the power generation system in the new energy resource applications. Faults occur in the DC-DC converter, which will cause the power generation system malfunction or reduce the efficiency, and in some cases will cause the second faults. According to statistical research, electrolytic capacitors and power semiconductor devices are the most vulnerable components in the DC-DC converters. More The associate editor coordinating the review of this manuscript and approving it for publication was Fengjiang Wu . than 30% of converter failures are due to semiconductor devices [1]. Therefore, switch and diode fault diagnosis is essential to achieve desirable reliability for DC-DC converter [2].
Fault detection and diagnosis techniques aiming to the different kinds of converters have attracted many researchers. The traditional non-isolated DC-DC converters faults, such as OCF (open-circuit fault) and SCF (short-circuit fault) of switch and diode, have been widely studied. For example, fast diagnosis methods for switch faults in traditional Buck circuits were investigated in Ref [3], [4]. Fault diagnoses of matrix converters were studied in Ref [5]- [7] and fault diagnoses of multi-level DC-DC converters were studied in Ref [8]- [13]. The fault diagnoses method of zero voltage switch (ZVS) DC-DC converters were studied in Ref [14]. In these diagnoses, it is critical to select and extract fault signatures in implementation of fault diagnosis. In the previous works, output voltage/current [15], inductor voltage/current [16], [17], diode voltage [18], magnetic near field waveform [19], and on-state resistance [20] have been used as signatures for switch and diode fault diagnosis in traditional non-isolated DC-DC converters. The inductor voltages captured by an auxiliary winding combined with logic circuits have been utilized to detect switch faults in traditional non-isolated dc-dc converters [18], [21]. This technique is simple and cost-effective.
In fact, there are more highly variable stresses on switch and diode in high-performance converter than the traditional DC-DC converters due to the wide range and high gain, which make switch and diode more fault-prone. But fewer signatures mentioned can be directly applied to diagnose switch faults in the high-performance converters, such as the quadratic single-switch DC-DC converters. In some cases, output voltage/current used as signatures for fault detection is cost-effective. However, these signatures are not suitable for quadratic non-isolated DC-DC converter in the PV power system. For example, Figure 1 illustrates the output/input voltage/current of the Boost converter in the PV power generation grid-connected system, which has been measured for system operation. However, input voltage/current is subject to the PV cells for tracking maximum power points (MPPTs) and output voltage/current is subject to the DC-AC converter for power balancing [22], which results in considerable error detection rate. Secondly, a large LC filter leads to detection delay [2], [23], [24].
Aim to the fault diagnosis of the switch and diode in high performance converters, such as quadratic converters, this paper proposes a new diagnosis method, in which the voltage of the magnetic component that is easier to extract and the switch gate drive signal are selected as the fault detection signals. According to the voltage of the magnetic component before and after the failure of the switch tube and diode, fault diagnosis circuit is designed based on the characteristics of the change. This technology has the advantages of low cost, easy operation, wide fault coverage, good online performance, and fast speed. The proposed method is suitable for quadratic single-switch DC-DC converters, including but not limited to quadratic Boost converters, quadratic Buck converters, and quadratic Buck-Boost converters, and has good scalability.
The rest of this article is organized as follows. In Section 2, the existing faults diagnosis technology for the switch and diode of the Buck converter is described in brief. The basic configuration and operation process of the high-performance converter are given in Section 3. In Section 4, the fault conditions of switch tubes and diodes of high-performance converters are analyzed, and fault diagnosis techniques that can judge the fault types are proposed. In Section 5, a simple logic fault diagnosis circuit is designed to perform fault diagnosis on high-performance converters. Section 6 includes some experimental results, and the final section gives conclusions.

II. PREVIOUS POWER DEVICE FAULT DIAGNOSIS METHODS
Reliable operation of DC-DC converters is vital for many applications. An appropriate converter monitoring scheme is required for fault detection and the adoption of effective remedial strategies. Ref [18] presents a simple diagnosis technique for open-circuits and short-circuits faults of the switch and diode in single inductance traditional Non-isolated DC-DC converter, such as Buck converter shown in Figure 2. The technique only employs diode voltage as the detection signature. In this paper, not only the diode voltage is used as signature, but also the gate driver signal is used to be processed in a simple logic circuit to generate some indicators for switch and diode fault diagnosis. Now contents of the technique using these signatures are discussed in detail.
The fault diagnosis technique in Ref [18] aims to detect four types of fault in Buck converters including switch OCF, switch SCF, diode OCF, and diode SCF. Figure 2(a) illustrates a Buck converter in which different parameters of the converter are denoted for analysis. In Figure 2(a) parameters P, U in , U D , U L , and U out represent gate signal as well as voltages of input supply, diode, inductor, and output, respectively. The converter switch, diode, inductor, capacitor, and load are denoted by S, D, L, C, and R, respectively. Currents of input supply, diode, and inductor are denoted by i in , i D , and i L , respectively. Waveforms of the gate drive signal P and diode voltage for the converter normal operation are depicted in Figure 2(b). In this figure, K , T , U D0 , U Son , and r D denote the duty cycle of the gate signal, period of the gate signal, diode built-in potential, on state voltage drop of the switch, and diode internal resistance, respectively. Using Kirchhoff's voltage law (KVL) in Figure 2(a), the diode voltage could be expressed as Due to U D0 and r D i D are positive so when P = 0, U D > 0. Due to U Son U in so when P = 1, U D < 0. It should be noted that for the sake of simplicity, diode conduction current and on-state voltage drop of the switch are assumed to be constant in Figure 2 Through the analysis of open circuit and short circuit faults of the switch tube and diode of the Boost converter, the following Equ (1) can be obtained to judge the fault condition of the Buck converter, where U th1 and U th2 can be seen in Ref [15], [18]: Figure 3 Show the Buck converter logic circuit for diagnosis, four signals denoted by FS 1 , FS 2 , FS 3 , and FS 4 are generated as indicators of switch OCF, switch SCF, diode OCF, and diode SCF, respectively. In fact, Equ (1) is realized through the logic circuit. Initial setting for inputs of all Reset-Set (SR) flip-flops is S = 1, R = 0. As a result, Q outputs of all flip-flops are initially at a high level. In the next step, S inputs of the flip-flops are set to zero as observed in Figure 3. The research results of previous papers show that the fault diagnosis circuit can accurately and quickly diagnose the switching tube and diode faults of the Buck converter.
However, the diode voltage as the detection signature needs to add one independently auxiliary transformer and is not suitable for high-performance converters, such as the quadratic Boost converter, shown in Figure 4.

III. BASIC CONFIGURATION AND OPERATIONAL PROCESS OF HIGH-PERFORMANCE CONVERTER
In this paper, the quadratic Boost converter is discussed as an example for fault diagnosis. Figure 4 shows the quadratic Boost converter and the waveforms of inductor voltages and gate driving signals. The structure is composed of pre-stage circuit, including inductor L 1 , diode D 1 and D 2 , capacitor C 1 and switch S, and post-stage circuit including inductor L 2 , capacitor C 2 , diode D 3 and switch S. In order to avoid the occurrence of secondary fault, the switch S is in series with fuse F U .
In Figure 4, parameters P, U in , U L , and U out represent gate driving signal as well as voltages of input supply, inductor, and output, respectively. Currents of input supply, output, and inductor are denoted by i in , i out , and i L , respectively.
The faults considered in this paper are switch and diode faults, including switch SCF, switch OCF, diode D 1 SCF, diode D 1 OCF, diode D 2 SCF, diode D 2 OCF, diode D 3 SCF, and diode D 3 OCF.
Traditionally, the electrical quantities used to diagnose the fault of the DC-DC converter include the voltage across the switch, the diode voltage, the inductor voltage and current, and the output voltage. If the output voltage is selected as the fault diagnosis feature, the output voltage is easily affected by the load. Due to the existence of output filtering, the output control variable changes slowly and the diagnosis time is long. For the quadratic Boost converter, the number of diodes is large. If the diode voltage is selected, it is difficult to effectively determine the diode fault through analysis. Moreover, after the diode D 2 of the quadratic Boost converter has an open-circuit fault, the circuit is equivalent to a traditional Boost converter. Therefore, it is difficult to distinguish whether the circuit is faulty using the traditional output voltage or output current as the characteristic electrical quantity for fault diagnosis. If both the inductor voltages U L 1 , U L 2 are selected as fault diagnosis characteristics at the same time, the electrical quantity can correctly reflect the fault while improving the fault diagnosis efficiency and reducing the cost. The inductor voltage can be obtained by adding auxiliary windings to the corresponding magnetic core. The auxiliary windings and signs of the post-processing circuits are shown in Fig 4(a).
In summary, U L 1 and U L 2 are selected as the electrical quantities for the fault diagnosis of the quadratic Boost converter. The follow-up diagnosis method only needs to use the polarity of U L 1 and U L 2 in combination with the drive signal P to make a logical combination to judge the open circuit and short circuit fault of the switch tube or diode. The auxiliary winding processing circuit and the circuit for obtaining the polarity of the inductor voltage is shown in Fig 5. Sign of U L 1 and its polarity indication signal L S1 is given. In fact, a sign of U L 2 , U L 2 − U L 1 of their directors L S2 , L S3 can be obtained similarly. The principle of fault diagnosis is described in the following.
According to the operation of the quadratic Boost converter, let the duty ratio K = T on /T , where T is the switching period, T on is switch turn-on time in one switching period, then the voltage of capacitor U C1 and output voltage U out is calculated using Equ (2) as follows: According to Equ (2), the following equations can be obviously deduced: And Using Kirchhoff's voltage law (KVL) in Fig 4(a), the voltage of the inductors L 1 and L 2 under normal cases are expressed as: and The signs of U L 1 , U L 2 and U L 2 − U L 1 are related to the driving signal P and fault states of switch and diodes. According to Figure 4, the inductor voltages, U L 1 , U L 2 are given in Table 1. It should be noted in Table 1 that the considered quadratic Boost converter operates in continuous-conduction mode [25].

IV. PROPOSED FAULT DIAGNOSIS TECHNIQUE OF HIGH-PERFORMANCE CONVERTER A. SWITCH SCF AND OCF 1) SWITCH SCF
In the case of switch SCF, when P = 1, the states of the converter are consistent with the normal states. Switch SCF is not diagnosable while P = 1. When P = 0, switch SCF occurs, which causes that currents of inductors L 1 and L 2 flow through the switch. According to KVL, in this case the inductor voltage values U L 1 = U in and U L 2 = U C1 are obtained, which are different from the values U L 1 = U in − U C 1 and U L 2 = U C 1 − U out in normal case, respectively. Therefore, Switch SCF is detected when P = 0. These results in the case of switch SCF are shown in Table 1.
As described in Equ (3)-(6), we easily know that U in > 0 and U C 1 > 0, and U in − U C 1 < 0 and U C 1 − U out < 0.
Therefore, fault diagnosis logic relation of the switch SCF is: If switch SCF occurs during P = 0, it would be detected immediately; if it occurs during P = 1, it would not be detected until the instant at which P changes to 0. Therefore, the maximum delay for switch SCF detection is KT, which is less than one switching cycle.

2) SWITCH OCF
In the case of switch OCF, when P = 0, the states of the converter are consistent with the normal states. Switch OCF is not diagnosable while P = 0. When P = 1, switch OCF occurs, which causes that currents of inductors L 1 and L 2 not flow through the switch. According to KVL, in this case the inductor voltage values U L 1 = U in − U C 1 and U L 2 = U C 1 − U out are obtained, which are different from the values U L 1 = U in and U L 2 = U C 1 in normal case, respectively. Therefore, Switch OCF is detected when P = 1. These results in case of switch OCF are shown in Table 1. As described previously, we know that U in − U C 1 < 0 and U C 1 − U out < 0. Therefore, fault diagnosis logic relation of the switch OCF is: (8) If switch OCF occurs during P = 1, it would be detected immediately; if it occurs during P = 0, it would not be detected until the instant at which P changes to 1. Therefore, the maximum delay for switch OCF detection is (1-K )T , which is less than one switching cycle.
In the case of D 1 SCF, when P = 0, the states of converter are consistent with the normal states. When P = 1, D 2 turns on, D 3 turns off. In this case, there exist two short branches, the L 2 -D 1 -D 2 branch and the C 1 -D 1 -D 2 -S branch. The energy stored in L 2 and C 1 are discharged through D 2 and S rapidly, which will easily lead to the secondary failure of S and D 2 . Therefore, the F U shown in Fig 4 blows out at the instant of D 1 SCF occurrence. After that instant, whether P = 0 or P = 1, switch S branch is always open, and the branch L 1 -D 1 -C 1 -U in resonates and U L 1 gradually attenuates in a period of time.
At the same instant, the current i L 2 flows through the branch L 2 -D 1 -D 2 . Considering r D 1 ,SCF and r D 2 as the D 1 resistance after D 1 SCF and the diode D 2 on-resistance, respectively, the inductance voltage U L 2 in the D 1 SCF case is expressed as follows: In fact, U L 2 is almost equal to the on-state voltage U D 2 ,on at the instant and then quickly attenuates to zero. Therefore, U L 2 and P = 1 are used for detecting D 1 SCF. These results in case of D 1 SCF are shown in Table 1.
As described in Equ (9) and to reduce noise interference, we choose two threshold voltages U th1 = U D 2 , on and U th2 = −U D 2 , on to obtain the signature of U L 2 with a comparator. Therefore, fault diagnosis logic relation of the D 1 SCF is: Whether D 1 SCF occurs during P = 0 or P = 1, the fault detection will be delayed after two switching cycles.

2) D1 OCF
In the case of D 1 OCF, when P = 1, D 2 turns on and D 3 turns off, the states of the converter are consistent with the normal states. When P = 0, the current of L 1 flows through D 2 and D 3 . According to KVL, in this case the inductor voltage values U L 1 = U in − U out and U L 2 = U C 1 − U out are obtained. The value U L 1 = U in − U out is different from the value U L 1 = U in − U C 1 in normal case. Therefore, D 1 OCF is detected when P = 0. These results in the case of D 1 OCF are shown in Table 1.
As described in Equ (6), U L 1 and U L 2 are both less than 0 when P = 0, and the polarity of the inductor voltage is consistent with the normal state. So, the polarity of inductor voltages cannot be used as D 1 OCF signature. Under normal case and P = 0, according to Equ (2)-(6) we obtain U L 1 −U L 2 as follows: And when P = 0 and in case of D 1 OCF, U L 1 − U L 2 is as follows: Therefore, the polarity of U L 1 − U L 2 is used as D 1 OCF signature and the diagnosis logic relation of the D 1 OCF is as follows: (13) If D 1 OCF occurs during P = 0, it would be detected immediately; if it occurs during P = 1, it would not be detected until the instant at which P changes to 0. Therefore, maximum delay for D 1 OCF detection is KT, which is less than one switching cycle.

C. D 2 SCF AND OCF 1) D 2 SCF
In the case of D 2 SCF, when P = 1, the states of the converter are consistent with normal states. D 2 SCF is not diagnosable when P = 1. When P = 0 and D 2 SCF occurs, D 1 turns on, D 3 turns off. Since D 1 and D 2 simultaneously turn on, the inductor L 2 is short-circuited. Considering r D 2 ,SCF and r D 1 as the D 2 resistance after D 1 SCF and the diode D 1 on-resistance, respectively, and according to KVL, the inductor voltage values are 2.The value U L 2 ≈ U D 1 ,on > 0 is different from the value U L 2 = U C 1 − U out in normal case. Therefore, D 2 SCF is detected when P = 0. These results in case of D 2 SCF are shown in Table 1.
Therefore, the fault diagnosis logic relation of the D 2 SCF is as follows: If D 2 SCF occurs during P = 0, it would be detected immediately; if it occurs during P = 1, it would not be detected until the instant at which P changes to 0. Therefore, the maximum delay for D 2 SCF detection is KT, which is less than one switching cycle.

2) D 2 OCF
In the case of D 2 OCF, when P = 0, the states of the converter are consistent with normal states. D 2 OCF is not diagnosable when P = 0. When P = 1, D 2 OCF occurs, D 1 turns on and D 3 turns off. According to KVL, in this case the inductor voltage values are obtained as U L 1 = U in − U C 1 and U L 2 = U C 1 . The value U L 1 = U in − U C 1 is different from the value U L 1 = U in in normal case. Therefore, D 2 OCF is detected when P = 0. These results in case of D 2 SCF are shown in Table 1.
Because U L 1 = U in − U C 1 < 0 and U L 2 > 0 when P = 1 in case of D 2 OCF. Therefore, fault diagnosis logic relation of the D 2 OCF is as follows: If D 2 OCF occurs during P = 1, it would be detected immediately; if it occurs during P = 0, it would not be detected until the instant at which P changes to 1. Therefore, the maximum delay for D 2 OCF detection is (1-K )T , which is less than one switching cycle.

D. D 3 SCF AND OCF 1) D 3 SCF
In the case of D 3 SCF, when P = 0, the states of the converter are consistent with normal states and D 3 SCF is not diagnosable. D 3 SCF occurs when P = 1, D 1 turns off, D 2 turns on. In this case, branch C 2 -D 3 -S is short. The energy stored in C 2 is discharged through D 3 and S rapidly, and the F U shown in Fig 4 blows out at the instant of D 3 SCF occurrence. After that instant, whether P = 0 or P = 1, S branch is always open and D 1 turns on and D 2 turns off. And branch L 2 -C 1 -C 2 resonates for a period of time and U L 2 gradually attenuates in a period of time to zero. At the same instant, i L 2 reduces to zero and U L 1 reduces to 0, quickly. These results in case of D 3 SCF are shown in Table 1.
In order to reduce noise interference, we choose two threshold voltages U th3 = U D 1 , on and U th4 = −U D 1 , on to obtain the signature of U L 1 with a window comparator. Therefore, fault diagnosis logic relation of the D 3 SCF is as follows: Whether D 3 SCF occurs during P = 0 or P = 1, fault detection will be delayed after some switching cycles.

2) D 3 OCF
In the case of D 3 OCF, when P = 1, the states of the converter are consistent with the normal states and D 3 OCF is not diagnosable. D 3 OCF occurs when P = 0, D 1 and D 2 turn on. In this case, there is no freewheeling branch for L 2 to discharge energy due to D 3 OCF, and switch S and diode D 2 experience a large electric shock. Considering the off-resistance of D 3 to be r D 3 ,off and according to KVL, the inductor voltage values U L 1 and U L 2 are obtained as: Therefore, D 3 OCF is detected when P = 0. These results in case of D 3 OCF are shown in Table 1. Since r D 3 ,off is large, the inductor voltage U L 2 has an extremely large negative voltage after D 3 OCF occurrence. Selecting a larger threshold voltage U th5 (U th5 = − V DC /2). it is easily known that U L 1 < 0 and U L 2 < U th5 . Therefore, fault diagnosis logic relation of the D 3 OCF is as follows: If D 3 OCF occurs during P = 0, it would be detected immediately; if it occurs during P = 1, it would not be detected until the instant at which P changes to 0. Therefore, VOLUME 8, 2020 maximum delay for D 3 OCF detection is KT, which is less than one switching cycle.
There are three common quadratic DC-DC converters, that is, quadratic Boost converter, quadratic Buck converter and quadratic Buck-Boost converter. The proposed diagnosis technique can be revised for quadratic Buck converter and quadratic Buck-Boost converter.

V. THE FAULT DIAGNOSIS METHOD A. SWITCH FAULT DIAGNOSIS CIRCUIT
According to Section 3.1 analysis, the polar signature of voltage U L 2 and PWM signal is used for the switch faults and the fault diagnosis logic circuit, shown in Fig 6. The diagnosis circuit mainly consists of comparators, logic gates and R-S latches. The polar signature of voltage U L 1 is extracted by using the voltage comparator N 1 as the logic signal L S , that is, U L 1 > 0, L S1 = 1; U L 1 < 0, L S1 = 0. Available from Equ (7) and (8), the logic circuit is described as follows: P = 0, L S1 = 1 ⇒ switch SCF P = 1, L S1 = 0 ⇒ switch OCF (19) It can be seen from Equ (19) that under fault states of switch S the signal P and the signal L S1 is an exclusive-or logic relation. Signals S sd and S sk in Fig 6 are used to indicate the short-circuit fault and the open circuit fault respectively, that is, the following logic expression is obtained: It should be pointed out that after the S OCF occurs, the parasitic capacitance of the inductor L 2 , the switch S and the diode D 2 forms a series-resonant circuit, which leads to the signals S sd and S sk output error diagnosis results, shown in Fig 6 with red waveform. In order to avoid misdiagnosis, the error preprocessing circuit is added in Fig 7, and the preprocess logic relation is as follows: Finally, signals S rd , S rk are latched in the R-S registers, and the fault indication signals S sd, S sk is output. , the logical signal P and the inductor voltages U L 1 , and U L 2 are used to diagnose diode faults. Six signals S 1 , S 2 , S 3 , S 4 , S 5 and S 6 are generated as indicators to represent D 1 SCF, D 1 OCF, D 2 SCF, D 2 OCF, D 3 SCF, and D 3 OCF, respectively. The conditions for P, U L 1 and U L 2 are checked, simultaneously, to generate the logical signatures. Same as section 5.1, the polarity of the inductor voltage, and can be extracted by using a voltage comparator, U L 2 > 0, L S2 = 1; U L 3 < 0, L S3 = 0.
The proposed algorithm, shown in Fig 8(a), is implemented with a diagnosis logical circuit, shown in Fig 8(b), in which the initial setting for inputs of all Reset-set (SR) flip-flops are S = 1, R = 0, and Q outputs of all flip-flops are initially at the high level. According to the algorithm flow chart, each of diode faults is identified with three signatures and the corresponding signal S i (i = 1 . . . 6) changes from high level to low level. Logic values for all indicators including for S faults are given in Table 2.
According to Table 2, signals S sd , S sk , S 1 , S 2 , S 3 , S 4 , S 5 and S 6 are all at a high level during normal operation of the quadratic DC-DC converter. If S SCF of the quadratic converter occurs, S sd changes from 1 to 0 while other indicators remain at a high level. Similarly, in case of D 1 SCF occurrence, S 1 becomes 0. It is obvious that when one of fault occurs there is only the corresponding indicator changing to 0 while others remaining high. Therefore, all switch or diode faults in quadratic DC-DC converter can be diagnosed by monitoring S sd , S sk , S 1 , S 2 , S 3 , S 4 , S 5 and S 6 .
It is worth noting that when diodes D 1 SCF or D 3 SCF occur, the fuse blows out. Depending on the instant that the  fault occurs, the algorithm can immediately detect or detect the fault by delay. However, the detection time will be more than one switching cycle, as described in Section 3. In Figure 8(b), a time delay unit is applied to the gate drive signal to avoid false diagnostics due to switch turn-on and turn-off delays. The delay unit has been digitally implemented and its value has been set according to the converter switch data.

VI. EXPERIMENTAL RESULTS
In order to verify the effectiveness and the performance of the proposed fault diagnosis method, several experiments have been carried out on quadratic DC-DC converters. The test bench is shown in Figure 9 and the specifications are presented in Table 3. The rated current value of IRF540 is 50A, and then the rated value of F U is set as 10A, which can assure to avoid the second failure of switch S after D 1 SCF or D 3 SCF occurrence.
In experiments, to implement the short or open fault of the converter semiconductor switches, auxiliary mechanical switches are introduced to emulate switch and diode faults. To emulate OCF, the auxiliary switch is connected in series with the device under test, while for SCF; the auxiliary switch is connected in parallel. In normal cases, the auxiliary switch in series is ON and is turned-off for OCF. Similarly, the auxiliary switch in parallel is OFF and is turned-on for SCF. The on-resistance of auxiliary mechanical switch is negligible.
The data and waveform acquisition are captured by a digital oscilloscope with attenuation probes. In this paper, experimental verifications of quadratic Boost converter, quadratic Buck converter and quadratic Buck-Boost converters are carried out. However, only some experimental results are given as follows due to page limitation. VOLUME 8, 2020 interval. It can be seen that all switch faults have been detected. Switch SCF is detected during P = 0 because logic signal S sd becomes low, and switch OCF is detected during P = 1 because logic signal S sk becomes low.
As the results analyzed in Section 4.1, switch SCF cannot be detected at state P = 1 and switch OCF cannot be detected at state P = 0. It is obvious that the maximum detection delay is related to the time point of fault occurrence. The maximum delay may be KT and (1-K )T , respectively, which is less than one switching cycle. Figure 11 shows switch fault experimental waveforms of quadratic Buck converter in which switch faults have occurred at an instant in [t 0 , t 1 ] interval. It can be seen that all switch faults have been detected. Switch SCF is detected during P = 0 because logic signal S sd becomes low, and switch OCF is detected during P = 1 because logic signal S sk becomes low. It is different from the quadratic Boost converter, the inductor voltage U L 1 is greater than the inductor voltage U L 2 , and U L 1 = 2U L 2 when K = 0.5.
Same as quadratic Boost converter, switch SCF cannot be detected at state P = 1 and switch OCF cannot be detected at state P = 0. It is obvious that the maximum detection delay is related to the time point of fault occurrence. The maximum delay may be KT and (1-K )T , respectively, which is less than one switching cycle. Figure 12 shows the switch fault waveform diagram of the quadratic Buck-Boost converter in which switch faults has occurred at an instant in [t 0 , t 1 ] interval. It can be seen that all switch faults have been detected. Switch SCF is detected during P = 0 because logic signal S sd becomes low, and switch OCF is detected during P = 1 because logic signal S sk becomes low. It is different from the quadratic Boost converter, when K < 0.5, the quadratic Buck-Boost converter operates as a quadratic Buck converter, when K > 0.5,  the quadratic Buck-Boost converter operates as a quadratic Boost converter. This paper chooses P = 0.6.
Same as quadratic Boost converter, switch SCF cannot be detected at state P = 1 and switch OCF cannot be detected at state P = 0. It is obvious that the maximum detection delay is related to the time point of fault occurrence. The maximum delay may be KT and (1-K )T , respectively, which is less than one switching cycle.

B. DIODES FAULT EXPERIMENTAL RESULTS
Due to page limitation, the diode experimental results only are given in the quadratic Boost converter. Figure 13 shows the D 1 fault waveforms of the quadratic Boost converter in which D 1 faults have occurred at an instant in [t 0 , t 1 ] interval. The D 1 SCF cannot be detected until t 2 because U L 2 becomes zero after two switching cycles and the logic signal S 1 becomes low in which the fuse is disconnected since the current of the switch exceeds 10A. After the D 1 SCF occurrence, fault detection is realized when P = 1. According to the converter diode in table 3, U th1 = 0.7 and U th2 = −0.7 are used in the paper and U th1 < U L 2 < U th2 is satisfied at t 2 . The D 1 OCF cannot be detected until t 1 because U L 1 < U L 2 at P = 0 and the logic signal S 2 becomes low.  As the results analyzed in Section 4.2, D 1 SCF cannot be detected at state P = 0(according to Equ (10)) and D 1 OCF cannot be detected at state P = 1(according to Equ (13)). It is obvious that the maximum detection delay is related to the time point of fault occurrence. The D 1 OCF's maximum delay may be KT, which is less than one switching cycle. But the D 1 SCF will be delayed after two switching cycles. Fig 14 shows the D 2 fault waveforms of a quadratic Boost converter in which D 2 faults have occurred at an instant in [t 0 , t 1 ] interval. The D 2 SCF cannot be detected until t 1 because U L 2 remains positive at P = 0 and the logic signal S 3 becomes low. The D 2 OCF cannot be detected until t 1 because U L 1 becomes negative and the logic signal S 4 becomes low only at P = 1.
As the results analyzed in Section 4.3, D 2 SCF cannot be detected at state P = 1 and D 2 OCF cannot be detected at state P = 0. It is obvious that the maximum detection delay is related to the time point of fault occurrence. The maximum delay may be KT and (1-K )T , respectively, which is less than one switching cycle.  because the U L 1 becomes zero after two switching cycles and the logic signal S 5 becomes low in which the fuse is disconnected since the current of the switch exceeds 10A and after D 3 SCF. And fault detection is realized when P = 1 For the converter diode in table 3, choose U th3 = 0.7 and U th4 = −0.7 We can see U th3 < U L 1 < U th4 at t 2 . The D 3 OCF cannot be detected until t 1 , because U L 2 > U th5 at P = 0 and the logic signal S 6 becomes low. According to Equ (17), the D 3 experiences a large voltage in this case, we choose U th5 = 5V.
As the results analyzed in Section 4.4, D 3 SCF cannot be detected at state P = 0 and D 3 OCF cannot be detected at state P = 1. It is obvious that the maximum detection delay is related to the time point of fault occurrence. The D 3 OCF's maximum delay may be KT, which is less than one switching cycle. But the D 3 SCF will be delayed after some switching cycles.

VII. CONCLUSION
This paper firstly studies the previous fault diagnosis technology of power devices aiming at traditional DC-DC converters. The selection of fault detection signals is diverse and cannot be universally applied to high-performance converters. This paper put forward a simple logic fault diagnosis method to detect switch and diode faults of high-performance converters. This method uses inductor voltage signal and PWM signal to identify all switches and diodes SCF and OCF in the quadratic DC-DC converter. This paper fully explains the theoretical basis and design of the diagnostic circuit. This diagnostic method has interesting advantages, including implementation in one switching cycle, with full coverage of faults, low cost, high efficiency, and strong real-time performance. The experimental results verified the accuracy and effectiveness of this method. The fault diagnosis method proposed in this paper has good scalability and establishes a foundation for fault diagnosis of non-isolated DC-DC converters.