Model Predictive Control Method With NP Voltage Balance by Offset Voltage Injection for Three-Phase Three-Level NPC Inverter

This paper proposes a predictive control method with offset voltage injection for achieving a neutral point (NP) voltage balance of three-phase three-level neutral point clamped (NPC) inverter, without employing a weighting factor. In order to ensure the proper and reliable operation of the NPC inverter, the NP voltage balance should be regulated in addition to the sinusoidal output current. The conventional predictive control methods for NPC has suffered from tedious weighting factor selection. Besides, when the converter’s parameters value and control condition changes, it is cumbersome to empirically redesign the weighting factor. Therefore, the proposed predictive control method without the weighting factor can successfully maintain the balance of NP voltage by utilizing an offset voltage, which is determined according to the difference between the upper and lower capacitor voltages. As a result, the proposed algorithm using the offset voltage injection can control the output currents and maintain the balance of NP voltage. Simulation and experiments are presented to prove the validity of the NP voltage balancing of the proposed control method.


I. INTRODUCTION
The recent increase in the application of high power systems and equipment in the industrial field reveals the limitations of two-level converters [1]- [3]. When using a two-level converter in a high-power system, switching losses occur, and the power efficiency decreases as the switching frequency increases, and due to the circuit's structural characteristics, the stress required to endure per switch increases, thus reducing the lifetime of the device [4], [5]. This requires more frequent maintenance and repair of the converter and limits the switching frequency. In order to overcome the limitations of the two-level converter, many multilevel converters have recently been studied [6]- [10]. In the multilevel converter, the voltage level of the converter is increased as compared to the two-level converter because the number of switches existing in each phase of the circuit increases [8]- [12]. This circuit structural feature allows multiple switches to distribute stress.
The associate editor coordinating the review of this manuscript and approving it for publication was Atif Iqbal .
Because of the increased levels, the input current has a lower total harmonic distortion (THD) than two-level converters, so multilevel converters have good current characteristics without increasing the filter size. Besides, the low current THD eliminates the need for higher switching frequencies, resulting in better power efficiency than two-level converters. Because of these advantages, it is advantageous to use multilevel converters rather than two-level converters in high power systems [10]- [14].
Recently, many researches have been done on the threelevel NPC converter among multilevel converters [15]- [26]. The three-level NPC converter has four switches and two clamping diodes per phase, and two additional DC capacitors to make the converter three voltage levels. However, the disadvantage of three-level NPC converters is that the currents, as well as the capacitor voltage, should be controlled. The capacitor voltage unbalance not only reduces control performance but also increases the stress on the switch, which can increase the probability of the converter failing. Therefore, various control methods for controlling the current and VOLUME 8, 2020 This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/ capacitor voltage of three-level NPC converters were studied [15]- [17]. Among them, many model predictive control (MPC) methods have been studied to control the three-level NPC converter easily and simply [20]- [23]. MPC method selects the switching state, which can minimize cost function to control the converter. There are terms for the current and capacitor voltage in the cost function, and the switching state is selected to minimize the error between the reference value and the predicted value. However, the conventional MPC method has a weighting factor that determines the control ratio of current and voltage in the cost function [27], and it is cumbersome to redesign when the parameter or control condition changes. To eliminate the weighting factor in the MPC method, several studies have been conducted [30]- [36]. In [35], the preselection algorithm is applied to reduce the computation time, and the capacitor voltage term is eliminated from the cost function to eliminate the weighting factor. The switching state of small vector is selected according to the capacitor voltage. In this control method, the capacitor voltage balance can be limited when the magnitude of the reference voltage vector is many large and small vectors are not selected. Besides, when there is a large phase difference between the reference voltage and the output current, the capacitor voltage balance can also be limited. In [36], a three-step algorithm is proposed to eliminate the weighting factor. There are three cost functions used in [36]. In the first cost function, K switching states with small errors are selected. In the second cost function, N switching states with small errors are selected from the K switching states. The optimal switching state is selected in the last cost function from the N switching states. Although this algorithm can eliminate the weighting factor by using three cost functions, the increase in computation time is inevitable due to the added cost function. Furthermore, in [37], the author proposes a predictive control method using injected offset voltage to achieve NP voltage balance in a three-phase three-level NPC rectifier, without employing the weighting factor in the cost function.
In this paper, a new MPC method to control the NP voltage balance of three-phase three-level NPC inverter by offset voltage injection is proposed. The proposed algorithm does not use the weighting factor in the cost function, unlike the conventional method. In the proposed method, the reference voltage is used to control output current to avoid weighting factors. However, when controlling only with the reference voltage, the current can be controlled, but the capacitor voltage cannot be controlled. Therefore, the offset voltage is injected into the reference voltage to further control the capacitor voltage. The difference between the two DC capacitor voltages can be successfully reduced by injecting the offset voltage into the reference voltage, which is used to control the input currents. The offset voltage is determined by the difference of the DC capacitor voltage. In addition, when the phase difference between the reference voltage and the output current occurs, the switching state candidates are excluded to maintain the capacitor voltage balance and selected according to the capacitor voltages. When the phase difference is larger than 60 • , the capacitor voltage balance is maintained by changing the switching state of the small vector. As a result, the proposed method enables control of the capacitor voltage balance as well as control of the output current. The validity of the proposed method is verified through simulations and experiments.
The rest of the paper is organized as follows. Section II describes the topology and mathematical model for a threephase three-level NPC inverter, and the associated conventional predictive control method. The previous approaches corresponding to avoid the weighting factor are discussed. Section IV introduces and discusses the proposed model predictive control method with NP voltage balance by offset voltage injection. The simulated and experimental results for the proposed approach are given in Section V, and the conclusion is provided in Section VI.

II. THREE_PHASE THREE_LEVEL NPC INVERTER SYSTEM AND CONVENTIONAL PREDICTIVE CONTROL METHOD A. THREE-PHASE THREE_LEVEL NPC INVERTER
As mentioned in the introduction, a three-level NPC inverter is a suitable topology for use in high power systems. The reason lies in the circuit structure of the three-level NPC inverter. 2-level converters that were widely used have two switches in each phase. Therefore, one switch has to bear the voltage stress of +V dc /2 or −V dc /2. In addition, when the switching state changes from positive to negative, the switch can be momentarily subjected to voltage stress of V dc , which can adversely affect the lifetime of the switch. However, each phase of the three-phase three-level NPC inverter consists of four switches and two diodes. Thus, unlike two-level converters, two switches can distribute the voltage stress of +V dc /2 or −V dc /2. Also, the three-level NPC inverter can have three voltage levels because the two center switches and two diodes allow the load to be connected to the NP of the dclink. The three-level inverter has better THD (Total Harmonic Distortion) than the two-level converter because it has three voltage levels. However, when the zero voltage is selected, current flows through the NP, which can cause variations in upper and lower capacitor voltages. Therefore, the threelevel inverter must control the balance of the upper and lower capacitor voltages as well as the current. Fig. 1 shows the topology of a three-phase three-level NPC inverter. As shown in Fig. 1, each phase of three-phase three-level NPC inverter consists of four switches (S x1 , S x2 , S x3 and S x4 ) and two diodes (D x1 and D x2 ). The midpoints of switches S x2 and S x3 of each phase are connected to the load and the midpoints of diodes D x1 and D x2 are connected to the NP. The upper and lower capacitor voltages located on the dc-link must be controlled to maintain balance. As shown in Table 1, the threelevel inverter can produce three voltage levels which are P, O, and N depending on the switching status and generate pole voltages of V dc /2, 0 and −V dc /2, respectively.   Since each phase of the inverter can have three switching states, there are 27 possible switching combinations for a three-phase inverter. Fig. 2 shows a space vector diagram of the three-phase three-level NPC inverter. As shown in Fig. 2

B. CONVENTIONAL MODEL PREDICTIVE CONTROL METHOD
The MPC (Model Predictive Control) method is a control method of controlling the converter by predicting future values using the converter model based on the fact that only a finite number of possible switching states can be made by the converter. All future values generated in each switching state are calculated and compared to the reference value to select the switching state with the lowest error. The MPC method selects the switching state in the future by calculating the switching state with the smallest error between the reference value and predicted value using the cost function. The cost function generally consists of the variables which need to be controlled. The conventional MPC method of three-phase three-level NPC inverter is as follows [27]. Considering the circuit of the three-phase three-level NPC inverter shown in Fig. 1, the model of the converter for each phase can be written as where v x , i x and e x are the pole voltage, the output current, and the back-electromotive force (back-emf), respectively. R o and L o are the output resistance and the output inductance, respectively. Using the constant sampling period T s and Euler's formula, equation (1) in the discrete-time domain can be expressed as The future output current can be predicted by transforming the model in (2) for the current as where v xO is the pole voltage determined by the switching state, as shown in Table 1. Therefore, all possible future currents can be calculated by substituting all switching states in (3). The model predictive control technique compares all switching state combinations to select the optimal switching state. The required large number of calculations might introduce a substantial time delay in the practical implementation of the MPC. This delay can deteriorate the operation of the system. For proper practical implementation of the MPC, delay compensation techniques should be applied. For the delay compensation, by shifting the model in (3) by one-step forward, the future current at the (k + 2) th instant is obtained as [28], [29] Since the back-emf changes at a much lower frequency compared to the sampling frequency, it can be assumed that the future back-emf to be the same as the present back-emf value as [28]. The present back-emf can be deduced from (4) as follow The switching function according to the switch modules on a, b, and c phase can be defined as follows. (6) where S xj (x = a, b, c; j = 1, 2, 3, 4) means the switching states of the four switches located on each phase. Using the switching state of the inverter and the output currents, the current flowing through the upper and lower capacitors can be expressed as (7) and (8).
where i c1 and i c2 represent the current flowing through the upper and lower capacitors, respectively. i a , i b and i c are the output currents for a, b, and c phase, respectively. According to the capacitor voltage formula, the upper and the lower capacitor voltages can be expressed as (9). where C is the capacitance of the upper and lower capacitors. The future capacitor voltage can be predicted from (9) as follows For the delay compensation, by shifting the equation in (10) by one-step forward, the future capacitor voltages at the (k + 2) th instant are obtained as [27], [28] v ci (k + 2) = v ci (k + 1) + T s C i ci (k + 1) , (i = 1, 2) (11) The cost function of the conventional predictive control method is as follows.
where i * a , i * b and i * c are the reference output currents on a, b and c phase, respectively, and λ c is a weighting factor. The reference currents can be calculated from the Lagrange extrapolation using the present and the two past reference values as [29] i * abc (k + 2) = 3i * abc (k + 1) − 3i * abc (k)+i * abc (k − 1) , (13) where i * abc (k + 1), i * abc (k) and i * abc (k − 1) are the reference output currents at the (k + 1) th , k th, and (k − 1) th instant, respectively. Fig. 3 shows the control block of the conventional method.
In the conventional predictive control method, the weighting factor is required in the cost function because there are two control targets, which are output currents and the capacitor voltages. Also, control performance depends on the value of the weighting factor. Therefore, if control conditions or parameters change, the weighting factor must be redesigned, and in general, the weighting factor is empirically designed. Therefore, many studies have been conducted to eliminate the weighting factor.

III. PREVIOUS RESEARCHES TO AVOID THE WEIGHTING FACTOR
In model predictive control, the weighting factor is used when there are several targets to control. However, the performance of the controlling target depends on the value of the weighting factor. That is why it is always important to decide what weighting factor to use. Many studies have been conducted to eliminate the weighting factor [30]- [36]. Among them, the algorithm that eliminates the weighting factor is the most applied to the motor. This is because the motor cannot be controlled by controlling only one variable. In conventional model predictive torque control (MPTC) method, torque and stator fluxes had to be controlled. However, because torque and stator flux have different units, the weighting factor is used to determine the control weight between torque and stator flux in the cost function. To eliminate the weighting factor, in [30], voltage vector, which is calculated by using the model of torque and stator flux is used in the cost function. In [31], a virtual vector that is calculated by using the model of motor is used in the cost function to control motor, and two hysteresis comparators are used to determine which virtual vector to use. In [32], new reference stator flux is calculated by using torque and stator flux to eliminate torque in the cost function from the conventional method. In [33], torque and reactive torque are used in the cost function to control motor. Reactive torque is calculated by using the model of stator flux. In the conventional model predictive direct speed control, speed, d-axis, and q-axis components of current are used in the cost function. In [34], a voltage vector, which is calculated by using the model of the motor, is used in the cost function to control the speed of the motor. In addition to the motor, multilevel converters are one of the applications with many targets to control. Among them, the use of the weighting factor in the cost function is inevitable in NPC converter and nested neutral point clamped (NNPC) converter because these topologies must control both current and capacitor voltage [35], [36].
In [35], the capacitor voltage term in the cost function is eliminated to eliminate the weighting factor. Therefore, the voltage vector term in the cost function is only used to control the output currents. To maintain the capacitor voltage balance, the redundant switching state is selected properly. The redundant switching state has the same magnitude and angle of the voltage vector, but the change in capacitor voltage is opposite. Therefore, when selecting a voltage vector with redundant switching states, the appropriate switching state is selected according to the capacitor voltage. In addition, an algorithm that uses only adjacent vectors as switching state candidates was also applied to reduce the computation time. Fig. 4 shows the space vector diagram and divided sectors used in [35]. As shown in Fig. 4, the reference voltage is located at sector I-3. In this case, the switching state candidates are the switching states [PON], [PPN], and one of  [PPO] and [OON]. If only the adjacent vectors are used as candidates, the computation time of the algorithm can be greatly reduced. In this paper, computation time was saved up to 53.3%. The capacitor voltage determines whether the switching candidate is [PPO] or [OON]. Thus, the capacitor voltage balance can be maintained. Tables 2 and 3 show the switching state candidates according to the capacitor voltages for each sector.
However, the capacitor voltage balance can be limited when the magnitude of the reference voltage vector is large, and a small vector is not selected. The capacitor voltage is controlled by selecting the appropriate switching state when selecting a small vector. Therefore, if the small vector is not selected, the capacitor voltage cannot be controlled. Another limitation is when the phase difference between the reference VOLUME 8, 2020  voltage and the current becomes large. When the phase difference between the reference voltage and the output current occurs, the variation of the capacitor voltage when selecting the small vector and the medium vector changes. Fig. 5 shows the sign of the output current for each sector when the phase difference between the reference voltage and output current is 90 • . If the reference voltage vector is located in sector I-3 as shown in Table 2  As shown in Fig. 6 (a), since the current flows into the upper capacitor, the upper capacitor is charged, and the lower capacitor voltage decreases. Therefore, when the switching state candidates of Table 2 are used according to the capacitor voltage proposed in [35], the capacitor voltage cannot be controlled. Similarly, as shown in Fig. 6 (b), because current flows into the lower capacitor, the lower capacitor is charged, and the upper capacitor voltage decreases. Using the switching state candidates of Table 3 cannot control the capacitor  voltages. Thus, when there is a large phase difference between the reference voltage and the output current, the algorithm of [35] has a limitation in controlling the capacitor voltages.
In [36], the weighting factor is eliminated by using dividing the cost function into three. In the conventional algorithm of [36], there are four weighting factors in the cost function to control four variables, which are active power, reactive power, flying capacitor voltage, and dc-link capacitor voltage. The proposed algorithm uses three cost functions. The first cost function controls active power and reactive power. Second and third cost function control flying capacitor voltage and dc-link capacitor voltage, respectively. Fig. 7 shows the control block of the proposed method in [36].
As shown in Fig. 7, the first cost function, which only controls the flying capacitor voltage and dc-link capacitor voltage, selects N vectors with the smallest errors. In the second cost function, K vectors are selected to control active power and reactive power. In the third cost function, the optimal vector with the smallest error is selected to control the switching frequency. Three-step control can successfully eliminate the weighting factors in the cost function. However, the computation time is increased. In the conventional method, there is only one cost function, which considers 144 switching states. In the first cost function of three-step control, 144 switching states should be considered. In the second and third steps, N and K switching states should be considered, respectively. This causes an increase in computation time.

IV. PROPOSED NP VOLTAGE CONTROL ALGORITHM
One of the disadvantages of the conventional MPC method is that the weighting factor of the cost function needs to be designed. The weighting factor is a value that determines the weight of control between the output currents and the capacitor voltages. Therefore, if the control conditions or parameters change, the weighting factor also has to be redesigned. In this paper, an algorithm that simultaneously controls output currents and capacitor voltages without using weighting factors was proposed. The cost function of the proposed algorithm is based on pole voltage instead of (12) used in the conventional method. The proposed algorithm first controls the output current by generating a reference voltage using the reference current. Then, the capacitor voltages are controlled by injecting the offset voltage into the reference voltage.

A. CURRENT CONTROL ALGORITHM USING REFERENCE VOLTAGE
Assuming that the real output current follows the one-step future reference output current, i * (k + 1), the reference voltage can be obtained by replacing the future output current in (2) with the reference output current as where v * x is the reference voltages for each phase and i * x is the reference output currents for each phase. For the delay compensation, by shifting the model in (15) by one-step forward, the reference voltage at the (k + 1) th instant can be obtained as [28], [29] v The cost function using reference voltage is as follows.
where v aO , v bO and v cO are pole voltages determined according to the switching states, as shown in Table 1. The switching  states selected according to the magnitude of the reference voltage are as follows. a, b, c). (17) The reference voltage vector generated by (15) rotates at a constant frequency, as shown in Fig. 8 in the space vector diagram, and the space vector diagram can be divided into 12 sectors at 30-degree intervals. To see which switching state is selected by the reference voltage, Fig. 8 can be express as Fig. 9 in the time-domain.
To control the capacitor voltage, 6 redundant switching state sets, shown in Fig. 8 should be utilized. Redundant switching states are two switching states that have the same voltage vector but differ in the neutral current. As can be seen in Fig. 9 ) without using all 12 switching states. This is because redundant switching states have the same voltage vector. However, since redundant switching states have a different flow of capacitor current, all 12 switching states must be selected to control the capacitor voltage. Therefore, in this paper, the control algorithm that selects the redundant switching state appropriately for capacitor voltage control using the offset voltage injection was proposed.

B. CAPACITOR VOLTAGE CONTROL ALGORITHM USING OFFSET VOLTAGE INJECTION
The variation of the upper and lower capacitor voltages can be expressed as follows by using (7), (8), and (10).
The difference between the upper and the lower capacitor voltage can be defined as follows.
In addition, the difference between the change amount of the upper and the lower capacitor voltage can be defined as follows.
According to Lyapunov stability, the condition for system stability is as follows [38].
where V = v 2 diff . In order to maintain capacitor voltage balance, the difference between the upper and the lower capacitor voltage should satisfy the following Using a constant sampling period T s , (23) can be expressed in the discrete-time domain as follows.
Using (21), (25) can be expressed as follows Therefore, to maintain the balance of the capacitor voltage, it is necessary to control the three-phase currents and threephase switching states. For the convenience of explanation, Z is defined as To control the capacitor voltage and the output current at the same time, the new reference voltage proposed in this paper is as follows.
where v x,ref is the new reference voltages for each phase and v offset is the offset voltage injected to control the capacitor voltages. The offset voltage injection makes it possible to select all 12 switching states in 6 redundant switching state sets to control the capacitor voltages. The range of offset voltage is as follows [26], [38].
The new reference voltage v x,ref injected with the offset voltage must be less than V dc /2 and larger than −V dc /2. Therefore, the maximum and minimum values of offset voltage can be defined as follows.
where v * max and v * min are the maximum and minimum values among the three-phase reference voltages, respectively. When the offset voltage larger than zero is injected, the magnitude of the reference voltage increases. Therefore, if the switching state without the offset voltage injection is N, O can be selected after the offset voltage injection. If the switching state without the offset voltage injection is O, P can be selected after the offset voltage injection. The reason why P cannot be selected after the offset voltage injection when the switching state without the offset voltage injection is N is that the maximum value of the offset voltage is determined in (28). Similarly, when the offset voltage is less than zero, the magnitude of the reference voltage decreases. Therefore, if the switching state without the offset voltage injection is P, O can be selected after offset voltage injection. If the switching state without the offset voltage injection is O, N can be selected after the offset voltage injection.
For sector1 in Fig. 8, the switching states that can be selected by injecting the offset voltage are shown in Table 4. As can be seen from  can be selected when the offset voltage less than 0 is injected. This makes it possible to select the switching state [ONN] that could not be selected before injecting the offset voltage, as shown in Fig. 9.
Substituting the switching state ([POO], [PON]) injected with the offset voltage larger than zero, and the output current in the sector1 of Fig. 8 into (26) is as follows.
In order for (30) and (31) to satisfy (25), v diff must be larger than zero. The three-phase output current flow in the two cases is shown in Fig. 10. Fig. 10(a) and (b) show the three-phase current flow in the switching states [POO] and [PON], respectively. In Fig. 10(a), because the current flows only to the upper capacitor, the upper capacitor is discharged, and the lower capacitor voltage rises. As can be seen in Fig. 10 (b), i a = i b + i c . Thus, the upper capacitor is discharged, and the lower capacitor voltage rises. Therefore, when v diff > 0, two switching states can be selected to balance the capacitor voltage.
Equation (26) for the switching states [ONN] and [PNN] injected with the offset voltage less than zero are as follows.
In order for (32) and (33) to satisfy (25), v diff must be less than zero. The three-phase output current flow in two switching states is shown in Fig. 11. Fig. 11   the output current in the sector2 of Fig. 12 into (27) is as follows.
For (34) and (35) to satisfy (25), v diff must be larger than zero. The three-phase output current flow in two switching states is shown in Fig. 12. Fig. 12 For (36) and (37) to satisfy (25), v diff must be less than zero. The three-phase output current flow in each switching state is shown in Fig. 13. Fig. 13(a) and (b) show the threephase output current flow in the switching states [OON] and VOLUME 8, 2020 [PON], respectively. As can be seen from the Figure,  , the lower capacitor voltage is discharged, and the upper capacitor voltage rises. Therefore, in order to maintain the capacitor balance, the sign of the offset voltage must always be the same as the sign of v diff , as shown in (38), and the same for sectors 3-12. sgn where sgn(·) is a function that represents a sign. Finally, the offset voltage proposed in this paper is as follows.
The cost function of the proposed control algorithm is as follows.
where v aO , v bO and v cO are the pole voltages that change depending on the switching states described in Table 1. However, the inverter always has a phase difference between the reference voltage and the output current. Therefore, when the phase difference occurs between the reference voltage and the output current, (25) may not be satisfied. Fig. 14 shows a case where a phase difference of 30 • occurs between the reference voltage and the output current.
As described above in the case where the phase difference is 0 • , when the offset voltage less than 0 is injected in sec-tor2, the switching state [PON] can be selected. As shown in Fig. 13(b), because i c = i a + i b , the lower capacitor was discharged, and the capacitor could be balanced again. However, if there is a phase difference of 30 • between the reference voltage and the output current, as shown in Fig. 14, the sign of the b-phase current in sector2 is (−), not (+).  The three-phase output current flow for this case is shown in Fig. 15.
In this case, since i a = i b + i c , the upper capacitor is discharged, and the lower capacitor voltage rises. This does not satisfy (26). Therefore, in this paper, when the phase difference (θ d ) between the reference voltage and the output current occurs, the switching states that do not satisfy (26)  should be excluded from the switching state candidates, respectively, in the case where the phase difference is 0 • for maintaining the balance of the capacitor voltage. The same principle is applied when the phase difference between the reference voltage and output current is 60 • . Furthermore, when the phase difference between the reference voltage and output current is 90 • , this is the opposite of the situation when the phase difference is 0 • , and the capacitor voltage balance also cannot be maintained. Thus, the switching state [PON] should also be excluded from the switching state candidates in sector 2. In addition, other even switching sectors should also exclude one switching state candidate for each sector. Fig. 16 shows a space vec-  When the phase difference becomes larger than 60 • , there are regions in which the direction of the current flowing through the capacitor is changed. To maintain capacitor voltage balance, the applied switching state should be changed according to the direction of the current flowing through the capacitor, as shown in Table 5. The complete control diagram of the proposed approach is illustrated in Fig. 17 and the implementation steps are discussed as follows: 1) The three-phase output currents i x (k) ( x = a, b, c) and capacitor voltage v ci (k) (i = 1, 2) at the k th instant are measured; 2) The magnitude and frequency of the reference output current that flows through the load are defined by the user. The k th instant reference currents are extrapolated to (k + 1) th and (k + 2) th instants as in [28], [29]; 3) The reference voltage v * x (k) at k th instant is obtained by replacing the future output current in (2) with (k + 1) th instant reference output current using (15) and the reference voltage v * x (k + 1) at (k +1) th instant is obtained using (15);   (x = a, b, c), controlling the capacitor voltage and the output current, is calculated from (27); 6) The predicted output voltage variables are expressed in terms of switching states. These variables are included in the cost function (40) and evaluated for all possible switching states. The switching state that minimizes the cost function is selected and applied to the inverter directly.

A. SIMULATION RESULTS
In this chapter, the proposed NP voltage control algorithm is compared and analyzed to prove the validity of the proposed method. The simulation was performed by changing only the algorithm to the three-level NPC inverter topology using PSIM program. Table 6 shows the parameter values used in the simulation. In addition, the proposed method was compared with the conventional method to verify the performance of the proposed method. However, in the conventional method, the control performance depends on the value of the weighting factor (λ c ). If the value of the weighting factor is large, the ripple of VOLUME 8, 2020 the capacitor voltage is reduced, but the average THD value of three-phase output currents deteriorates. Conversely, if the value of the weighting factor is small, the average THD value of three-phase output currents is lowered, but the ripple of the capacitor voltage is deteriorated. The weighting factor was set to 0.1, which is used in [27].
The sampling time exerts a significant impact on the control performance of the MPC approach. A small sampling period will result in high performance of the system but require a fast control processor to ensure a large number of calculations necessary. This results in a rise in the cost of the system, causing a challenge in practical implementation as industrial applications. On the other hand, the performance of the system is deteriorated with a large sampling period. The performance of both conventional MPC and the proposed method under different sampling frequency was evaluated. Fig. 18 shows performance change in the average THD pf the three-phase output currents, the current error, the peakto-peak value of capacitor ripple voltage, and the average number of switching, respectively. As can be seen, there is no significant difference in the performance of the current error, the peak-to-peak value of capacitor ripple, and the number of switching between the conventional MPC method and the proposed approach according to the variation of the sampling frequency. Although the average THD of the three-phase output currents of the proposed method is slightly higher than that of the conventional MPC method, the overall trend is similar. For these reasons, the sampling period is set to 66.66µs in simulation and experiment, which is suitable for both output performance of the system and a clock frequency of DSP TMS320F28335. Fig. 19 shows the simulation results of the three-phase output current (i a , i b , i c ) and the line-to-line voltage (v ab ). Fig. 19 (a) and (b) show the conventional control method and the proposed method, respectively. As shown in Fig. 19, the three-phase output currents of both control methods are well controlled with a sinusoidal wave with peak value 5 A, and the line-to-line voltage is five levels. However, the average THD value of three-phase output currents of the proposed method are slightly higher than that of the conventional method. This is because the proposed method excludes the switching state candidate when a phase difference occurs between the reference voltage and the output current. If the switching state candidates are excluded, there may be situations where the inverter cannot select the optimal vector. Selecting another vector without selecting the optimal vector causes an increase in the average THD value of three-phase output currents. Therefore, the average THD value of threephase output currents of the proposed method is slightly higher than that of the conventional method. Fig. 20 shows the high-frequency spectrum of the a-phase output current. Fig. 20 (a) and (b) show the conventional control method and the proposed method, respectively. As can be seen from Fig. 20, the harmonic components of the a-phase current obtained by the proposed method is larger than that of the current obtained by the conventional method. This is because, as explained earlier in the average THD value of three-phase output currents, more harmonic components are generated because the optimal vector is not selected. Fig. 21 (a) and (b) show the waveforms of the upper and lower capacitors (v c1 , v c2 ) obtained by the conventional method and the proposed method, respectively. As shown in Fig. 21, both control methods have well controlled upper and lower capacitor voltage with V dc /2. In addition, the ripple value of the capacitor voltage of the conventional method is similar to that of the proposed method.
In order to investigate the capacitor voltage balancing performance of the proposed algorithm, simulations of capacitor voltage balancing under voltage unbalance condition was presented. Capacitor voltage unbalance condition was created by connecting a 1-ohm resistor in parallel to the upper capacitor. By connecting the resistors in parallel for 0.1 s to create a capacitor voltage unbalance condition, and after 0.1 s, the resistor was removed to see if the control methods could rebalance the capacitor voltages. Fig. 22 shows the waveforms of the capacitor voltages and line-to-line voltage, which start voltage balancing at unbalanced conditions. Fig. 22 (a) and (b) are obtained by the conventional control method and the proposed method, respectively. As shown in Fig. 22, capacitor voltage unbalance occurs from 0.31 seconds, and capacitor voltage balancing starts from 0.32 seconds. Both control methods quickly balance the capacitor voltage, and the proposed method achieves a slightly fasterbalancing speed.
In order to compare the transient response characteristics, the magnitude and fundamental frequency of three-phase reference currents of the conventional method and the proposed method were changed under steady-state conditions. Fig. 23 shows the transient response waveform with a step change of magnitude of three-phase reference currents from 3.5 A to 6 A. As shown in Figure, the magnitude of the current reference changes in 0.47 s, and both control methods exhibit fast transient response. In addition, it can be seen that the capacitor voltage is controlled to 150 V both before and after the step change. However, as the magnitude of the current reference increases, the ripple of the capacitor voltage also increases. Fig. 24 shows the transient response waveform with a step change of fundamental frequency of three-phase reference currents from 60 Hz to 100 Hz. As shown in Figure, the fundamental frequency of the current reference changes in 0.47 s, and the capacitor voltage is controlled to 150 V both before and after the step change. In addition, there is no significant difference in the ripple of the capacitor voltage even after the frequency changes from 60 Hz to 100 Hz. Both control methods show a fast-transient response and no difference in speed.
In order to clarify the capacitor voltages balancing feature of the proposed method, the simulation results obtained by the proposed method and the control method in [35] were compared under different phase. Fig. 25 shows the three-phase output currents (i a , i b , i c ) and capacitor voltages  (v c1 , v c2 ) obtained by the proposed method and the control method in [35] with the phase difference 30 • and 70 • when the modulation index is 1. The average THD of the threephase output current of the control method in [35] is slightly lower than that of the proposed method. However, peakto-peak values of capacitor ripple voltages of the control method in [35] is higher than that of the proposed method as shown. Especially in the phase difference is 70 • , the capacitor voltages in [35] significantly deteriorate. This is because of the limitation of the control method in [35] with a high modulation index and phase difference, as explained earlier.      26 shows the capacitor voltage balancing under voltage unbalance condition obtain by the proposed method and the control method in [35] with the phase difference 30 • and 70 • . As shown in Fig. 26(a) and (b), both control methods can quickly balance the capacitor voltage, and the balancing speed of the proposed method is slightly faster than that of the control method in [35]. However, as in Fig. 26(c) and (d), the balancing speed of the control method in [35] is much lower than that of the proposed method. This is because the voltage unbalance region in Fig. 25(d) disturbs the capacitor voltage balancing. Fig. 27 shows the dynamic response with step change of magnitude (from 3.5A to 5A) of the reference output currents with the phase difference 30 • and 70 • . As shown in Figure, both control methods have a fast transient response and no significant difference in speed. The only difference is the peak-to-peak values of capacitor voltage ripple voltages.

B. EXPERIMENTAL RESULTS
Experiments were performed to verify the validity of the proposed method. Table 7 shows the parameter values used in the experiment. Unlike the simulation, the experiment was conducted without back-emf. The inverter was controlled using a DSP (Digital Signal Process) board (TMS320F28335). Fig. 28 shows the experimental set-up. Fig. 29 shows the waveforms of the three-phase output current (i a , i b , i c ) and the line-to-line voltage (v ab ) obtained from the experiment. Fig. 29 (a) and (b) are the experimental results obtained by the conventional method and the proposed method, respectively. As shown in Fig. 25, the three-phase output current waveforms of the conventional control method and the proposed method are controlled with a sinusoidal waveform with a peak value of 5 A, and the line-to-line voltage is also five levels. In addition, similar to the simulation results in Fig. 19, average THD of the three-phase   Simulation results of three-phase output currents (i a , i b , i c ) and capacitor voltages (v c1 , v c2 ) with step change of peak value of the output reference currents (from 3.5 A to 5 A) obtained by (a) proposed method and (b) control method in [35] with the phase difference 30 • , (c) proposed method and (d) control method in [35] with the phase difference 70 • . output current of the proposed method is slightly higher than that of the conventional method. This is because, like the reason described before, some switching state candidates of the proposed method are excluded so that there may be a situation where the optimal vector is not selected. Fig. 30 shows the waveform and harmonic spectrum of the a-phase output current. As shown in the Figure, there is no significant difference in the frequency components. Fig. 31 shows the waveforms of the upper and lower capacitor voltages (v c1 , v c2 ). Fig. 31 (a) and (b) are waveforms obtained by the conventional method and the proposed method, respectively. As shown in Fig. 31, the upper and lower capacitor voltages are controlled to V dc /2 in both the conventional control method and the proposed method and the ripple values are also similar.
Experiments were conducted to verify the capacitor voltage balance performance and transient response of the proposed method. Fig. 32 shows the experimental results of the capacitor voltages, which start voltage balancing at unbalanced conditions. To make the capacitor voltage imbalance condition, an electronic load was connected in parallel to the lower capacitor. The resistance of the load was set to 1 . As shown in Fig. 32, the electronic load was activated to create a capacitor voltage imbalance, and the electronic load was disabled to eliminate the effect of the load. Both control methods quickly eliminate capacitor voltage imbalance, and the capacitor voltage is again balanced. There is also no significant difference in the rate at which the capacitor voltages are again balanced.
Two experiments were conducted to verify the transient response of the proposed method. Fig. 33 shows the transient response waveform with a step change of magnitude of three-phase reference currents from 3.5 A to 6 A. As shown in Figure, in both control method, the real output current quickly follows the reference current from 3.5 A to 6 A. Also, the peak-to-peak values of capacitor ripple voltages after the change in the magnitude of the reference output current  is slightly higher than the peak-to-peak values of capacitor ripple voltages before the change. Fig. 34 shows the transient response waveform with a step change of the fundamental frequency of three-phase reference currents from 60 Hz to 100 Hz. As shown in Figure, in both two control methods, the real output current quickly follows the reference current with the frequency from 60 Hz to 100 Hz.
The proposed method excludes switching state candidates when phase difference occurs between the reference voltage and output current, as shown in Table 5. Therefore, as the phase difference changes, so does the performance.    35 shows the three-phase output currents (i a , i b , i c ) and capacitor voltages (v c1 , v c2 ) obtained by the proposed method with the phase difference with 30 • and 70 • , respectively. As shown in Figure, the average THD of three-phase output current and peak-to-peak values of capacitor ripple voltages of the phase difference with 30 • and 70 • are similar. This is because excluded switching state candidates are the same as  shown in Table 5. Also when the phase difference is 70 • , and the capacitor current direction is reversed, the switching state of a small vector is selected in reverse to control the capacitor voltages. As a result, in both phase difference 30 • and 70 • . The performance of the algorithm does not change. Fig. 36 shows the experimental results of the capacitor voltages, which start voltage balancing at unbalanced conditions obtained by the proposed method with the phase difference    the phase difference is 30 • . This is because the switching state selected is almost similar.
In terms of the computational time, Table 8 shows the calculation time of the conventional and proposed methods. The number of clocks of the conventional and proposed methods were measured in the DSP board in the experimental implementation, and they were converted to the required implementation time to perform the two control schemes. As can be seen from Table 8, the proposed approach requires higher calculation time than the conventional MPC method. This can be explained that the calculation for the offset voltage increases the computational burden. However, the proposed approach eliminates the time-consuming and tedious weighting factor tuning work and does not need to redesign the MPC control for every single change of the system.

VI. CONCLUSION
In this paper, a predictive control method for controlling the NP voltage balance of three-phase three-level NPC inverter by offset voltage injection was proposed. One of the most important control elements of the three-level NPC inverter is the NP voltage, and the NP voltage should always be balanced. The proposed method reduces the difference between the two DC capacitor voltages by injecting the offset voltage to the reference voltage. The offset voltage is determined by the difference between the upper and lower capacitor voltages. In addition, when the phase difference between the reference voltage and the output current occurs, the switching candidate is excluded to maintain the balance of the capacitor voltage. As a result, the proposed method can control not only the output currents but also the NP voltage balance. Simulations and experiments are performed to demonstrate the validity of the proposed method.