Research on a Fault Location Method for a Pole-to-Pole Short-Circuit Fault in an LCC-MMC Hybrid DC Transmission System

When a pole-to-pole short-circuit fault occurs in an LCC-MMC hybrid DC transmission system, the fault characteristics are affected by the distributed capacitance and the transition resistance that cause a dead zone in the fault location and poor accuracy in determining the fault location. In view of this, this paper proposes a fault location method for the LCC-MMC hybrid DC transmission system. By analyzing the fault characteristics of the rectifier station and inverter station, the fault circuit equation of the rectifier side is analyzed, and the relationship between the fault distance and the transition resistance is deduced. The fault circuit of the inverter side is isolated by blocking CDSM-MMC, which can clear the fault current on the inverter side and thus eliminate the influence of the transition resistance. The steady-state fault information of the LCC DC outlet is used to eliminate the effect of distributed capacitance and achieve an accurate fault location. The LCC-MMC hybrid DC transmission system model is built on the PSCAD / EMTDC simulation platform. Simulation results show that the proposed fault location method can effectively avoid the transition resistance and distributed capacitance influences and thus obtain high fault location accuracy. Moreover, an accurate fault location can be achieved with a narrow fault data window length.


I. INTRODUCTION
The problem of commutation failure in DC transmission systems based on line commutation converters (LCC) is difficult to solve [1], [2] and limits the development of DC transmission systems. The DC transmission system in which LCC is a rectifier station and a modular multilevel converter (MMC) is an inverter station can avoid the problem of commutation failure [3], [4]. However, the faults that occur in DC systems are basically nonmetallic faults, and transmission lines cannot ignore the characteristics of distributed capacitance [5] because the characteristics of pole-to-pole short-circuit faults are affected by the transition resistance and distributed capacitance; thus, the accuracy of determining the fault location is reduced.
The associate editor coordinating the review of this manuscript and approving it for publication was Dazhong Ma .
The probability of a pole-to-pole short-circuit fault on an overhead line is greater than that of other faults, and the hazard is the most serious [6]; therefore, this paper mainly examines the fault location of pole-to-pole short-circuit faults. The existing DC system fault location methods are mainly divided into three categories: the traveling wave method, fault analysis method and active injection method. The traveling wave method [7] calculates the fault distance by recording the time that the traveling wave travels from the fault point to protection units. Reference [8] analyzes the characteristic that traveling waves first arrive at the converter connected to the fault line and realizes fault location by detecting the arrival time for fault traveling waves to reach the three converters. Reference [9] detects the arrival time of the traveling wave head of each end through data communication at each end, which avoids the detection of reflected traveling waves and obtains accurate and reliable location results. Reference [10] achieves fault location by extracting VOLUME 8, 2020 This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/ the natural frequency of the fault traveling wave. However, the traveling wave method requires precise line distribution parameters, a high sampling rate and accurate detection for traveling wave heads. The fault analysis method uses the system parameters to analyze the fault circuit equation and realizes fault location by analyzing the internal relationship between the fault electrical quantity and the fault distance. Reference [11] proposes a high-frequency impedance-based fault location method and uses double-ended measurement information to eliminate the effect of transition resistance; however, the effect of the line distributed capacitance will be amplified at high frequencies. Reference [12] writes the differential equations in the time-frequency domain of the fault loop through parameter identification and uses the least squares method to optimize the solution process to obtain the fault distance and transition resistance. Reference [13] analyzes the Bergeron model of the transmission line, calculates the voltage distribution curve along the line according to the measured values of the voltage and current at both ends of the line, and finds the time difference of the voltage at the fault point to realize the fault location. Reference [14] measures the similarity of each pattern in the database and converts the similarity to the fault distance by analyzing the relationship between the fault voltage waveform and the fault location. The fault analysis method simplifies the system line parameters and ignores the influence of line-distributed capacitance, so it is difficult to apply to a DC system of long transmission lines. The active injection method injects a characteristic signal into the fault point by adding additional devices [15] and obtains the distance information of the fault circuit according to the characteristic signal to achieve the fault location. Reference [16] uses capacitors, inductors and IGBTs to form an injection device that can inject a triangular wave into the fault circuit to detect high-frequency impedance. The active injection method does not consider the influence of the characteristics of line distribution parameters on the characteristic signals in the fault loop and requires additional investment in auxiliary devices, which is less economical.
Existing fault location methods cannot address the dual effects of the distributed capacitance and transition resistance, which result in a fault dead zone and low positioning accuracy. Therefore, this paper proposes a fault location method based on inverter station blocking. The fault circuit is isolated by blocking the inverter station to analyze the electrical equation of the fault circuit with the transition resistance on the rectifier side, which can effectively avoid the influence of the transition resistance. The influence of the distributed capacitance is eliminated by using a steady-state DC component, which can improve the accuracy and applicability of fault location. Furthermore, the method does not require additional investment in auxiliary devices and has better economy. A simulation model of the LCC-MMC hybrid DC transmission system is built on the PSCAD/ EMTDC simulation platform to verify the performance of the proposed fault location algorithm.

II. FAULT CHARACTERISTICS OF HYBRID DC TRANSMISSION SYSTEM A. STRUCTURE OF HYBRID DC TRANSMISSION SYSTEM
The DC transmission system studied is a two-terminal transmission system with a voltage level of ±500kV. The topology of LCC-MMC hybrid DC transmission system is shown in Fig. 1. The DC line of the system studied in the manuscript is a bipolar structure [17]. The system includes converter transformers, converters (LCC and CDSM-MMC), a smoothing reactor, an AC filter (ACF), a DC filter (DCF) and the transmission line. The rectifier station is the LCC (as shown in Fig. 2(a)), which uses a constant DC current control strategy [18]. The LCC adopts this structure, that is, the double 6-pulse bridges are connected in parallel on the AC side (30-degree phase shift) and connected in series on the DC side. The constant DC current control strategy is shown in Fig. 3(a). According to the required transmission power of the system, the DC current setting value i ref is given. The difference between the setting value i ref and the actual current i dc is put into the PI link to obtain the firing angle command value α ref . Due to the reactance of the converter transformer and the reactance of the commutation loop, the fault current of the LCC DC outlet rises slowly. Meanwhile, the transient current overshoot is related to the damping ratio ξ . When the damping ratio is larger, the overshoot is smaller. Therefore, the fault current of the LCC DC outlet will not have a serious overcurrent phenomenon, which allows the LCC to continue to run for a period to obtain more detailed fault information. Then, after a pole-to-pole short-circuit fault occurs, the LCC is not blocked to obtain enough useful fault information to realize accurate fault location in the following research. The inverter station adopts a clamp double submodule modular multilevel converter (CDSM-MMC) structure (as shown in Fig. 2(b)), which can clear the fault current through blocking the IGBTs in the submodules of CDSM-MMC [19]. In Fig. 2(b), C 0 is the single submodule capacitor of CDSM-MMC and L 0 is the bridge arm inductance of CDSM-MMC. CDSM-MMC uses a constant DC voltage control strategy [20] to provide support voltage in the system. The details of the model controls are shown in Fig. 3(b), (c) and (d). Fig. 3(b) is the phase-locked loop (PLL) controller. Fig. 3(c) is the circulating current suppression controller, where I dcir and I qcir are the d-axis and q-axis components of the double-frequency circulating current of the bridge arm respectively. Fig. 3(d) is the vector current controller, where U dcref and U dc are the DC voltage reference value and actual value, respectively, V ref and V m are the AC voltage reference value and actual value, respectively, I sd and I sq are the d-axis and q-axis components of the AC current, respectively, and U td and U tq are the d-axis and q-axis components of the AC voltage, respectively. When a pole-topole short-circuit fault occurs in the DC transmission line, the fault current rises rapidly and reaches the IGBTs' current limits to block CDSM-MMC for protecting the IGBTs with poor anti-overcurrent ability.

B. FAULT CHARACTERISTICS OF INVERTER STATION
After a pole-to-pole short-circuit fault occurs, the fault current rises rapidly. According to the working state of CDSM-MMC, the fault processes can be divided into two stages: preblocking and postblocking. Before blocking, the fault currents are mainly the discharge currents of capacitors in the CDSM-MMC submodules and the feed currents of the AC system. Among them, the capacitor discharge currents account for the main components. The fault current loop is shown in Fig. 4. The blue loop is the discharge current loop of submodule capacitors, and the green loop is the current loop fed by the AC system. The number of input submodules of the upper and lower arms is a constant N for preblocking. According to Fig. 4, in the capacitor discharge circuit, the capacitances and inductances of the single-phase upper and lower bridge arms are connected in series, and the three-phase bridge arms are connected in parallel and form a fault circuit with the fault point.
The equivalent capacitor discharge fault circuit is shown in Fig. 5, where C eq is the equivalent capacitance, R eq is the equivalent resistance, and L eq is the equivalent inductance.   According to the number of input submodules of the upper and lower bridge arms, it can be known that C eq = 3C 0 /N , and the discharge process of the DC capacitor before blocking is a second-order underdamped oscillation attenuation process. When the fault current reaches the IGBT current withstand capability, the IGBT is blocked. The fault current circuit of a single submodule is shown in Fig. 6.
As can be seen from Fig. 6, after blocking, only the diode and the DC capacitor are connected in series by reverse polarity to form the fault circuit. Therefore, the diode is in an infinite resistance state, the circuit is not conductive, and the fault current is self-cleared.

C. FAULT CHARACTERISTICS OF THE RECTIFIER STATION
The LCC rectifier station is composed of thyristors and needs to reverse the voltage to achieve blocking; however, the LCC studied in this paper uses nonblocking control. When a poleto-pole short-circuit fault occurs, the LCC relies on natural commutation to realize valve arm input and removal. Figure 7 shows the commutation process of the lower single 6-pulse bridge in the LCC (VT 62 is off and VT 22 is on). For a 6-pulse bridge, the commutation is performed once at an interval of 60 • , and six in a power frequency cycle of 2π (corresponding to 6 working modes: VT 12 and VT 62 are on, VT 12 and VT 22 are on, VT 32 and VT 22 are on VT 32 and  In this 60 • time scale, the lower 6-pulse bridge will have a commutation (VT 62 is off and VT 22 is on). Therefore, the upper conduction mode corresponds to the lower two conduction modes and LCC has 12 working modes.
Because the characteristic harmonic filter is installed at the DC outlet of the LCC, the voltage and current of the LCC DC outlet do not contain the characteristic harmonic component [20].
After the DC fault occurs, the inverter CDSM-MMC is blocked under the influence of overcurrent. The AC system, LCC rectifier station, DC line and fault point constitute a fault circuit. The schematic diagram of the fault circuit is shown in Fig. 8. In Fig. 8, u m is the fault voltage measured by protection m, i m is the fault current measured by protection m, Z m is the impedance of the unipolar line from the fault point to protection m, and R f is the transition resistance.
According to the above analysis, after the CDSM-MMC is blocked, it can be seen from Fig. 8 that the voltage and current measured by the rectifier side protection m have the relationship shown in (1).

III. NOVEL PRINCIPLE OF FAULT LOCATION A. AVERAGE ALGORITHM
The most commonly used DC filter is a double-tuned filter. For LCC (12-pulse converter), filters of order 12/24th and 12/36th are usually combined to tune 600 Hz and 1200 Hz, 600 Hz and 1800 Hz harmonic components. After the inverter station is blocked, the measured fault information on the rectifier side does not contain the 12th, 24th and 36th characteristic harmonics under the action of the characteristic harmonic filters. However, due to the existence of distributed capacitance, the fault information on the rectifier side will fluctuate slightly above and below the DC stable component. Therefore, the measured fault information cannot be directly used for fault location, which will result in poor location accuracy. The average algorithm (as shown in Fig. 9) is used to obtain the stable DC component to eliminate the influence of fluctuations and improve the accuracy of the fault location results.
By differentiating the x-axis to be infinitely small, the area enclosed by the arc ABCD in Fig. 9 can be approximately regarded as equal to the area of the trapezoid ABCD. The average value from t i−1 to t i is approximately equal to (y i−1 + y i )/2, and relatively stable average data can be obtained (see the blue dotted line in Fig. 9). Therefore, the average value of the voltages and currents can be obtained by formula (2). Through a sliding window calculation, it is possible to obtain approximately constant DC voltage and current measurement values.

B. METHOD OF FAULT LOCATION
According to the above analysis, after the CDSM-MMC is blocked, the fault circuit on the rectifier side contains the transition resistance (as shown in (1)), and it is not possible to directly use (1) for fault location, so the whole system fault circuit is considered to eliminate the transition resistance influences. Combined with Fig. 8, the fault circuit of the whole system can be obtained as shown in Fig. 10. In Fig. 10, n is the protection measurement device of the inverter station, u n is the fault voltage measured by protection n, i n is the fault current measured by protection n, R m and X m are the unipolar line impedances from the fault point to protection m, and R n and X n are the unipolar line impedances from the fault point to protection n.
According to Fig. 10, the fault circuit equations of the rectifier side and the inverter side can be obtained as shown in (3) and (4). After the CDSM-MMC is blocked, the fault current on the inverter side is self-cleared, i n is equal to zero, so (4) can be written in (5).
Substituting (5) into (3), the fault circuit equation of the system can be obtained as shown in (6).
According to the previous fault characteristic analysis, because the characteristic harmonic filter is installed at the DC outlet of the LCC, the 12th characteristic harmonic is not included in u m and i m . Considering the accuracy of the fault location, the average algorithm is used to obtain the DC components Combined with the steady-state fault current, (6) can be written as a DC form in (7).
The line resistance R m from the fault point to the protection m can be written as shown in (8).
where r 0 is the line unit resistance, and x m is the fault distance from the fault point to the protection m.
Substituting (8) into (7), the fault distance x t(i) m can be calculated as shown in (9).
After CDSM-MMC is blocked, the average values of voltage and current U t(i) m , U t(i) n , and I t(i) m are calculated by a sliding data window, and the fault distance that changes with the data window time can be calculated using equation (9). To ensure the accuracy of the distance measurement results and stop the calculation, the fault distance x m is obtained by calculating the average value of x t(i) m in the total data window (30-40 ms after the fault) and is considered to be the actual fault distance.
The error criterion is set as shown in (10).
where x actual is the actual fault distance.

C. METHOD OF FAULT LOCATION
The flowchart of the proposed fault location algorithm is shown in Fig. 11. The detailed steps are as follows: Step 1: Read the fault voltages and currents of protection m and protection n, and block CDSM-MMC when the fault current meets the IGBT's blocking condition.
Step 3: The fault distance x m is obtained by calculating the average value of x t(i) m in the total data window.

IV. SIMULATION AND VERIFICATION
The simulation model of the LCC-MMC hybrid DC transmission system is built on the PSCAD / EMTDC electromagnetic transient simulation platform, as shown in Fig. 1. The voltage level is ±500 kV and the transmission lines are built by the frequency dependent (phase) model. The frequency dependent (phase) model considers the frequency variation characteristics of the transmission line and uses distributed parameters to represent the line resistance, inductance and capacitance, which is currently the most accurate line model. Parameters of the transmission line frequencydependent model and tower model are shown in Fig. 12. The length of the transmission line is 200 km. The sampling frequency of the protection device is 10 kHz. The detailed parameters of the DC transmission system can be seen in the Appendix. VOLUME 8, 2020

A. SIMULATION ANALYSIS OF FAULT CHARACTERISTICS
The pole-to-pole short-circuit fault occurs at 1.0 s, and the fault characteristic simulation results are shown in Fig. 13. The fault is 100 km away from protection m. It can be seen in Fig. 13 that after a pole-to-pole short-circuit fault occurs, the fault current rises rapidly.
When the fault current reaches the IGBTs' current limit in the CDSM-MMC submodule (approximately 1.002 s), the IGBTs are blocked and the circuit between the bridge arms of the CDSM-MMC and the DC system is cut off to clear the fault current (I n is equal to zero). Since LCC is not blocked, under the action of the constant DC current controller, the PI controller automatically adjusts the firing angle α to ensure that the fault current I m of the LCC DC outlet on the rectifier side is maintained at the current level before the fault (DC current setting value 1 kA). There is a commutation reactance during the commutation process of the LCC, and the fault circuit passes through a converter transformer with a large impedance such that when a pole-to-pole short-circuit fault occurs, the fault current I m of the LCC DC outlet rises slower than the DC capacitor discharge current of the CDSM-MMC.
The DC component of the fault voltage obtained by the average algorithm is shown in Fig. 14. It can be seen from Fig. 14 that the measured fault voltage at the DC outlet of the LCC after the fault contains more harmonics, and a stable DC voltage can be obtained through the average algorithm. Fig. 14 illustrates that the fault location expression (9) based on DC components obtained by the average algorithm has no relationship with the inductance and capacitance, and since the DC component remains basically unchanged after 10 ms of the fault, it can be considered that the delay of the two-terminal communication has little effect on the proposed algorithm.

B. PERFORMANCE ANALYSIS OF FAULT LOCATION
Since the purpose of the research is to use the fault information of the LCC DC outlet to achieve an accurate fault location after CDSM-MMC is blocked, the following simulation analysis does not set the LCC block so that the performance of accurate fault location can be clearly observed. The transition resistance and distributed capacitance seriously affect the results of fault location. The traditional fault location method often ignores the influence of the distributed capacitance of the line and only depends on the imaginary part of the impedance measured to eliminate the effect of the transition resistance. However, in the actual project, when a fault occurs, due to the influence of distributed capacitance, the impedance model cannot be used directly to analyze the fault circuit equation. Therefore, the measured impedance is affected by the distributed capacitance, and the fault distance cannot be obtained directly by using the imaginary part. Based on the method proposed in this paper, the double-ended measurement information is used to eliminate the influence of the transition resistance, and the DC components are used to eliminate the influence of the distributed capacitance. Influencing factors such as distributed capacitance, transition resistance, and noise are considered to verify the performance of the proposed fault location algorithm.

1) THE INFLUENCE OF DISTRIBUTED CAPACITANCE
To verify the influence of distributed capacitance on the proposed fault location algorithm, the pole-to-pole short-circuit faults are separately set at different positions on the transmission line of the frequency-dependent model, as shown in Fig. 15.
It can be seen from Fig. 15 that when the fault distance is 50 km, 75 km, 100 km, and 150 km, the fault location results of 30-40 ms after the fault have tended to the actual fault distance and the errors are less than 1%. The DC components obtained by the proposed average algorithm can obtain a stable fault distance and high-precision fault location results.

3) THE INFLUENCE OF NOISE
The influence of electromagnetic interference and measurement errors in actual engineering on measurement data can be simulated by Gaussian white noise. Taking a pole-to-pole short-circuit fault 100 km away from the protection m as an example, the signal-to-noise ratio (SNR) is set to 40 dB and 30 dB to verify the anti-noise performance of the proposed fault location algorithm. The simulation results are shown in Fig. 17. It can be seen from Fig. 17   After a pole-to-pole short-circuit fault occurs, there will be a sudden drop in the DC link voltage and the fault voltage is very small. Therefore, a small measurement error or electromagnetic interference can cause large fluctuations. A small measurement error or electromagnetic interference can cause large fluctuations (compared to a small fault voltage), which will lead to an inaccurate fault location.

4) THE INFLUENCE OF COMMUNICATION DELAY
To verify the influence of communication delay on the proposed fault location algorithm, the fault distance of 75 km is taken as an example, and the communication delay is set to 1 ms, 5 ms, 10 ms and 20 ms, respectively. The fault location results are shown in Fig. 18. It can be seen from Fig.18 that based on the DC components obtained by the average algorithm, different communication delays have little effect on fault location. The absolute value of the error of the average value of the fault location results within 30-40 ms after the fault is approximately 2%. From Fig. 18(b), (c) and (d), when the communication delay exceeds 5 ms, the communication delay has almost no effect on the fault location results.

C. COMPARISON WITH OTHER FAULT LOCATION METHODS
To clarify the performance of the proposed method, the existing fault location methods [10], [13] and [14] suitable for DC transmission systems are compared with the proposed fault location method. By setting the same system parameters and taking a 100-km fault distance as an example, the fault location results obtained by the above three methods are shown in TABLE 3. From the results in TABLE 3, the natural frequency method [10] is related to the high frequency in the traveling wave spectrum, which leads to strict requirements on the sampling frequency that is 100 kHz, and the error is more than 1.218% under transition resistance. The fault location error of the voltage distribution method [13] is greater than 2% with the sampling frequency of 100 kHz. The minimum error of similarity measurement method [14] is 0.933% with a sampling frequency of 80 kHz. Methods [13] and [14] are both related to the voltage in the time domain. Compared with [10], the sampling frequency is allowed to be reduced, but the fault location error will be further reduced with a lower sampling frequency.
Compared with methods [10], [13] and [14], the proposed fault location method can achieve a high fault location accuracy that is less than 1% at a sampling frequency of 10 kHz, which has low requirements on system hardware. However, the existing methods [10], [13] and [14] can realize fault location by using a shorter data window. Methods [10] and [13] are related to the voltage propagation speed, which results in the fastest location speed (less than 10 ms). The similarity measurement method [14] begins to collect the voltage waveform after the fault voltage drops to a given threshold, which results in a slightly slower location speed (more than 12 ms). However, the location speeds of these three methods are faster than the proposed algorithm. The transition resistance has little effect on the proposed algorithm, and the location error is less than 1%. The amplitude of the fault current at the LCC DC outlet is small and CDSM-MMC is blocked to  clear the fast-rising and high-amplitude DC capacitor discharge current, which protects the safety of the system power electronic equipment and allows the LCC-MMC hybrid DC transmission system to run for a short time after a pole-topole short-circuit fault. Therefore, the proposed fault location algorithm has the advantages of a high accuracy and a low sampling frequency, and its slower location speed is acceptable.

V. CONCLUSION
By analyzing the characteristics that are revealed when the CDSM-MMC is blocked to cut off the fault circuit and fault current after a pole-to-pole short-circuit fault, this paper proposes a fault location method based on the double-end measurement information and verifies the performance of the location algorithm by simulation. The proposed fault location method uses double-end measurement information to eliminate the interference of the transition resistance on the location result. Meanwhile, the DC component is used to solve the effect of distributed capacitance. The algorithm has a simple principle and low requirement for the window length of the steady-state fault data. However, the method studied in the manuscript is only applied in DC grids containing MMC with fault current self-clearing capability. In the future, it is necessary to further optimize the algorithm to realize the fault location of different DC grids. APPENDIX See Table 4.