Control Strategies and Power Decoupling Topologies to Mitigate 2ω-Ripple in Single-Phase Inverters: A Review and Open Challenges

This paper provides a comprehensive review of the control approaches and the power-decoupling topologies to mitigate <inline-formula> <tex-math notation="LaTeX">$2\omega $ </tex-math></inline-formula>-ripple problem in the single-phase inverters, its solutions, and discusses open challenges yet to be addressed. The cause and effects of <inline-formula> <tex-math notation="LaTeX">$2\omega $ </tex-math></inline-formula>-ripple problem and its solution based on the passive and active power-decoupling techniques are discussed. A subcategory of the active power-decoupling technique nominated as the control-oriented compensation technique is reviewed in detail, this technique can achieve the ripple-mitigation at the source through the control but not necessarily adds extra circuit or active filter to the system. The control-oriented compensation techniques can be applied in the two-stage DC-DC-AC converters and the single-stage inverters having a front-end control capability with the H-bridge such as in the quasi-switched-boost inverters. The merits and associated challenges of these techniques are listed and summarized in a tabular form. Finally, a conclusive discussion with open challenges is presented.


I. INTRODUCTION
Power converters are one of the important entity in the power applications such as renewable/hybrid energy applications, and the power inverters are generally used to supply AC loads in such applications. In the low power applications (< 5 kVA), the single-phase power converter are generally used [1]. In the literature, several topologies of the single-phase DC-AC power converters, for example, Z source inverter (ZSI), quasi-ZSI, quasi-switched boost inverter (quasi-SBI), differential inverters, and two-stage converters are extensively explored for different power applications.
The DC-AC power converters supply to AC loads with the unwanted reflection of Second-order Harmonic Current SHC) ripple (2ω−ripple or two-time-line frequency ripple) at the DC input. In the single-stage DC-AC converter, this ripple at the DC link propagates towards the DC source and injects into the DC source if the DC link capacitance is not sufficient or no compensation technique is The associate editor coordinating the review of this manuscript and approving it for publication was Shihong Ding .
used. The 2ω-ripple poses same problem to the three-phase DC-AC converter with the unbalanced load condition [2]. The ripple also reflects in AC-DC power conversion [3]. A general practice to avoid the injection of ripple into the DC source is to use a large size aluminum electrolytic capacitor (E-cap) at the DC-link. However, the E-caps are vulnerable to low-frequency ripple due to low ripple handling capability and high parasitic resistance [4]. The ripple causes i 2 r-heating loss inside the electrolytic capacitors [5], [6]. The life-span of an E-cap is 10% − 90% of a year at 105 • C [4]; quite smaller than the life of a solar PV panel (≈ 20 years) in a PV system [7]. This raises an important question on the reliability of complete system. A study conducted using data of 213 failure cases from 103 grid-tied solar PV systems at the Florida solar energy suggests that 139 failures are due to the inverter failure [8]. As per a study conducted in [9], in the power converters, 51% instances of inverter's failure are due to solid-state devices and aluminum capacitors. Moreover, 21% failure instances out of 51% are due to the aluminum capacitor failures only. The film capacitor is a reliable alternative to replace the electrolytic capacitor. The low ESR VOLUME 8, 2020 This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/ value and large ripple handling capability of film capacitor makes it a suitable choice. However, an equivalent size of film capacitor is required in lieu of the electrolytic capacitor. The relative high cost of the film capacitor poses challenges to its viability [10]. However, the use of film capacitor is suitable and preferred in the active power decoupling circuits or control-oriented power decoupling techniques; a comparatively small size film capacitor is required in the active filter [11]. This paper reviews several power-decoupling techniques majorly classified as passive power-decoupling techniques (PPTs) and active power-decoupling techniques (APTs). Generally, APT adds additional power electronics circuit with an energy storage element such as film capacitor to the H-bridge. A subcategory of APTs, nominated here as the control-oriented compensation techniques (CCTs) for the two-stage DC-DC-AC power converters and single-stage inverters having front-end control-circuits with H-bridge such as in the quasi-switched boost inverters is discussed in detail. The CCTs eliminate the necessity of additional active filter. It is to be noted that the available review work in the literature [12]- [14] documents several active filter topologies to mitigate 2ω-ripple problem, however, this paper complements the available review work by providing a comprehensive review on the control-oriented techniques based on the different control strategies. The power decoupling-techniques are further categorized based on the topographical arrangement of active filter and control strategies i.e. application of power decoupling technique at (i) DC side of inverter and (ii) AC side of inverter (mixed-type). Beginning with the introduction of 2ω-ripple problem, the effect of SHC ripple on the system will be discussed. A detailed review of different 2ω-ripple mitigation techniques will be discussed. Eventually, the gaps and future scope are extracted and discussed. Section I begins with the introduction, followed by a discussion on the background of 2ω-ripple and its effect on the system in Section II. The Section III reviews several 2ω-ripple control schemes from the existing literature. In the Section IV, conclusive discussion and open problems are presented.

II. 2ω-RIPPLE: ITS BACKGROUND AND CONSEQUENCE
For an ideal inverter, the instantaneous values of input power and output power must be equal. However, in actual scenario, there is the power mismatch between the instantaneous values of DC power and AC power; the pulsating nature of AC power causes the pulsation in the DC input power.

A. BACKGROUND OF 2ω-RIPPLE
Suppose an inverter supplies AC load at ω rad/s. The mathematical representation of such systems is [15], Here v ac and i ac are the instantaneous output AC voltage and output AC current of inverter. θ is displacement angle. The subscript m stands for the maximum value of v ac /i ac . The underline part of (1c) is 2ω-power ripple pulsating over the average DC offset. The Fig. 1(a) depicts this phenomenon. In Fig. 1(a), suppose v dc is the instantaneous voltage at DC-link and i r is the current through DC-link capacitor (C) and assume 2ω-ripple passes through the capacitor only i.e. p r = p r1 and therefore no ripple propagates to the input i.e. p r2 = 0 then the instantaneous power of capacitor is, Here V dc is the average voltage of DC-link and v r is 2ω-ripple voltage. For large value of C, the value of v r in (2b) is negligible, this implies that v r i r V dc i r . This gives, Using the value of p r from (1c) in (3) gives, Here rms stands for root-mean-square. Also, Using (4) and (5) gives, Integrating (6) from both sides and using upper and lower limits in it from Fig. 1 Here v is the peak to peak voltage ripple and subscripts u and subscript l stand for upper limit and lower limit respectively. For the given value of v, P rms , θ and V dc , the size of capacitor required at the DC-link is, Here p.f . stands for power-factor.

B. CONSEQUENCES OF 2ω-RIPPLE ON SYSTEM
The 2ω-ripple poses several issues related to cost, size, efficiency, reliability and stability on the system [16], [17]. This ripple forces an over-rated design of components and increases the peak-rating of system. Consequently, i 2 r in the system increases. The i 2 r-loss inside the E-cap causes heating of electrolyte [4], [18]. To restrict the DC-link voltage ripple to ±1%, an E-cap of ≈6 mF is required for a 100 W -inverter operating at 60 Hz with 48 V -DC-link voltage [19], the Fig. 2(a) depicts this issue. An injection of 2ω−ripple into the fuel cell causes fuel-starvation and stress on the membrane [20]. The low frequency ripples (<400 Hz) should be kept < 10% for the long life expectancy [21], [22]. In [21], it is established that for a solid-oxide fuel-cell, a 17%-reduction in the peak-value of current ripple (from 22% to 5%) improves its efficiency by 5% that can go upto 9% for the ripple compensation by 31%. In PFC based LED lighting, the low frequency causes the flickering effect [19], [23], [24]. In the MPPT operation of the solar-PV or fuel cell, a pulsation of the 2ω−ripple about the maximum power points (MPPs) of the power/current/voltage may shift the actual MPPs. According to [25], a decrease of 5% in the efficiency and power of the solar-PV with MPPT operation is observed for an 8% ripple in the rms value of MPPs. In the Fig. 2(b), the effect of the 2ω−ripple on the MPPs is shown using P-V diagram [26]. Table 1 summarizes the Section II(B). The injection of 2ω-ripple into the battery causes heating effect. According to [28], a current ripple more than 8% may badly affect the electrodes and electrolyte of the battery and reduces the performance and efficiency of the system. Moreover, ripple increases the voltage/current stress on the system components [34], [35].

III. CLASSIFICATION OF RIPPLE MITIGATION METHODS
The propagation of 2ω-ripple towards the DC source can be avoided by storing the 2ω-power ripple in a large E-cap at the DC-link (at the input of inverter) or forcing the voltage to swing at 2ω directly at the DC-link itself or allowing the indirect voltage-swing across the film capacitor (other than at DC-link) through a power electronics based control. Besides this, the control-oriented techniques can directly be used in the two-stage DC-DC-AC converters and single-stage inverters with the front-end control-capability; this eliminates the necessity of additional active filter. Some control-oriented techniques are the output-impedance shaping, loop-bandwidth shaping in dual-loop control, generation of the ripple-free reference of the input current and forcing the ripple flow in the direction other than the DC source. In general, these different techniques can be classified as (i) passive power-decoupling techniques (PPTs) (ii) active power-decoupling techniques (APTs), and its sub-category (iii) control-oriented compensation techniques (CCTs) for inverter with front-end converter or in-built front-end control circuit. These techniques can be implemented (a) at DC side of the inverter and (b) at AC side of the inverter; a mixed-type arrangement. The Fig. 3 and Fig. 4 depict basic methodologies and control techniques of 2ω−ripple mitigation.

A. PASSIVE POWER-DECOUPLING TECHNIQUES
PPTs are conventional and easy to implement without using control schemes. The topologies shown in the Fig. 5(a-b) are the conventional stand-alone voltage source converter (VSC) [36]- [38] and grid-connected (VSC) [39]- [41] respectively. Some of the isolated topologies are shown in the Fig. 5(c)-(d)-(f). A flyback-type center-tapped inverter (see Fig. 5(c)) is proposed in [42] for the isolated operation. The Fig. 5(d) shows a high frequency-link two-stage DC-DC converter for the high power applications [43], [50]- [52]. The converter shown in Fig. 5(e) can step-up/down voltage     [36]. (b) Grid-tied-Voltage source converter [39]. (c) Flyback-type center-tapped inverter [42]. (d) Inverter with front-end dual-bridge converter with high-frequency DC-link [43]. (e) Transformer-less buck and boost inverter topology [44]. (f) Pulse-link DC-AC converter [45]. (g) Two-stage DC-DC-AC converter (having a front-end buck or boost or buck-boost DC-DC converter) [46]. (h) Z-source inverter. (i) Quasi-Z source inverter. (j) Quasi-switched boost inverter. (k) Three-level single-phase impedance source inverter( Fig. 5(h-k) [47]- [49]). without using a front-end DC-DC converter or a transformer [44]. All these topologies use a large electrolytic capacitor at the DC link [53]- [55]. The large size inductors used in the current-fed inverter can minimize the ripple at the input [56], and also by employing a tuned-resonant filter at the DC-link, the 2ω−ripple can be decoupled [57]. In [45], authors have proposed a pulse-link DC-AC converter (see Fig. 5(f)). In this topology L 2 C 2 makes the resonating tank. This resonant-filter is tuned at 2ω such that the most of 2ω−ripple passes through the low impedance L 2 C 2branch when the resonance frequency (ω o ) matches with 2ω. The two-stage DC-DC-AC converter are popular in the RE energy applications [46], [58]- [60] (see Fig.5(g)).
Conventionally, a large size E-cap is used at the DC link in these topologies. These topologies still have a challenge of accidental short-circuiting of the switches in the same leg(s) of the inverter [61]. The impedance-source inverters (ISIs) [47]- [49] are the good choice in such limitations and operating conditions. However, these topologies require large size impedance-source network to filter low-frequency 2ω−ripple [62]- [64]. In Fig.5(h-k), Z-source inverter, quasi-Z source inverter and quasi-switched boost inverter are shown.

B. ACTIVE POWER-DECOUPLING TECHNIQUES
Generally, APTs use additional power electronic devices and energy buffer especially a thin film capacitor. An inductor is also required to transfer 2ω-power ripple between the coupling point of active filter at the DC or AC side of the main circuit and the buffer capacitor connection point. The ripple control scheme is combined with the main control. In general, the control aims to balance the required 2ω-ripple power in the system by exchanging the reserved power of buffer capacitor in the active filter. Nevertheless, a proper selection of the film capacitor is a priori to keep the design optimum. The minimum size of the filter capacitor required in the different APTs is tabulated in the Table 2.   [65]. (b) ALFRCD with cascaded capacitor [66]. (c) Current control loop of ALFRCD with virtual cascaded capacitor [66]. (d) Bidirectional-buck type APT [67], [68]. (e) FB-RCR circuit [68], [69]. (f) Ripple-port circuit [19]. (g) Dual-voltage control decoupling strategy using a symmetric half-bridge circuit with H-bridge [70], [71]. (h) Dependent power decoupling with two-phase legs [1], [72], [73] and (i) [73], [74]. (j) Series power decoupling technique with two legs [75] and three legs [76].

1) APTs AT DC SIDE/LINK
In the DC side arrangement, the active power decoupling circuit is directly shunted at the DC-link by replacing the large size E-cap (see Fig. 6(a) to Fig.6(g).
These topologies are independent of the H-Bridge of the DC-AC power converter. The circuits in the Fig. 6(h) and Fig. 6(i) are the dependent decoupling circuits and utilize a part of the H-Bridge. Recently, some series power decoupling technique as shown in Fig. 6(j) are proposed [75]- [77]. This type of decoupling techniques add a series active decoupling circuit between the source and H-Bridge. In general, the active filter topologies are buck-type, boosttype, buck-boost type [65]- [67], [69], [78]- [81] and H-bridge type [19], [69], [82], [83], and the basic principle of ripple decoupling in the APTs using active filter (especially H-bridge type) at the DC-side is as follows [19]. Suppose C FC is the film capacitor for power decoupling in active filter.
The voltage across the film capacitor is v c is given by, Here V c m is maximum value of the capacitor voltage and ϕ is an arbitrary phase-angle. The current through the capacitor is, The decoupling power ripple is given by, The 2ω-power ripple at DC-link is equal to p FC . Applying power ripple balance at the DC-link and using (1cc) Working principle of (a) CPS-PAF [65], [69] (b) ripple port control [19].
and (11c), Solving (13) gives, The active filter decouples 2ω power ripple if (14) holds and P o = 0.5C FC V 2 c m ω is satisfied by some value of V c m . The control adjusts ϕ and V c m to buffer 2ω-power ripple.
In [65], a current pulsation smoothing-parallel active filter (CPS-PAF) is proposed. The CPS-PAF consists of a small film capacitor and a conventional non-isolated buck/boost circuit (see Fig. 6(a)). This circuit behaves like a currentsource. The working principle of power decoupling is shown in the Fig. 7(a) [65], [69]. In Fig. 6(a), the controller continuously compares the input current (I in ) with instantaneous value of the DC-link current (i o (ωt)). For I in > i o (ωt) in interval 0 − π/4 and 3π/4 − π, the capacitor C FC stores energy (boost-mode) and for I in < i o (ωt) in interval π/4 − 3π/4 releases the energy (buck-mode). For energy stored (say E 1 + E 3 ) equals to energy released (say E 2 ) by C FC , the low frequency pulsation at the DC-link is zero. C HF takes care of high frequency ripples. However, the active power imbalance between input and output of PAF and the power loss of PAF cause a decrease in the voltage of C FC resulting in a lower value of V c than the DC-link voltage. In such case the PAF gets short-circuit the input and output and ripple elimination is affected [69]. To resolve this problem, a mixed type APT version of CPS-PAF is proposed in [65] (see Fig. 9(f)). The grid feeds the rectified power to C FC through the line transformer to compensate the losses. However, the system becomes bulky and complex. In Fig. 6(b), a buck-boost type active low-frequency ripple control device (ALFRCD) is shown that is proposed in [66] for the building-integrated photo-voltaic (BIPV) systems. The concept of ripple mitigation using ALFRCD is same as presented in [65]. However, in [66], a virtual capacitor is added in series with the inductor of the active filter through the control (see Fig. 6(b)). The virtual capacitor is realized by adding an integrator in the current control-loop (see Fig. 6(c)).
The control scheme forces the output current of the active filter (i o ) to track the DC-link current (i inv ).
The important requirement of this scheme is to keep the voltage of the film capacitor (C FC ) higher than the bus voltage. Wang et al. proposed a similar bidirectional buck type-APT (see Fig. 6(d)) in [67]. The working principle of the power ripple decoupling control scheme is same as in [65] (see Fig. 7(a)). In [67], a DCM control scheme is used such that the C FC stores all the 2ω−ripple and L functions like a power transfer element. Therefore, L does not store decoupling power that is good in terms of the power-density. Also, unlike CPS-PAF, the voltage of C FC is less than the DC bus or DC-link voltage or any other voltage in the system. It is to be noted that the discontinuous current mode (DCM) operation of the front-end DC-DC converter of two-stage converter minimizes the input 2ω-ripple inherently due to the less interaction of DC source and DC-link during discontinuous operation [84]. The buck-derived and boost-derived two-stage converter has minimum 2ω−ripple at the input in the DCM operation. A four-switch based bidirectional fullbridge-ripple current reduction (FB-RCR) circuit is shown in the Fig. 6(e) [69], [75]. The working principle of the FB-RCR is same as of CPS-PAF of [65]. However, unlike [65], there is no requirement of the line-frequency transformer with the rectifier. The internal energy losses which are the cause of constant voltage decrease of C FC in the FB-RCR circuit are compensated by sourcing power from the input source itself. However, the FB-RCR circuit contains four switches which operate at the high frequency. Therefore, the system becomes bulky and the switching loss increases. A similar APT based on the ripple-port concept is presented in [19] (see Fig. 6(f)). The control design is based on (9)- (14). The working principle of this technique is depicted in the Fig. 7(b). In the Fig. 6(f) and Fig. 7(b), φ is the phase difference between the instantaneous voltage of the film capacitor (v FC ) across C FC and output voltage of inverter (v ac ), and θ is the displacement angle between instantaneous value of v ac and i ac .
In [70], Tang et al. have proposed a dual voltage control strategy for the symmetric half-bridge circuit with H-bridge. The circuit diagram is shown in the Fig. 6(g). The two capacitors (C 1 , C 2 ) are used to decouple the power ripple. The control scheme aims to modulate the switches of half bridge such that the voltages across the two capacitors are equal and 2ω-pulsating voltage component over the offsets of voltages are out of phase by 180 • . Following the power balancing condition, the required power decoupling condition is, Here I rms and V rms are rms values of AC current and voltage. I m is maximum current of AC current.
V c is rms offset-voltage of capacitors. ϕ is phase difference between the grid voltage and pulsing voltage in the capacitor. VOLUME 8, 2020 FIGURE 8. quasi-ZSI with DC-side (a) boost-type active filter [85] (b) bidirectional buck-boost type active filter [86] (c) battery module [87] and (d) boost-type APT [66] for single-phase switched boost inverter [88].
The active power decoupling techniques shown in the Fig. 6(h) and Fig. 6(i) share at least one of the phase of H-bridge and active filter. Therefore, such APTs are dependent on the H-bridge. This affects the modulation signal of inverter. In the two-phase legs topologies (see Fig. 6(h-i)), the DC voltage utilization is always kept ≤ 0.5 to avoid the over-modulation and to keep the size of film capacitor minimum.
In the impedance source inverters, the minimization of size of impedance network in the presence of 2ω−ripple is a challenge. In [85], a hysteresis current controlled active filter is proposed to confine 2ω-ripple within the active filter (see Fig. 8(a)). The control logic is same as shown in the Fig. 7(a). However, the ripple control design for the quasi-ZSI is somewhat more challenging than the H-bridge converter. A bidirectional buck-boost type active filter for quasi-ZSI is shown in the Fig. 8(b) [86]. The design of active filter is similar as shown in the Fig. 6(d). In [87], a comprehensive design of asymmetric ZS-network in the perspective of high frequency and low frequency ripple minimization is discussed the first time. The optimum design of ZS network is presented for a battery energy-stored quasi-Z source inverter (see Fig. 8(c)). A study on 2ω−power decoupling in switched boost inverter is carried out in [88] (see Fig. 8(d)). The boost-type APT proposed in [66] is used in this work. As discussed before, the E-cap is most vulnerable component, a pre-analysis of the effect of impedance network of quasi-ZSI and shoot-through duty on the remaining useful life of E-cap may help designers to predict the overall life of system [89].

2) APTs AT AC SIDE; A MIXED TYPE ARRANGEMENT
This arrangement of APT utilizes a part of DC side and a part of AC side of the main circuit, and the active filter generally shares atleast one leg of the inverter. The AC-side power decoupling techniques improve the power conversion efficiency in comparison to the DC-side power as the low frequency power pulsations are forced to confine at the AC-side [90], [91]. Some of recent AC side APTs are shown in the Fig. 9. In [1], Serban has proposed an APT using two decoupling capacitors at the AC-side (see Fig. 9(a)).
The technique does not add extra power electronics to main circuit. However, the DC-link voltage and current loading of the inverter set a trade-off for the values of decoupling capacitors. Consequently, the efficiency of system is affected. The utilization factor of storage elements is < 50%. The circuits of Fig. 9(b-g) add extra switches to the system. The inclusion of third leg with the H-Bridge reduces the stress on the switches by 57% in comparison to H-Bridge [93], [96]. Zhu et al. in [91] proposed a ripple confinement control technique for the circuit shown in Fig. 9(b). This technique implements a voltage waveform control [90] to confine the pulsating power within the capacitors at AC-side. A brief explanation of the waveform control is presented in the subsection III(D). A 100% utilization of the storage elements can be achieved using this method. However, this technique adds an extra pair of switches (see Fig. 9(b)) and increases the voltage-stress on the capacitors. In [92], Chen et al. have proposed a 2ω-power pulsation mitigation at the DC-link using the SVPWM method for the circuit proposed in [97] (see Fig. 9(c)). This technique eliminates capacitance and minimizes voltage and current stress on the switches for a range of the power factor. However, two extra switches are required and the total device power rating is increased by 50%. An APT for grid connected AC-DC power converter as shown in the Fig. 9(d) is proposed in [93]. This APT significantly reduces the size of DC-link capacitor. The stress on switches is reduced up to 70% for all the power factor. The study analyzes the effect of grid-side inductance as well and provides design guidelines for different system parameter for the practical implementation. Another APT is proposed in [94] for microinverter applications; a problem  [91] (c) proposed in [92] (d) proposed in [93] (e) proposed in [94] (f) Modified version of CPS-PAF scheme based circuit in Fig. 6(a) [65] (g) Hybrid filter [57] (h) proposed in [95].
from the Google little box challenge. The proposed technique is implemented on the GaN-based 3φ−inverter topology as shown in the Fig. 9(e). In the circuit of Fig. 9(e), the load is fed between the phase a and b and the decoupling circuit is placed between phase b and c. The basic principle of ripple cancellation is that the control keeps the sum of instantaneous powers p a−b and p b−c a constant value. Therefore, the ripple is confined within the AC side decoupling circuit and DC side becomes ripple-free. The GaN switches have comparatively better figure of merits such as low on-state conduction loss, wide-band gap, switching frequency and efficiency. A similar topology is presented in [97]. In [57], a hybrid filter is proposed as shown in Fig. 9(g). In the hybrid filter, there are three legs. The ripple energy is stored in both, capacitor C 1 and inductor, L. Using Kirchhoff's current Law at A in Fig. 9(g), In Fig. 9(g), for C 2 C 1 the i C2 can be neglected in (16), The hybrid filter generates i 2 such that i 1 = i 2 . For this the inductor current is controlled to keep the voltage across C 2 constant. However, the voltage v c2 keeps on decreasing due to internal loss of filter. The hybrid filter alone is not sufficient. Therefore, an additional leg (switches T 5 , T 6 ) is added to import the energy from the grid as shown in Fig. 9(g). This is a mixed type APT. Nevertheless, a small capacitor can be used for the power decoupling. However, the extra switches in third leg make the circuit bulky. In [95], authors presented a single-phase inverter topology that is a combination of front-end boost stage, a half-bridge inverter stage, and a buck-boost type power decoupling stage (see Fig, 9(h)). The size of decoupling capacitor used in this work is optimized based on efficiency of converter, average dc-link voltage, and dc voltage utilization factor of the capacitors. An AC side active filter is proposed for the quasi-ZSI in [63]. The control confines 2ω ripple within the LC of filter using a third leg besides the H-bridge (see Fig. 10). The control aims to switch the third leg such that 2ω-ripple energy stored in L and C FC of filter is exchanged; the power decoupling principle is same as presented in [19]. However, the energy stored in inductor is also considered. In Fig. 10, the decoupling ripple power between B and C is given by, To decouple the 2ω−power ripple, the addition of the 2ω−ripple power component of (1cc) and p FC in (18bb) should equate to zero i.e. p r + p FC = 0. This implies, Here V c m is the maximum value of the voltage across the C FC and i FC is the current through L. P o = 0.5V rms I rms .
To decouple the power ripple the control follows P o = 0.5V 2 c m C FC (1 − ω 2 LC FC ) and θ = −0.5ϕ + π 4 . Recently, a research has been conducted on high frequency ripple at source in the impedance source inverters [102], [103]. However, the focus of this review work is low-frequency ripple (2ω−ripple) hence effect of high frequency is not covered here.

C. CONTROL-ORIENTED COMPENSATION TECHNIQUES (CCTs)
Two-stage DC-DC-AC converters and single-stage DC-AC converters with front-end control capability can mitigate the ripple at input using the suitable control, this eliminates the necessity of active filter. The main concept is to design a control scheme that restricts the propagation of 2ω−ripple towards the DC source(s) while forcing the ripple to confine at the DC link. However, this causes a deliberated increase in 2ω-pulsation at the DC-link. This may affect the THD level of output of the inverter. According to European standards (EN50160) for the public distribution systems, the low frequency voltage pulsation of the DC bus-voltage should be kept within 2% range and the THD level of output of the inverter should be kept within 5% [104]. Therefore, an optimum design of the DC-link capacitor is involved. The ripple can be eliminated completely by using an active filter at the DC bus. The Fig. 11 shows block diagrams of the stand-alone and grid-connected DC-DC-AC converter with active-filter and without active-filter at the DC-link.  with a ripple-mitigation compensator [34]. The control block-diagram is shown in the Fig. 12(a). The control generates a duty (D o ) for the DC voltage regulation in the closed-loop. A feed-forward controller takes care of the 2ω−ripple by adding ripple-cancellation duty (D r ) to D o . To reduce the ripple further, a perturbed duty ( D) is generated using the current control-loop and added to give overall duty (D = D o + D r + D). However, the performance of the feed-forward controllers are poor in terms of disturbance rejection and robustness against parametric uncertainty [105]. Feedback control approaches are widely used in the different applications such as tracking, regulation, disturbance rejection, robust control. In literature, the concept of the ripple-mitigation using the feed-back control in the two-stage converters is put forward in the two perspective. First one is based on the adopting a modified dual-loop control method. The method utilizes a current mode control (CMC) scheme. Second method is based on the output-impedance shaping. The method of output-impedance shaping can be implemented in a voltage mode control (VMC) i.e. using a single control loop also.
The CMC-based dual-loop control method has an inner current-loop and an outer voltage-loop. To ensure the ripple-reduction at the input of the two-stage converter, the interaction between the inner-loop and outer-loop is avoided such that disturbances in the voltage-loop do not pass to the current-loop [17], [105], [106]. One way to achieve this is to make a separate current-loop control and voltage-loop control as shown in the Fig. 12(b) [105]. However, in such schemes, the current-loop of the first-stage should be designed to get a very high gain at 2ω. This makes the real-time implementation challenging due to hardware limitations [105]. Liu and Lai have proposed a dual-loop control method for the front-end converter of a fuel-cell sourced DC-DC-AC converter [106]. The Fig. 12(c) depicts the dual-loop control method. The basic concept of the ripple reduction proposed in [106] is based on the bandwidthshaping. Instead of making the independent current-loop and voltage-loop, the bandwidth (BW) of voltage-loop is reduced significantly. According to [106], a reduction in the 2ω−ripple at the input can be achieved provided that the BWs of inner-loop and the outer-loop have a separation of half-decade (at least) from 2ω frequency. The basic idea is the minimization of 2ω−ripple component in the reference current of the inner-loop controller. However, the very low BW of the voltage-loop causes the sluggish or poor system response at the load transients. Therefore, this method has a trade-off between the 2ω−ripple-reduction and dynamic performance. In Fig. 14 Table 3.
Recently, 2ω-ripple problem is addressed in conjunction with the hybrid parameters of DC-DC converter. These parameters relate the input-output behavior of DC-DC converter. A general input-output relation using the hybrid parameters of two-port network (see Fig. 13) is given by [108], Z o (s) and Y i (s) are output impedance and input admittance respectively, generally used for the stability analysis of the cascaded system. A o (s) is audio-susceptibility parameter used for the estimation of input-output noise-transmission and   Fig. 14). A i (s) is the back-current gain parameter. The parameters Z o (s) and A i (s) are used for the 2ω−ripple mitigation in the two-stage converters. However, Z o (s) parameter is widely explored in the output impedance shaping methods and a few methods have used A i (s) parameter (see Fig. 18) [108].
In the output-impedance shaping method, the control modifies the output-impedance of the front-end DC-DC converter such that the 2ω−ripple see more impedance in the direction of DC source. This method achieves the ripple-suppression at the input, however the control causes poor dynamic performance of system; the high output-impedance of system leads to poor system dynamics [109], [110]. In both the methods (i.e. dual-loop control method and output-impedance-shaping), there is a need to maintain the sufficient bandwidth of the voltage-loop throughout the desired frequency band of the operation.
Recently, some modified and improved control techniques have been proposed using the above mentioned concepts to minimize the 2ω−ripple at the DC input and to improve the system response simultaneously [17], [33], [58], [105], [108], [111]- [118]. These control schemes use resonant filters, for instance, notch-filter (NF) or band-pass filter (BPF) in the current or voltage loop. The basic principle is to minimize the 2ω-ripple in the reference of input current or to sufficiently reduce the bandwidth of the voltage-loop at 2ω only while maintaining high bandwidth of the voltage-loop at the other frequencies. The similar methods have been presented in the context of the power-factor correction (PFC) AC-DC converter [13], [14], [74], [119], [120]. However, the focus of this work is limited to review the existing literature in the context of the DC-AC power converter or inverter. The band-pass filter (BPF) and notch filter (NF) are generally used to mitigate the 2ω−ripple without affecting the dynamic performance of the system. The characteristics of BPF and NF are shown in the Fig. 15(a) and Fig. 15(b) using the Bodeplot. The BPF allows to pass a certain range of the frequencies of the input signal. The output signal leads the input signal by π/2 rad in 0 to ω o range and lags by π/2 rad beyond the ω o . Therefore, a total of π rad phase-shift occurs. The NF filter has inverse characteristics of the BPF. The NF allows all the frequencies except the frequencies located in a very narrow range of the resonance frequency (ω o ). A notch-filter also gives a phase-change of π rad for a transform of the input signal to the output signal, the phase is negative for the frequencies below ω o .
In [16], the authors have proposed NF-added to the voltage-loop in the dual-loop control for a standalone DC-DC-AC converter. The reference inductor current is generated by passing the output of voltage controller through NF. Therefore, the method is named as notch-filter inserted current reference (NF-CR) scheme. The control block-diagram is shown in the Fig. 15(c). The NF attenuates 2ω-signal in reference of the inductor current. This minimizes the 2ω−ripple in input current. In [105], a control scheme is proposed for a grid-connected two-stage converter. A current controller is used with the first-stage and DC bus control is achieved by the grid-connected DC-AC converter. The method adopts a grid-side based 2ω-ripple compensation. A quasi-notch filter (quasi-NF) is added in the voltage-loop of the second-stage of the converter. The transfer function of quasi-NF is, Here, Quality factor, Q is related as |Q| dB = |Q p | dB − |Q z | dB . |Q z | dB and |Q p | dB are the quality factors of zero and pole respectively. The quasi-NF provides a much smaller voltage-loop gain than the current-loop gain at 2ω. This minimizes the 2ω−ripple at the input. This method retains the good dynamic performance of the system at all other frequency except the frequencies about and at 2ω. However, Q of the quasi-NF should be designed properly. Similar to [105], an another grid-side based 2ω-ripple compensation is adopted in [17]. The control scheme is shown in the Fig. 15(d). The control avoids the interaction of current-loop and voltage-loop at 2ω. However, the control design is involved to develop an LTI model from the time varying system model (see Fig. 15(d)); the two multiplications just before and after the current controller (CC) make model time varying. All three methods discussed above use notch filter. The use of the notch-filter may introduce a significant negative phase-shift to the frequencies lower than the characteristic frequency of notch filter [115]. This may introduce instability to the system. In [115], Zhang et al. have proposed a voltage mode control (VMC) based band-pass filter incorporated into the inductor feedback path for a buck-derived two-stage converter (see Fig. 16(a-c)). The method is based on the output-impedance shaping. In Fig. 16(a), a virtual impedance (Z v (s)) is added in series with the inductor. The concept is, to increase the impedance of inductor branch at 2ω frequency  such that the impedance of DC-link capacitor branch is less than the impedance of inductor branch. This compels the 2ω−ripple to pass through the capacitor instead of the inductor branch. Using Fig. 16(b), the impedance of the inductor branch is, Here, G v is voltage-loop controller, H v is voltage sensor gain, V m is PWM gain. Z v (s) is the virtual impedance added in the current feedback path. Suppose Z v (s) is a virtual resistance, say r v . Therefore, the method can be named as virtual resistance scheme (VRS) [115]. In (22), an increase in Z o (s) is achieved by increasing the value of r v . However, this decreases the magnitude of the loop-gain in the low frequency range [122]. To balance this, the gain of Gv(s) can be decreased. However, this reduces the bandwidth of voltage-loop and hence degrades the dynamic performance of the system. Therefore, there is a trade-off between the design of r v and bandwidth of the voltage-loop. Eventually, the results are the same as of the dual-loop control of [106]. This problem is solved by adding a BPF in the current feedback path instead of using a constant r v only (see Fig. 16(c)). The BPF is tuned at 2ω and hence provides a high gain at 2ω only. This adds a high virtual impedance in series of inductor branch at 2ω. This reduces 2ω−ripple at the DC input without affecting the dynamic performance. However, adding a BPF leads a −π/2 to π/2 phase-rotation about the characteristic frequency of the BPF. Therefore, in [58], Zhang et al. further extended their work to resolve the challenges of [115] by adopting the current mode control (CMC) approach for the buck-derived two-stage converter. The work has presented different improved control strategies. The first control strategy, namely notch filter-inserted load current feed-forward scheme (NF-LCFFS), is realized by adding an NF in the load current in a feed-forward way  (see Fig. 16(d)). It is worth noting that the load current feed-forward control schemes improve the dynamic performance at the load-transients [123]. Therefore, the dynamic performance of the system is better. The NF attenuates the 2ω-ripple in the current-loop, therefore the 2ω−ripple reduces at the input of the two-stage converter. However, the voltage-loop in the Fig. 16(d) may contaminate the reference current of the inner-loop. Therefore, a further improvement is proposed by merging NF-CR scheme of [16] with the NF-LCFFS, and hence called NF-CR+LCFFS. It is worth to note that the NF-CR scheme has an NF already to minimize 2ω-ripple from the current reference of the inner-loop. A simplified block diagram is shown in the Fig. 16(e) where the two NFs are transformed to one. A single NF added at the output of the summing point after the voltage controller eliminates the requirement of the two NFs. This scheme almost eliminates the 2ω−ripple and also improves the dynamic performance of the system. However, the feed-forward schemes are susceptible to the disturbances and lack of the robustness as mentioned before. Moreover, NF may induce instability to the system as it affects the bandwidth of the voltage-loop. A detailed analysis and comparison of the control schemes of [115] and [58] are presented in [33]. A voltage control mode based load-current feed-forward scheme (VMC-LCFFS) is proposed in [121]. The control block-diagram of the VMC-LCFFS is shown in the Fig. 17(a). The 2ω−ripple reduction utilizes the concept of modification in the reference value of DC-bus voltage in agreement with the desired pulsation in the DC bus voltage at 2ω. This makes DC-bus capacitor to have nearly all the 2ω−ripple. It is to be noted that the bus voltage is no longer constant but pulsates at 2ω (due to the addition of V cr term with V r ). A BPF is required with the load current feed-forward path to take-out the 2ω−ripple from the load current (i o ) which then generates a desired V cr that is to be added in V r . The presence of integrator in the LCFFS path result into continuous integration action. This results into the rapid growth of the DC-bias in the LCFFS controller that leads to incorrect voltage tracking. Therefore, a high-pass filter (HPF) is also added at the end of LCFF path (see Fig. 17(b)). The scheme minimizes the 2ω−ripple while retaining the good dynamic performance. However, the control design is involved and the control of the VMC-LCFFS depends on the accuracy of the system parameters. A simple CMC-based control method for the said problem is proposed in [111]. This control scheme is similar to the control scheme proposed in [121]. The control block diagram is shown in the Fig. 17(c). The DC-link voltage reference is modified by adding V c 2ω . The V c 2ω is extracted by passing the DC-link voltage through a BPF. The modified reference voltage V cr new having 2ω voltage ripple cancels 2ω-voltage ripple of the actual DC-link voltage (v c ). This results in a ripple-free current reference in the current controlloop. A comparison of these control schemes is given in the [33] in the perspective of the output-impedance shaping. A similar control scheme i.e. BPF-incorporated capacitor voltage feedback scheme (BPF-CVFS) as presented in [111] is discussed in [33]. However, this control scheme is based on VMC method unlike the CMC method of [111]. The block-diagram of BPF-CVFS is shown in the Fig. 17(d-f). These all control schemes of [58], [115] are discussed for a buck-derived DC-DC-AC converter. These schemes are further explored for the boost converter in [117].
An effective use of the NF and BPF is proposed in [108] with the back-current gain based approach (using A i (s)). The control block-diagrams are shown in the Fig. 18(a-b). A i (s) relates input current (i in (s) with the output current (i o (s) of a system (e.g. DC-DC converter). In [108], it is established that for a VMC based control, the voltage-loop has a little effect on the 2ω-ripple attenuation. However, the 2ωripple reduction can be achieved for ω o < 2ω. ω o is the resonance frequency of LC circuit of the DC-DC converter. This is achieved by using average CMC scheme. However, this scheme also trade-off between ripple-reduction and dynamic performance. Therefore, further improvements in the back-current gain control scheme are made using (i) NF embedded in the voltage feedback branch and (ii) BPF embedded in the current feedback branch.
An 2ω−ripple mitigation technique is proposed in [124] for a fuel-cell sourced current-fed dual half bridge (CF-DHB) converter. A phase-shift control scheme is adopted that regulates the DC voltage and minimize the 2ω−ripple. The optimized duty is set to 0.5. The PI controls the DC-link voltage and a proportional resonant (PR) controller (tuned at 2ω) suppresses 2ω−ripple at the source. The PR controller modifies the main phase-shift angle to eliminates the input current ripple. The PR controller is similar to an integrator having infinite DC gain at characteristic frequency. Tuning PR to very low ω o forces a difficult implementation of it on the low cost controller board (such as 16-bit DSP) [125]. In [126], authors have proposed a sinusoidal charging scheme for the dual-active-bridge based Si-charger and GaN-charger with the reduction in size of the capacitor at the DC-link using resonant controller and rotating frame control approach. The objective is achieved by injecting 2ω-ripple into the battery for the charging purpose. The size of DC-link capacitor decreases to 84% for Si-charger and 90% for GaN charger. However, this advantage comes after the ripple injection to the battery. The recent studies have addressed several detrimental effects of 2ω−ripple on the battery life [28]. Therefore, a long-term testing is needed for such schemes. In [118], Liu et al. have proposed a novel ripple compensator for a boost-derived-PV grid-connected inverter with batterystorage. The control scheme utilizes a double channel current feedback control to minimize the 2ω−ripple in the input current. The basic idea is to regulate the 2ω-voltage ripple in the DC-link voltage by adding a small disturbance of 2ω (say D f ) in the average duty (D o ). The Fig. 19(a) shows the control block-diagram. In the Fig. 19(a), G f is a third-order general integrator (ToGI) filter (see Fig. 19(b)) to extract 2ω-component. A grid-side based bus voltage control is adopted. The voltage error of voltage-loop is passed through an NF. This eliminates the 2ω−component from the grid-side  [64] (c) The low-pass filter based control scheme proposed in [62] (d) control scheme proposed in [101].
current reference. The current-error in the current-loop of the bus-voltage control is passed through proportional-resonant controller, this control the sinusoidal waveform of the grid current. A gain is multiplied with the output of G f to regulate the value of 2ω−ripple. A large value of the gain minimizes the 2ω−ripple. However, this may induce instability to the system. Therefore, there is a trade-off between the stability and the ripple-reduction using a current feedback in the double-channel current feedback control. Use of multiple integrator in the 2ω−ripple-filter design may slow down the system dynamics. In [127], authors have proposed a dual-loop control for the boost-derived two-stage converter. The control scheme uses a moving average filter (MAF) in the voltage-loop to make the voltage-loop gain very low at 2ω. The control block diagram is shown in the Fig. 19(c). This scheme is similar to NF-CR of [16]. However, unlike NF-CR, this scheme can attenuates multiple of 2ω as well. In [112], another control scheme based on the MAF is proposed to control the swinging bus. The MAF has several advantages such as fastest step response, easy to implement using low-cost control-board, reduces random noise and notches the multiple of 2ω. However, the performance of MAF based on time-domain is better than the frequency-domain.
ZSI, quasi-ZSI, quasi-SBI eliminates the requirement of multiple stages. They can boost the input voltage and are capable of the shoot-through operation. In [64], authors have proposed a modified shoot-through duty based unipolar-SPWM technique as shown in the Fig. 20(b). The conventional technique is shown in the Fig. 20(a). The control forces the voltage across the capacitors of quasi-ZSI network to swing at 2ω or to store the all 2ω-decoupling power. This reduces the ripple at the DC input. However, in comparison to conventional method, the modified scheme introduces more voltage stress on the switches i.e. 53% more than conventional scheme. An optimum design of the quasi-ZSI network parameters is given in [62]. However, a part of the 2ω−ripple still flows through the quasi-ZSI network. The inductors store the decoupling power temporarily. It is better to transfer the stored decoupling power to capacitors; the power density of the capacitor is higher than inductor. Therefore, a PI regulator based control scheme is proposed in [62]; the control scheme is shown in the Fig. 20(c). The input current is passed through a low pass filter. This gives the DC current component which then subtracted from the actual input current to give 2ω−ripple. A PI controller generates the required pulsation in the equivalent shoot-through duty. The control scheme confines the ripple in capacitors and minimizes in the inductor current and input current. However, this method has a trade-off between stability and speed of response. In [101], a new quasi-SBI topology for the high voltage gain with a benefit of 2ω−ripple reduction is proposed. A thorough study is carried out to design the impedance network. A control scheme is added to keep the input ripple-free. The control method is shown in the Fig. 20(d). The voltages of capacitors are added and then subtracted from the reference voltage. The DC-link voltage reference is generated based on the output voltage and modulation index. The voltage error is regulated to generate desired shoot-through duty. The application of this topology is limited to the low-power applications.
The non-linear control approaches are robust and suitable for system having large line-load transients. In [59], authors have proposed a dual-loop control method for the boost-derived-DC-DC-AC converter (see Fig. 21(a)). The ripple-reduction is achieved by adopting the output-impedance shaping. The control utilizes a sampled series feedback as the inner-loop. The series-feedback increases the output-impedance of front-end converter. A parallel feedback is added as outer-loop to regulate the DC-link voltage. However, the two feedback channels impose trade-off between the system dynamics and the ripplereduction. Therefore, a non-linear compensator is added in between the voltage-error generation point and current controller. The non-linear compensator gives high gain at the load-transients to compensate the undershoot/overshoot in the DC-link voltage. However, an abrupt change in the gain may induce instability to the system. Therefore, a fine design of the non-linear compensator is required. A swing bus-voltage control is proposed in [128] for a stand-alone fuel-cell buck-derived two-stage converter. A nonlinear natural switching surface (NSS) based boundary control takes care of the very large input voltage-swing at 2ω. The controller minimizes the DC-link voltage swing and hence distortion in the output AC voltage. However, the practical implementation of such discontinuous variable frequency schemes based on the sliding mode control may introduce chattering effect in the switching [129]. In [130], [131], authors have proposed an adaptive switching function to minimize the 2ω−ripple at the input of the boost-derived two-stage converter using the fixed-frequency based-SMC. The switching function is a combination of the inductor current error (e 1 ) and α times voltage error (e 2 ). α is power function of the e 2 i.e. α = ψe β 2 . β and ψ are design parameters. The profile of α is shown in the Fig. 21(b). For a very small value of α, the output-impedance is high, hence the ripple reduces at the input. At the line-load transients, α changes monotonically to converge the system dynamics at a faster rate. In [132], authors have proposed a SMC based phase cancellation technique for an 1 − φ grid-connected Quasi-Z-Source NPC Inverter. To cancel 2ω−ripple the existing phase difference of π rad/s between capacitor voltage and inductor voltage at DC side is used.
It is to be noted that the control schemes presented in this Section still require a large size capacitor or an optimized value of the capacitance at the DC-link at the input-end of DC-AC converter [133]. The pulsation at DC-link are kept within the desired limit by choosing an optimum size of DC-link capacitor. Though the system performance at line-load transients is better despite the optimum size of DC-link capacitor which is achieved by different linear or nonlinear control approaches. To further minimize or eliminate 2ω-pulsation in the voltage at DC-link, an auxiliary circuit/active filter is added. In the next subsection, two-stage DC-DC-AC converter with the additional active filter are discussed.

2) CONTROL-ORIENTED COMPENSATION TECHNIQUES WITH ADDITIONAL ACTIVE FILTER
In [82], an active filter circuit connected at DC bus as shown in the Fig. 22(a) is proposed for the boost-derived two-stage converter. This filter is similar to the filter proposed in [69]. An SMC based nonlinear control techniques is used in [82]. The sliding mode controller regulates the active filter such that the filter injects a suitable compensation current in the DC-bus to cancel the effect of the 2ω-ripple. The compensation current is generated using ADLINE neural filter. However, the design of the neural filter is a challenge. The voltage of the C b in the Fig. 22(a) should kept higher than the DC-bus voltage. Therefore, the system has a higher voltage than DC-link that causes the safety concern. A block diagram of the 360 W -Texas Instruments UCC28180EVM-573 front-end evaluation board integrated with the buck-boost type bidirectional active filter is shown in the Fig. 22(b) [134], [135]. To control the active filter, a multi-resonant direct voltage regulation technique is used to decouple the 2ω-power ripple at the DC-link. The control scheme makes the active filter to mimic an infinite capacitance parallel to the DClink. The active filter is controlled using a modified dual-loop control scheme as shown in the Fig. 22(c). The parallel resonant filters tuned at the multiple of 2ω are added in the voltage-loop. The filters attenuate multiple of 2ω components from the reference current of inner-loop. The multi-resonant resonant filters are similar to MAF used in [19]. At the load-transients, the voltages across the DC-link capacitor and active filter side capacitor show abnormal behavior and hence the load-transient behavior of the system is a challenge. For the circuit of active filter (buck/boost/buck-boost type) shown in the Fig. 22(d), an one-cycle control method has been proposed in [133]. The switches of active filter are controlled such that per cycle average value of the current at the output of the active filter tracks 2ω-current ripple at the DC-link. The control utilizes the peak-value of ripple storage capacitor, therefore a peak detector is required to realize the peak voltage control. An application of buck-boost type APT along with zero voltage switching is proposed in [138] to reduce the switching loss also. A bidirectional  [82] (b) active filter proposed in [134], [135] (c) control scheme for active filter proposed in [135] (d) active filter proposed in [133] (e) DALFRCC [136] (f) integrated H-bridge active filter and (g) auxiliary winding based H-bridge active filter proposed in [83] (h) Common-mode operation based technique for half-active bridge proposed in [98] (i) DC to single-phase AC grid-connected converter [137]. FIGURE 23. Some other topologies and ripple mitigation techniques:(a) Buck-type differential inverter (b) Boost-type differential inverter (c) Buck-Boost-type differential inverters ( Fig. 23(a-c) [90], [139]- [141])(d) Coupled-inductor based PV inverter [142] (e) Six-switch topology [143] (f) Flying capacitor based topology [81], [144] (g) Modified-boost-derived two-stage converter [145] (h) Cuk converter based five-switch single-phase inverter [146] (i) Flyback type single-phase utility interactive inverter [147]. dual-active low frequency ripple control circuit (DALFRCC) shown in the Fig. 22(e) can alleviate the ripple from the input and a 90% compensation of 2ω− voltage ripple at DC-bus can be achieved [136]. However, the active filter has eight switches. This makes the system costly and complex. Additionally, two linear neural filters are used to generate the compensation current commands corresponding to i a and i b (see in Fig. 22(e)). A sliding mode controller is proposed for the injection of compensation currents at DC bus and AC output terminal. However, design of the neural filters is complex and a challenge. The integrated and auxiliary winding based inverter topologies as shown in the Fig. 22(f) and Fig. 22(g) respectively are proposed in [83]. The active filter or ripple-port are the H-bridge inverter. The control scheme is based on the power ripple balancing given by (9)- (14). The active filter eliminates the large E-cap. However, the number of switching devices is increased. In [98], an economical active filter with no extra switching devices is proposed for an isolated half-active bridge two-stage DC-DC-AC converter. In the Fig. 22(h), the main circuit with active filter is shown. An LC filter circuit is connected between the center-taping connection point of the primary winding of the transformer and the return wire of the active-bridge at primary. The control scheme of LC filter is based on the common mode operation method. The control scheme reduces the size of the capacitor at the DC link and also the switching devices are the same as used in the conventional system. However, the rating of the switching devices is increased due to the flow of the active filter current in the transformer and the first-stage of the converter. The control of the active filter limits the transformation ratio of the transformer. Fig. 22(i) shows a circuit of a resonance type DC-DC converter, power decoupling circuit and current source inverter (CSI). The control scheme achieves a power decoupling by controlling the charging and discharging of the buffer capacitor (C FC ) such that the input power is equal to the output power. Therefore, the input is ripple-free while C FC takes all the pulsation. The resonance type DC-DC converter makes a series resonance circuit. The quality factor of this circuit should be kept very high in order to ensure stability. To improve the efficiency of the system, the size of the inductor in the resonating circuit should be decreased.

D. SOME OTHER TOPOLOGIES AND TECHNIQUES
In Fig. 23(a-c), the buck, boost and buck-boost differential inverter (DI) topologies are shown respectively [90], [139], [140]. In [148], a generalized power decoupling method is proposed for DI with the non-linear load. The proposed control techniques is similar to the control technique proposed in [135]. According to analysis presented in [148], the buck-type DI has lowest switch voltage stress and small decoupling capacitor. However, the DC-link voltage should be kept high. The boost-type DI requires low DC-link voltage. However, the voltage stress on the capacitors and current stress on the switches are high. The buck-boost type DI achieves the lowest DC-link voltage requirement and it can compensate the most of the harmonics. However, this topology suffers the highest switch-voltage stress. In [90], authors have proposed a waveform-control (WFC) method [149] based ripple-mitigation for a boost-type DI [141] as shown in the Fig. 23(b). A brief of the WFC is as follows [90].
In the Fig. 23(b), the voltage across the AC load is given by the sum of the voltages across the capacitors v c1 and v c2 . The two voltages are out of the phase. This implies, Here, V off is offset-voltage of capacitors. V m is maximum value of output AC voltage (v ac ) and ω is angular frequency of AC power supply. The instantaneous output AC voltage is, Basic idea of ripple-reduction is to reshape the waveform of voltages across the capacitors without affecting output AC voltage. For this, a function x(t) is added in (23b) as follows, with amplitude X and a phase φ with respect to the reference. For C 1 = C 2 = C, the current through the capacitors are, In the Fig. 23(b), the input current (i in ) is, Here, i L1 = i ac +i c1 , where i ac = I m sin(ωt) and D 1 and D 2 are the duty cycles of the switches S 1 and S 3 respectively. Using these in (27) gives, Clearly, to eliminate 2ω-ripple from the input current, 2ωcomponent of (28) should be zero. This gives, The waveform control method eliminates requirement of additional active filter. However, the performance of WFC may be affected by the tolerance of capacitors and inductors of DI [150]. An improved version of the WFC is proposed in [150] applying a rule based control (RBC) method on the WFC. In the RBC, the values of X and φ are perturbed accordingly to achieve ripple mitigation despite the variations in system parameters. However, in the RBC, a large perturbation may lead to the poor performance of ripple-reduction and very small perturbation may affect the dynamic performance of the system. To get rid-off dependence of WFC on the system components, authors of [150] further proposed an input current feedback control method in [151]. In [142], a coupled-inductor based PV inverter with an advantage of the power decoupling is proposed. The circuit of this topology is shown in the Fig. 23(d). An input voltage high bandwidth controller is proposed for this circuit to keep 2ω-ripple in the capacitor (C FC ). In this topology, the common-mode leakage is a problem due to its transformer-less configuration.
In [143], a six-switch topology is proposed (see Fig. 23(e)). This topology has a combined feature of the inverter and rectifier. The switch S 2 is shared by rectifier and inverter both. The phase difference of modulation references are varied to achieve 2ω-ripple reduction at the DC link. However, in this topology, the phase difference is constrained by the input and output unlike the conventional topology where the phase difference can be kept between −π rad to +π rad. A modified version of the conventional front-end DC-DC boost converter in a two-stage converter is proposed in [81], [144]. This topology uses flying capacitor in place of the large size electrolytic capacitor (see Fig. 23(f)). This capacitor is used for voltage boosting and 2ω-power-decoupling. The control scheme forces the voltage of the flying capacitor to fluctuate at 2ω to decouple the ripple instead of the DC-link voltage. An another modified version of the boost-derived two-stage converter is proposed in [145] (see Fig. 23(g)).
There are four switching modes of the operation. In the first and fourth modes, the modified boost-circuit functions like the conventional boost converter. In the second mode, the buffer capacitor is charged with the required decoupling energy and in the third mode, the stored energy is supplied to the inverter-load. Therefore, the DC-link capacitor is not required to supply the 2ω-ripple power. This makes the DC-link ripple-free. In [146], authors have proposed a Cuk converter based five-switch single-phase inverter topology (see (see Fig. 23(h)) for 2ω-ripple-mitigation. The interaction between input and output is avoided using a switching sequence to decouple the ripple at the input. A flyback type single-phase utility interactive inverter with the power-decoupling capability is proposed in [147]. The control achieves the ripple-free input current by storing the decoupling power in the capacitor, C FC of the circuit in Fig. 23(i). The proposed topology is simple, cost-effective and small in the size.

IV. CONCLUSIVE DISCUSSION AND CHALLENGES
This paper has reviewed several passive and active power decoupling techniques, and its subcategory nominated as control-oriented compensation techniques for the single-phase inverters. The work is summarized in Table 4-5.
The Passive power decoupling techniques (PPTs) utilizes passive components (L,C) for the power decoupling. Use of E-cap is the simple and conventional technique. Other than the cost, size and weight of E-cap; the reliability of E-cap is a major concern. Even though the film-capacitor minimizes reliability problem, it adds the cost, weight and size to the system. The use of film capacitor with the power-electronics circuit as the active filter gives one of the best possible solutions to eliminate E-cap. A comparatively small size film capacitor is used in the active power decoupling techniques (APTs). The APTs can be applied to the DC-side and AC-side (mixed-type) applications. The DC-side application of APTs is easy and does not affect the H-bridge circuit. However, the control scheme should be designed accordingly. The basic control approach is, to balance the decoupling power at the DC-link by the power exchange with the film capacitor. The AC side APT is comparatively better on the basis of the efficiency of system due to its application at the AC side itself. However, the application of these techniques interfere the main H-bridge circuit. This modifies the modulation index of the inverter. This may lead to under-utilization of the power-electronics devices and increased stress on the components. The control is also a challenge. In both DC side and AC-side applications of the APTs, the number of the components increases. This reduces the over-all efficiency of the system and increases the size, cost and complexity of the control method.
The two-stage DC-DC-AC converters and the single-stage converters with front-end control-capability have inbuilt option of the active control. The front-end DC-DC converter can be utilized for the input 2ω−ripple-mitigation purpose. The software based control-oriented compensation techniques (CCTs) are generally utilized in such systems. The dual-loop control scheme and output-impedance shaping scheme are two popular CCTs. The former scheme aims to minimize the 2ω−ripple in the reference current of inner-loop in order to compensate 2ω−ripple in the input current by significantly reducing the bandwidth of voltageloop. The later scheme aims to increase the output impedance of the front-end converter such that 2ω−ripple is forced to flow through the DC-link capacitor branch. However, both the schemes suffer the poor dynamic performance. The addition of resonant filter in the current or voltage loop has shown improved dynamic performance. The addition of notch-filter with resonance frequency at 2ω in voltage-loop in the dual-loop mode control scheme provides enough separation between voltage-loop and current loop and hence 2ω-ripple reduces at the input of the system. This scheme improves dynamic performance of the system, however, this limits the bandwidth of system for a wide-range frequency operation due to the addition of negative phase-shift by the notch-filter for the frequencies below the resonance frequency. A poor-design of the resonant filter may induce instability. In case of voltage mode control scheme, an addition of band-pass filter with the resonance frequency at 2ω is used to increase the output-impedance of the front-end converter to achieve the mitigation of 2ω-ripple. A good dynamic performance of the system is achieved with this scheme, however, a phase rotation of π rad/s by the band-pass-filter limits voltage-bandwidth of the system.  The nonlinear control approaches are generally preferred in the system with the large line-load disturbances such as RE sources based power systems. Furthermore, the RE sources are sensitive to low-frequency ripple. Therefore, the non-linear control approaches are suitable in such applications. The nonlinear control approaches perform well at the large line-load transients in comparison to the linear controllers. The nonlinear controls such as SMC and ISMC add high degree of robustness against the matched uncertainty. Nevertheless, in the literature, a few nonlinear control techniques are proposed for the mitigation of the 2ω−ripple problem. The added features of the robustness and the stable wide range of operation at the large line-load transients over the linear controls, the nonlinear control approaches are to be explored thoroughly in the context of the mitigation of 2ω−ripple problem in the single-phase inverter.
Z-source inverters (ZSIs) and quasi-ZSIs are the emerging competitive technologies for medium/high power applications. Similarly, the switched-mode boost inverters and quasi-switched boost inverters are emerging technology in the low-power applications especially for microinverter applications. Unlike the two-stage converters, these all topologies constitute a single-stage units and have the capability of shoot-through operation. The reduction in the size of components of front-end networks of such converters, for instance, Z source or quasi-Z source network in the presence of 2ω-ripple is a challenge. Nonetheless, quasi-ZSI and quasi-SBI have inbuilt front-end control capability, and therefore ripple mitigation at the input can be achieved through the suitable control only without adding additional active filter.
To summarize, the reliability of E-cap, control and compact design of active filter, stability, dynamic performance and robustness of system against the uncertain characteristics of the RE/alternative energy sources based systems are open challenges. A flowchart, shown in the Fig. 24, is proposed here to conclude the literature reviewed in this paper. DHEERENDRA SINGH (Senior Member, IEEE) received the B.E. degree in electrical engineering from IIT Roorkee (formerly University of Roorkee), the M.Tech. degree from IIT Delhi, and the Ph.D. degree in power quality from BITS-Pilani. He has more than 25 years of teaching and industrial experience. He has supervised one doctoral thesis and more than 100 postgraduate/undergraduate research projects. He has authored approximately 30 research articles in reputed journals and conferences. He is currently involved in teaching and research in the area of power electronics-based renewable energy systems, controls and drives, application of AI techniques, and the IoT. He is a Life Member of IETE, India. He successfully coordinated many graduate programs for the industries, such as National Thermal Power Corporation (NTPC), Chambal Fertilizers and Chemical Ltd. (CFCl), and Hindustan Zinc. VOLUME 8, 2020