0.3-V Nanopower Biopotential Low-Pass Filter

This paper presents a compact power-efficient CMOS fourth-order low-pass filter suitable for electrocardiogram (ECG) acquisition systems. The CMOS structure of the proposed filter utilize the bulk-driven technique and operates in subthreshold region to achieve extremely low-voltage supply (0.3V) and nanopower consumption (0.676 nW) for cut-off frequency of 100 Hz. The filter was designed and simulated using <inline-formula> <tex-math notation="LaTeX">$0.18~\mu \text{m}$ </tex-math></inline-formula> CMOS TSMC technology. The total input referred noise of the filter is <inline-formula> <tex-math notation="LaTeX">$87~\mu $ </tex-math></inline-formula>Vrms and the dynamic range is 58.1 dB. The filter offers the best figure of merit of <inline-formula> <tex-math notation="LaTeX">$2.91\times 10^{-14}$ </tex-math></inline-formula> J, the lowest power consumption and voltage supply, compared with the previous state-of-the-art nanowatt filter designs.


I. INTRODUCTION
In recent years, an increased interest in the design of ultralow-voltage (ULV) and ultra-low-power (ULP) electronic systems, devoted to biomedical applications, is observed. This new trend is associated with the development of different kind of implantable and wearable biomedical systems, where low dissipation power is of crucial importance [1], [2].
One of the most important blocks in such systems is the low-pass filter (LPF). As an example let us consider a typical electrocardiogram (ECG) acquisition system shown in Fig.1. The weak ECG signal, whose amplitude is in the range of 100 µV-4 mV is first amplified by a low-noise preamplifier with variable gain, typically in the range of 10-100 V/V [1]. Next it is filtered with a LPF with adjustable cutoff frequency f c (100-250 Hz), to decrease outof-band noise. Finally, the signal is converted into digital form by an analog-to-digital converter (ADC) [1], [2].
Active filters devoted to such applications usually have very simple structures and exploit MOS transistors operating in sub-threshold region. This allows decreasing both, the dissipation power, as well as the occupied area. Simple structure allows decreasing the input referred noise as well.
In recent years a number of ULV and ULP solutions for biopotential filters has been proposed [3]- [7]. In order to simplify their structures, usually the authors use a single The associate editor coordinating the review of this manuscript and approving it for publication was Dušan Grujić . transistor as a transconductor, to realize a g m -C integrator. Their linearity and dynamic range (DR) is usually improved thanks to the local or global negative feedback loops. In order to further decrease their structures and current consumption, some of the proposed solutions of biquadratic sections contain only one branch of current, consisting of several stacked transistors [4]- [6]. However, the stacked transistors between the supply rails limit the minimum supply voltage (V DD ) and entail different dc levels between input and output.
In order to overcome the above mentioned constraints and further decrease both, the supply voltage, as well as the dissipation power (P diss ) of an ECG filter, a bulk-driven (BD) technique can be considered. The BD circuits proved their capability to operate from extremely low V DD , even much below the threshold voltage (V TH ) of MOS transistors, while maintaining the input common mode range (ICMR) almost rail-to-rail [7]- [13]. It is also worth noting, that in some cases the BD approach can extend the DR of analog circuit under ULV supply, since it can extend the input range for which the circuit performance is not limited by hard non-linearities. Therefore, the BD technique can be a promising approach to design ULV ECG filters.
In this paper we propose a new solution for an ULV ECG filter based on the BD approach. The filter is a cascade connection of two newly-proposed ULV BD biquad filters. Similarly as in [4], the biquad was developed from a lowvoltage current re-use CMOS buffer [14]. Nevertheless, since the traditional long-tailed gate-driven (GD) differential pair was replaced with a non-tailed BD differential pair, a much lower minimum supply voltage was achieved. The lower V DD entails lower P diss of the overall structure. Moreover, the DR of the proposed biquad is better than reported for other designs in literature, even though its supply voltage is much lower (0.3 V). Due to the low dissipation power and good DR, the proposed filter outperforms other ECG filters in terms of standard Figures of Merit (FOMs).
The rest of the paper is organized as follows. In Section II the newly-proposed BD biquad filter is discussed in detail. Section III describes the overall structure of the ECG filter. The simulation results and comparison with other similar designs are presented in Section IV. Finally, the paper is concluded in Section V.

II. PROPOSED BIQUAD CELL A. CIRCUIT DESCRIPTION
The schematic of the proposed ULV biquad filter is shown in Fig. 2. Its principle of operation is based on the idea of a simple CMOS unity-gain buffer [14]. This idea has been next adopted to signal filtering purposes, in a similar way as described in [4]. The circuit shown in Fig. 2. exploits similar operation principle, however, in this structure a traditional long-tail GD differential amplifier has been replaced by a non-tailed BD differential amplifier composed of the transistors M 1A,B -M 2A,B . Due to the non-tailed architecture combined with the BD approach, a rail-to-rail input swing can be achieved for very low supply voltage.
The input differential amplifier, composed of the transistors M 1A,B -M 2A,B , exploits the idea first proposed in [15]. Let us assume that V 1 Fig. 2. Assuming V 1 = V 2 , the V BS voltages of all transistors are equal to each other, which entails that their threshold voltages are equal as well. Therefore, neglecting the impact of g ds conductances, the currents I 1 and I 2 are also equal to each other and equal to I B . Consequently, for V 1 = V 2 , the differential output current of the first stage (I 1 -I 2 ) is equal to zero, i.e. with the above assumptions, the input amplifier is insensitive to the commonmode voltage.
For input differential signals, when V 1 = V 2 , the threshold voltages of M 1A and M 2A (M 1B and M 2B ) are different, because of the dependence of the threshold voltages of MOS transistors on their bulk potentials. This affects the current transfer ratio of the current mirrors and produces a difference of the output currents I 1 and I 2 .
Assuming that the p-channel transistor operates in saturated weak inversion region, its transfer characteristics can be approximated as: where I o is the technology current, n p is the subthreshold slope factor for p-channel MOS and U T is the thermal potential. The threshold voltage V TH , can be expressed as a function of V BS voltage as follows: where V THO is the threshold voltage for V BS = 0, 2| F | is twice the Fermi potential and γ p is the bulk threshold parameter. Straightforward analysis shows that with the above model the differential output current of the first stage I 1 -I 2 can be expressed as: where η is the ratio of the bulk (g mbp ) to gate (g mp ) transconductance of the transistors M 1A,B -M 2A,B at the operating point, given by: As it can be concluded from the above considerations, the transistors M 1A,B -M 2A,B form a truly differential (transconductance) amplifier, with non-linear large signal characteristic given by (3) and the small-signal transconductance which may be approximated as [15]: It is worth mentioning, that both, its noise properties and offset are not worse than observed for the corresponding BD differential pair biased with the same total current [10], [15]. The transistor M 3B form a second transconductance stage. Consequently, the equivalent block diagram of the proposed biquad may be presented in the form shown in Fig.2 It is worth pointing out, that due to the non-tailed architecture of the first transconductor in Fig. 2, the minimum supply voltage of the proposed biquad filter is as low as 2V DSsat , where V DSsat is the saturation voltage of an MOS transistor (3-4 U T in weak inversion region). The input/output swing is limited by the output characteristics of M 1B and M 3B . Because of the negative feedback loop, the maximum (minimum) output voltage can be very close to supply rails.

B. TRANSFER FUNCTION
The transfer function of the biquad filter in Fig. 2b can be expressed as follows: thus, it is transmittance of a low-pass filter, where its dc voltage gain (A DC ), natural frequency (ω o ), and quality factor (Q), are respectively given by: Assuming g mn = I B /n n U T and g mbp = ηI B /n p U T , the natural frequency and the quality factor may be expressed in the form: As it is easy to note, the natural frequency of the biquad filter is proportional to the biasing current I B and can be easily tuned with this current. On the other hand, variations of I B will not affect the quality factor Q. Both quantities (ω o and Q) will depend slightly on the process, supply voltage and temperature (PVT) variations, because the PVT variations will affect the slope factors n n , n p , the coefficient η and U T . However, one can expect that the variations will be on acceptable level.
The tuning range of ω o is limited by the acceptable range of |V GS /V DS | voltage drops across MOS transistors in this circuit, that provide operation of all transistors in saturation.

C. NOISE PERFORMANCE
The thermal v 2 t , and flicker v 2 1/f , noise spectral densities of a MOS transistor can be expressed as follows: where k is the Boltzmann constant, T is the absolute temperature, g m is the transconductance, C ox is the gate oxide capacitance per unit area and K is the flicker noise constant.
Assuming the above noise model, and neglecting the second order effects, the low frequency (f f c ) input referred noise of the considered biquad in a weak inversion region can be expressed as: Usually, the thermal noise will be dominant, because of very low biasing currents (transconductances) and relatively large sizes of MOS transistors, required in ULV environment. Note, that the noise performance of the biquad filter will be deteriorated by the BD approach (η 1), which is a well known disadvantage of all BD circuits.

III. BIOPOTENTIAL FILTER
The biopotential filter can be realized as a cascade connection of two biquad filters described in the previous section. Its transistor-level schematic is shown in Fig. 3. Transistor M B is used for biasing purposes. Note, that transistor sizes and biasing currents in both sections were assumed to be identical.  In order to obtain a fourth order maximally flat characteristic with 3-dB frequency of 100-Hz, for the assumed I B = 0.25 nA (g mbp = 2.63 nS g mn = 7.0 nS), the used capacitances were calculated as shown in Table 1. This results in f o /Q equal to 99.3 Hz/0.87 for the first and 129 Hz/0.65 for the second section of the filter respectively.
The channel lengths of all transistors were chosen relatively large to maximize their g m /g ds ratios (intrinsic voltage gains). On the other hand, their channel widths were fine tuned during the simulation phase to achieve |V GS | ≈V DD /2 at the operating point, that provides maximum voltage headroom for possible PVT variations and signal swing in an ULV environment. The transistor aspect ratios for the design are also provided in Table 1.

A. MAIN CHARACTERISTICS
The circuit has been implemented in a 0.18 µm CMOS process from TSMC, with threshold voltages of around +/− 0.5 V. Its performance was validated using Cadence/Spectre platform. The assumed supply voltage was 0.3 V (+/− 0.15 V for the purpose of simulations). Fig. 4 shows the magnitude characteristic of the filter for I B = 0.25 nA. The characteristic agree well with theory. The dc voltage gain was 0.144 dB, while the cutoff frequency was  exactly 100 Hz. The attenuation in the stop band exceeded 60 dB, which is sufficient for the considered application. Fig. 5 shows variations of the magnitude characteristic with the biasing current I B . For I B ranging from 0.25 nA to 0.634 nA, the 3-dB frequency (f c ) of the filter is tuned from 100 Hz to 250 Hz. Note, that variations of the dc voltage gain and shape of the characteristic (quality factors of both sections) are negligible, that agrees well with theory. Fig. 6. shows the cutoff frequency of the filter against the biasing current I B . As it is seen, the 3-dB frequency can be linearly tuned for I B ranging from 0.15 nA to 0.65nA, which   corresponds to f c ranging from 60 Hz to 260 Hz. This linear range is limited by the |V GS /V DS | voltage drops across MOS transistors and can be extended for larger V DD . Fig. 7 shows the static transfer characteristic of the filter. It is worth pointing out a very good linearity of this characteristic, for nearly rail-to-rail voltage swing. The large voltage swing in an ULV environment is obtained thanks to the BD approach applied in this design.
The good linearity of the filter is confirmed also by its sine wave response shown in Fig. 8. For the sine wave of 200 mV pp and 10-Hz frequency, the total harmonic distortion (THD) was 1 %. The phase shift between input and output signals in Fig.8 is caused by the phase characteristic of the filter. The ability of the proposed filter to attenuate noise is shown in Fig. 9. In Fig. 9a we can see an input ECG signal with an amplitude of 50 mV p , interfered with a parasitic noise modeled as a 500-Hz sinusoidal signal with amplitude of 5mV p . Fig. 9b shows the resulting signal at the output of the filter, which confirms its proper operation in this case.

B. IMPACT OF PVT VARIATIONS AND MISMATCH
In order to investigate the filter sensitivity to PVT variations and transistor mismatch, both, the corner analysis as well as the Monte Carlo (MC) analysis have been performed. The results of corner analysis are shown in Table 2, where the impact of PVT variations on the cutoff frequency of the filter are shown and in Table 3, where its dc gain is examined. Both parameters show relatively low variations under the assumed range of PVT variations.
The impact of transistor mismatch on f c and dc gain of the filter is shown in Figs. 10 and 11 respectively. The figures show histograms, being the results of MC analysis (200 runs). The observed standard deviations of f c (3.19 Hz) and dc gain (0.034 dB) prove a relatively low sensitivity of the filter to transistor mismatch.
The input referred offset of the filter varied from −2.9 mV to 1.8 mV, as a result of PVT variations, while the MC   The above results show, that the filter is robust under PVT variations and transistor mismatch. Note, that the impact of transistor mismatch could be further lowered, applying larger transistor channel sizes, at the cost of silicon area of the filter. Table 4 presents a comparison of the proposed filter with other similar designs of biopotential filters, published in recent years. First of all is worth noting, that the proposed filter can operate with much lower V DD than other filters in Table 4, except [16]. Despite its single-ended architecture and ULV supply, the filter offers the best dynamic range among all the compared filters. This property is achieved thanks to the non-tailed BD architectures of the main blocks used in this design. Note, that the DR could be further improved with a fully-differential version of the proposed circuit. In order to facilitate the comparison, the following standard FOM has been used: (16) where N is the filter order and the other symbols were defined earlier.

C. COMPARISON
As it can be concluded from (16), the above FOM takes into account the power effectiveness of the filter, and refers it to the achieved DR. Lower value of this FOM means better performance of the filter.
The values of the calculated FOMs are shown in Table 4 and in a graphical form in Fig. 12. As it is easy to note, the proposed filter offers the best FOM, which is approximately one order of magnitude better than achieved for the design in [16], which was supplied with the same V DD . The most similar FOM was reported for the filter in [5], however, that circuit was supplied with much larger V DD .

V. CONCLUSION
A new design for an ULV, fourth-order, biopotential (ECG) filter was presented. The filter is a cascade connection of two newly-proposed second-order (biquad) filters, developed from a compact current re-use CMOS buffers [4], [14]. Thanks to the application of BD non-tailed differential pairs, instead of traditional gate-driven pairs, a new ULV biquad filter was obtained, with very low supply voltage (0.3 V) and rail-to-rail input/output range. The simulated results showed, that the circuit outperforms all other designs in terms of standard FOMs, and operates well also in the presence of PVT variations and transistor mismatch. The filter performance can be further improved with a fully-differential version of this design. He has authored or coauthored over 200 publications in journals and proceedings of international conferences. His research interests include analog and digital integrated circuits, discretetime analog filters, non-linear circuits, data converters, and ultra-low voltage building blocks for biomedical applications. VOLUME 8, 2020