Switched-Capacitor LLC Resonant DC-DC Converter With Switch Peak Voltage of Vin/2

A DC-DC hybrid switched-capacitor LLC resonant converter integrating a ladder cell at the input of the LLC resonant converter using frequency modulation is proposed in this paper. This converter has six switches that are subjected to half the voltage of the input source. All switches commutate at zero voltage over the entire load range, and the diodes of the output rectifier bridge commutate at zero current. The proposed converter has the following characteristics: (a) symmetrical operation, (b) simple frequency modulation, (c) commutation of all switches at zero voltage, (d) all switches subjected to half the input voltage, and (e) static gain practically immune to load variations. Theoretical analysis, design, and experimental results in the laboratory for a prototype of 2 kW, 1000 VDC input, 48 VDC output, and 90 kHz switching frequency are included in this study. The maximum efficiency measured was 97.3%.

entire operating range in primary MOSFETs and ZCS-type soft switching of output diodes operating below resonance, and all of the parasitic elements being used to achieve ZVS commutation of switches [9]- [14].
Despite these advantages of the LLC converter over other isolated DC-DC converters, the switches are subjected to the input voltage, which makes its use difficult in applications where this voltage is high, for example, when the voltage comes from the output of a three-phase PWM rectifier with active power factor correction or in PV generation and direct current microgrid applications.
In [15], a topological variation of the three-level LLC converter is presented, in which two input capacitors associated in series are used to divide the input voltage into equal parts. For the converter to work correctly, the voltages across the two input capacitors must be the same. However, in the proposed converter, voltage equalization does not occur naturally, requiring additional voltage and control sensors, which increases the complexity of the converter proposed by the authors. This topic is not discussed in the publication.
In [16], a three-level LLC converter is studied. Despite the proposed topology preserving all the advantages of the original full bridge LLC converter and reducing the voltages on the switches, it also requires the use of two capacitors associated in series at the input, whose voltages must be equalized. This disadvantage is not mentioned or discussed in the publication.
In the topology presented in [17], the switches are subjected to half the voltage of the input power supply. However, this topology requires two isolation transformers, two resonant capacitors and an unusual configuration of the output rectifier. In addition, the analysis and design are more complex than those for the conventional LLC converter.
So-called hybrid converters are designed to encompass the characteristics of two or more distinct converters in one converter. Therefore, the integration of converters and technologies already existing in the literature is widely used to improve the topologies already consolidated [18], [19]. In the 1990s, the first study that used the ladder switched-capacitor cell also appeared in the literature [20]. This cell proved to be easy to integrate with other topologies, and it has been widely used since then as a way to reduce voltage stress on components [18], [21].
This paper aims to investigate the integration of the ladder switched-capacitor cell with the LLC resonant converter. We will demonstrate that the proposed converter has the main characteristics of the LLC converter, such as soft commutation (ZVS) of all switches, high immunity of the static gain to load variations, and symmetrical operation of the isolation transformer, with the advantage of semiconductors being subjected to half the voltage of the input source, which allows the use of low-voltage switches. The commutation of rectifier diodes occurs at zero current, further contributing to the converter efficiency.
Another important advantage of the proposed solution, regarding the solutions employing the three-level technique, is the natural equalization of the voltages across the capacitors associated in series, without the need for voltage sensors or control of individual voltages.
In Section II, the operation of the proposed converter is described, while the theoretical analysis is presented in Section III. Section IV addresses commutation analysis. Section V discusses the converter design and the experimental results obtained from the prototype in the laboratory.

II. PROPOSED CONVERTER AND OPERATION
The proposed DC-DC hybrid switched-capacitor LLC resonant converter and its gate signals are shown in Fig. 1. This converter consists of an LLC converter with a switchedcapacitor cell integrated into its input, formed by divider capacitors C 1 and C 2 and switched capacitor C S , in addition to the insertion of two new switches into the LLC converter (S 1 and S 2 ).
The ladder cell integration aims to reduce voltage stresses on the switches to half the input voltage, preserving the main characteristics of the LLC resonant converter.
Considering that the ladder cell always works in the incomplete charge/discharge mode [22], the proposed converter has three modes of operation, i.e., below the resonant frequency, above the resonant frequency, and at the resonant frequency. It is not recommended to work above the resonant frequency, as commutation in rectifier bridge diodes becomes forced, which increases commutation losses, thus affecting the converter efficiency. For the commutation of the rectifying diodes of the output stage to be soft ZCS type, it is necessary that the converter operate at a frequency lower than, but close to, the resonance frequency, where there is a region that provides soft commutation of the ZVS type for the active switches of the converter.
The converter operating below the resonant frequency presents eight topological states throughout the commutation period, which are represented in Fig. 2, while their main waveforms are shown in Fig. 3. Since the converter is symmetrical, the first four topological stages are described below, and as simplifications, ideal power semiconductors are considered, while dead time is disregarded.
At time t 0 , switches S 2 , S 4 and S 5 are blocked, while switches S 1 , S 3 and S 6 are turned on. Voltages v ab and v cb are positive, and V o > V C2 . The resonant and magnetizing currents are both negative, i Lr increases sinusoidally, and i Lm increases linearly. This stage ends at t 1 when the resonant current is zero. VOLUME 8, 2020 At time t 1 , the resonant current becomes positive and still increases sinusoidally, while i Lm is negative and increases linearly. This stage ends at t 2 , when the magnetizing current is zero.
At time t 2 , the magnetizing current becomes positive. The resonant and magnetizing currents are now both positive. This stage ends at t 3 , when the resonant current equals the magnetizing current, implying that the current in the transformer secondary winding is zero, which means that the diodes of the output rectifier commutate with no losses.
At time t 3 , the resonant and magnetizing currents are equal and remain the same until the end of this stage, which occurs in T S /2. The current in the transformer secondary winding remains zero, allowing rectifier bridge diodes to start conducting with zero current in the next stage; then, the phenomenon described in the literature as ZCS occurs. At the end of the stage, voltage v ab undergoes polarity inversion when switches S 2 , S 4 and S 5 are gated ON and S 1 , S 3 and S 6 are turned OFF.

III. THEORETICAL ANALYSIS A. STEADY STATE ANALYSIS-PART 1
To simplify the steady-state analysis of the proposed converter, it is assumed that the voltage across capacitor C 2 , i.e., v C 2 , is practically constant throughout the commutation period. Thus, it can be treated as a voltage source, which characterizes a conventional LLC converter considering switches S 3 , S 4 , S 5 and S 6 onward.
The analysis is based on the first harmonic approximation (FHA) [23], which has been used several times for LLC analysis [14], [24], [25]. The fundamental component of the voltage generated between points a and b is The voltage source (v th ) and the impedance (Z th ) of the Thevenin equivalent circuit are Thus, the static gain is given by The static gain curve as a function of the normalized switching frequency is shown in Fig. 4, where the regions where ZVS and ZCS occur are highlighted.

B. STEADY STATE ANALYSIS-PART 2
To simplify the analysis, it is also assumed that the resonant stage can be replaced by a sinusoidal current source at terminals a and b. Fig. 5 shows the corresponding equivalent circuit, where the current i L r (t) is given by The capacitances of the switched capacitor stage are the same and defined as Applying Kirchhoff's voltage and current laws yields The solution of (8) allows determination of the currents in the other switched capacitors and therefore their respective voltages. Thus, the equivalent resistance of the switched capacitor stage can be determined as follows: Appropriate substitutions and algebraic manipulation gives where The normalized value of the equivalent resistance, given by equation (12), is plotted in Fig. 6(b). The value of R eq decreases as the normalized frequency α increases. After α reaches a value of appoximately 0.4, the equivalent resistance remains practically constant and equal to 2.
The equivalent steady-state circuit in terms of average values is shown in Fig. 6(a), while the R eq (α) curve as a function of α is shown in Fig. 6(b). Thus, the stage already has the minimum equivalent resistance for α greater than approximately 0.4; thus, it is recommended to work with α > 0.4.

IV. COMMUTATION ANALYSIS
At instant t = t 4 , power semiconductors S 1 , S 3 and S 6 are turned OFF, and commutation from S 1 , S 3 and S 6 to S 2 , S 4 and S 5 is initiated. The topological states for the different time intervals are shown in Fig. 7, while the relevant waveforms are represented in Fig. 8.
Applying Kirchhoff's voltage law, we find Thus, After appropriate substitution and algebraic manipulation, we find  Applying Kirchhoff's current law, we find With appropriate substitution, we find the currents in the power semiconductors at the instant of the commutation, which are given by From the previous equations, we obtain the currents in capacitors C S 3 and C S 6 as With appropriate substitutions, we find Consequently, the durations of the commutation are given by ZVS is achieved provided that the dead time t d between the gate signals of the switches is larger than the commutation time t c 1 . Thus,

V. PROTOTYPE IMPLEMENTATION AND EXPERIMENTAL RESULTS
An experimental prototype was designed and constructed to validate the theoretical analysis, as shown in Fig. 9. Prototype components were dimensioned with the parameters listed in Table 1. The switching frequency was chosen to be below but in the vicinity of the series resonant frequency to obtain ZCS of the rectifier diodes on the secondary side and ZVS commutation on the primary side power semiconductors. The parameters of the experimental laboratory prototype are shown in Table 2.
As seen in Table 2, it was necessary to use a combination of components to achieve the desired specifications. To form the dividing capacitors C 1 and C 2 , two capacitors were associated in parallel, C 1a with C 1b and C 2a with C 2b , respectively. For the switched capacitor C S , two capacitors were also used in parallel, C Sa and C Sb . For the resonant capacitor, seven capacitors were associated in parallel, C r1 -C r7 , and for the output filter capacitor, three capacitors were used in parallel, C o1 , C o2 and C o3 . By substituting the parameters of the conduction resistance of the MOSFETs (R DSon ) and the capacitance of the switched capacitors (C = C Sa + C Sb ) shown in Table 2 and the switching frequency (f s ) shown in Table 1 into equation (12), the value of α was obtained as 0.4725, indicating that the converter operated in the region of lower losses due to the switched capacitor stage. (a) S 1 and S 2 drain-source voltages (100 V/div) and gate-source voltages (10 V/div), with the ZVS performance shown for S 1 , (b) S 3 and S 4 drain-source voltages (100 V/div) and gate-source voltages (10 V/div), with the ZVS performance shown for S 3 , (c) S 5 and S 6 drain-source voltages (100 V/div) and gate-source voltages (10 V/div), with the ZVS performance shown for S 6 , and (d) D 1 cathode anode voltage (20 V/div) and transformer secondary current (25 A/div), with the ZCS performance shown for D 1 . Experimental waveforms of the drain-source voltages of the power semiconductors are shown in Fig. 10(a), Fig. 10(b) and Fig. 10(c). These waveforms show that ZVS-type commutation occurs for all power semiconductors on the primary side of the transformer. Fig. 10(d) shows the voltage and current in one of the rectifier stage diodes on the secondary side of the transformer, which confirms the existence of soft switching of the ZCS type.
Waveforms of the v ab voltage, resonant current i L r , and voltage on the resonant capacitor v C r are shown in Fig. 11.
The efficiency of the proposed converter was measured using a TEKTRONIX PA-1000 power analyzer and is shown in Fig. 12. The maximum efficiency is 97.267% at 594 W. Due to the limitations of the available power analyzer, the efficiency was not measured for power greater than 1.3 kW.
The losses in the converter were calculated and are shown in Fig. 13, where it is possible to observe that the losses in the rectifier diodes (P D ) are the most significant factor decreasing the efficiency of the converter due to the high output current. It is also observed that the losses in the switches (P S ) do not represent a substantial portion of the total losses because the converter works with soft commutation over the entire operating range, which eliminates the switching losses. The experimental static gain as a function of the normalized load current is depicted in Fig. 14 for resonant and switching frequencies equal to 100 kHz and 90 kHz, respectively.

VI. COMPARISON OF CONVERTER TOPOLOGIES
In Table 3, a succinct comparison of the proposed topology with the topologies presented in [15]- [17] and [26] is made. All topologies are resonant LLC topologies and subject the   semiconductors and capacitors on the primary side of the transformer to half the value of the input voltage.
In addition, all converters operate with a switching frequency less than the resonance frequency, but in the vicinity of the resonance frequency, to provide ZVS commutation of the high voltage side semiconductors and ZCS commutation of the diodes of the output rectifier stage.
The powers of the converters presented in [16] and [17] are approximately 500 W. The powers of the converters in references [15] and [26] are equal to 1 kW, while the proposed converter was designed to operate with 2 kW.
A comparison criterion is the number of semiconductors used. All the topologies chosen for the comparison are based on the three-level cell and therefore employ four semiconductors, while the proposed converter, which is based on the switched-capacitor ladder cell, uses six semiconductors.
However, the maximum efficiencies presented in [15], [16], [17] and [26] are 95%, while the maximum value obtained for the proposed converter is 97.3%. In addition, in the proposed converter, equalization of the voltages in the input voltage dividing capacitors occurs naturally, while the three-level topologies require control of these voltages to ensure equalization, which increases the complexity of the circuits.

VII. CONCLUSION
A DC-DC hybrid switched-capacitor LLC resonant converter was proposed, designed, constructed, and analyzed in the laboratory. The analysis and experimental results showed that the converter maintains the LLC characteristics, including soft commutation of all ZVS switches, ZCS-type soft commutation of output diodes, a small variation in the static gain with load variation, and high efficiency. Voltage stresses of half the input voltage on switches and natural equalization of capacitor voltages without the need for control were obtained with ladder cell incorporation.