Analysis and Design of PI Plus Repetitive Control for Grid-Side Converters of Direct-Drive Wind Power Systems Considering the Effect of Hardware Sampling Circuits

In inverters based on a single proportional-integral (PI) or deadbeat (DB) controller, an inherent resonance peak may emerge near their current loop cut-off frequency, which results in harmonic amplification or even resonance. Additionally, inappropriate filter circuits implemented in sampling circuits may result in the expansion of the resonance peak. Thus, this paper further investigates the influence of the sampling circuits on a PI- or DB-based control loop. Then, the RC filter in the sampling circuit is designed to reduce the inherent resonance peak. Moreover, a compound control strategy based on an improved repetitive controller (IRC) plus a PI controller is adopted for the grid-side converter of a direct-drive wind system. This strategy enhances the harmonic and reactive compensation performance by reconstructing the internal model of the classic repetitive controller (CRC) and limiting the bandwidth of the PI-based loop to a low level. The parameters of the presented IRC-plus-PI control are designed for the purpose of resonance peak elimination and system stability. Furthermore, the non-integer delay problem is solved with an inserted fraction compensator (FC), which plays the role of a low-pass filter in the IRC. Finally, the feasibility and effectiveness of the presented control method is verified by the experimental results.


I. INTRODUCTION
Distributed wind power generation has been widely adopted to meet the increasing demand for electrical power due to its clean and renewable characteristics. Due to the advantages of high efficiency, low failure rate and low maintenance cost, direct-drive wind power systems based on permanent magnet synchronous generators (PMSGs) have become popular in recent years [1]- [4].
In distributed generation systems or microgrids, wind power systems are often connected to utility grids through grid-side converters. However, since wind power is highly The associate editor coordinating the review of this manuscript and approving it for publication was Lasantha Meegahapola . random and intermittent, the average utilization rate of wind power generation is only approximately 35% ∼ 45% [1]- [3]. Thus, it is of great practical significance to explore ways to fully exploit the residual capacity of grid-side converters. Moreover, in modern power systems, nonlinear power-electronic equipment has been increasingly used in industrial and domestic applications. This equipment injects large amounts of harmonic currents into the grid and consumes reactive power, which causes harmonic pollution and results in a poor power factor [5], [6]. Hence, considering the residual capacity of wind power and the power quality issues of the utility grid, a gridside converter can be designed to address the power quality issues by adding auxiliary functions such as active VOLUME 8, 2020 This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/ filtering, reactive power compensation, and dynamic stability enhancement [7], [8].
For this purpose, many research works have paid attention to multifunction grid connected converters and focused on the control strategies of active compensation of harmonic and reactive power. Many current controllers have been proposed to improve the compensation performance, such as deadbeat (DB) controllers, proportional-integral (PI) controllers, proportional resonant (PR) controllers, and repetitive controllers. For example, in [9]- [13], a single PI-or DB-based current controller is adopted in a three-phase PWM converter to provide reactive power and harmonic compensation with a fast transient response and zero steady-state error. In addition, multi-PR controllers and repetitive controllers are proposed for grid-connected converters in [14]- [20] that can provide a large gain at harmonic frequencies but suppress the other frequencies to a low level.
Obviously, the abovementioned control strategies improve the understanding of multifunction converters and provide solutions to reactive power and harmonic current compensation. However, there are still some unresolved issues for these controllers. For example, for a multi-PR controller, the control system is more complicated due to the undesirable interaction between different control loops, and the control system may trigger system resonance when higher order PR controllers are also included to fully control all they harmonics [14], [15]. Due to the inherent time delay unit in the internal system [15]- [17], the dynamic response performance of the classic repetitive controller (CRC) is not superior to that of the PI or DB controller [18]- [21]. Particularly, single PIor DB-based controllers, which feature fast transient response and zero steady-state error, have been widely used in practice since these controllers are easier to design and implement. However, the closed-loop transfer function of the PI-or DB-based current loop may suffer from an inherent resonance peak near its cut-off frequency, which is also sensitive to the internal control parameters and external hardware parameters [11], [12]. Moreover, due to the existence of resonance peaks, harmonics located at the resonant frequencies could be amplified and injected into the utility grid, which may cause system instability.
Currently, studies on harmonic amplification and resonance are mainly about distribution systems [22]- [24], while studies on the inner resonance of PI-or DB-based current control loops mainly focus on the control parameters and ac line inductance variation [11], [12], [16]. However, the influence of the hardware sampling circuit on the current inner loop is rarely mentioned in the literature. On the other hand, unlike conventional inverters, the bandwidth of grid-side converters with harmonic and reactive power compensation functions should be relatively larger. For conventional PI and DB control, to reduce the resonance peak in its control loop, the system active bandwidth should be limited to a low level [16], which degrades the system dynamic response and compensation performance in the HF band. Thus, when depending only on a single PI or DB controller, it is difficult to achieve a satisfactory trade-off between the system bandwidth and compensation performance.
Therefore, this paper further investigates the influence of the hardware sampling circuit on the resonance peak based on detailed current control modeling, and then the RC filter in the sampling circuit is designed to reduce this influence. Moreover, a compound control scheme consisting of a parallel improved repetitive controller (IRC) and a low-bandwidth PI controller is developed in this work to enhance the compensation performance and resonance peak elimination. Compared with the plug-in repetitive controllers in [17], [25], the presented parallel structure should be a more feasible choice for the grid-side converter in this work since the bandwidth of the PI control loop could be designed at a low level for resonance peak mitigation, and the error regulation signal of the repetitive controller would not be limited by the bandwidth of the PI control loop. The main contributions of this paper are summarized as follows: 1) The influence of the sampling circuits on a PI-or DB-based control loop is investigated. It is found that inappropriate filter design may result in the expansion of the inherent resonance peak, and thus, it is difficult to achieve a satisfactory trade-off between system bandwidth and compensation performance when depending only on a single PI or DB controller.
2) The RC filter in the sampling circuit is designed to reduce the inherent resonance peak and avoid introducing extra high-frequency resonance peaks.
3) For resonance peak mitigation and the system bandwidth requirements, a compound control strategy based on an IRC-plus-PI controller is introduced to enhance the compensation performance by reconstructing the internal model of the classic repetitive controller and limiting the bandwidth of the PI-based loop to a low level. The IRC-plus-PI structure combines the advantages of both controllers and minimizes the interference between them.
4) The parameter design of the IRC-plus-PI controller is presented for the purpose of resonance peak elimination and system stability. The stability and dynamic characteristic compensation performance of the presented control method confirm the proper control parameters.
The remainder of this paper is organized as follows. In Section II, the influence of the sampling circuits on PI-or DB-based control loops is discussed based on detailed modeling. In Section III, the RC filter in the sampling circuit is designed to reduce the extra high-frequency resonance peak. Section IV demonstrates the IRC-PI compound control scheme. Section V presents the overall design of the compound control system. Section VI verifies the performance of the compound control strategy by experimental results. Finally, conclusions are drawn in Section VII.

II. MODELING AND ANALYSIS OF CURRENT CONTROL LOOP CONSIDERING HARDWARE SAMPLING CIRCUIT
A. MODELING OF THE CURRENT CONTROL LOOP As illustrated in Fig. 1, a grid-side converter with a single output filter L is a typical configuration used in distribution systems. In general, the overall control system of the gridside converter is composed of dc-link voltage control and converter current control. Note that the stabilization of the DC-link voltage is easy to realize using a PI controller, and converter current control is a relatively critical issue. Thus, the current control loop is discussed in detail in the following and is also marked in Fig. 1.
According to Fig. 1, the block diagram of the current control loop can be obtained as Fig. 2, where i ref is the current reference value and i inv is the inverter output current. Then, the open-loop transfer function G op (s) can be expressed as follows: where G c (s) and G inv (s) represent the transfer functions of the control system and the grid-side converter, respectively. G p (s) and H (s) represent the transfer function of the output filter inductor and the sampling system marked in Fig. 1, respectively. Generally, G inv (s) and G p (s) can be expressed as follows: where the converter is regarded as an inertial unit and k PWM represents the gain of the converter. T s and L denote the sampling period and the output filter inductance, respectively.
For the transfer function of the feedback path, the ideal H (s) is often regarded as 1 in most cases when designing the current controller. However, in practice, sampling filter circuits are usually used to block the high frequency (HF) disturbances in the sensor signals, and thus, these circuits should be taken into consideration. As shown in Fig. 3, the typical sampling circuit used in engineering cases is often composed of a conditioning circuit and filter circuit. To match the A/D conversion chips, the resistor R 0 in the conditioning circuit implements the conversion of the current signals to voltage signals while the RC circuits jointly play the role of filtering. Specifically, the amplifier circuit in the conditioning circuit can be equivalent to a proportional unit and does not affect the filtering performance of the RC circuit. Additionally, the amplified signal is restored by the DSP in the control system and thus does not affect the control effect. Thus, the amplifier circuit can be ignored in the modeling of H (s). Therefore, according to Fig. 3, the practical transfer function of H (s) can be obtained as (3).
Then, the detailed transfer function of G op (s) in (1) can be deduced as follows:  where

B. IMPACT MECHANISM OF THE HARDWARE SAMPLING CIRCUIT
As shown in Fig. 4, when only a DB or PI controller is implemented in the current control loop, an inherent resonance peak emerges near the cut-off frequency of the closed-loop transfer function even though H (s) is considered to be 1. Moreover, according to (3), when the model and transfer function of H (s) are nonideal, the performance of the current loop transfer function is affected. As shown in Fig. 5, with the consideration of the RC filter circuits in the sampling circuits, the inherent resonance peak is expanded. Obviously, the existing resonance band can cause harmonic amplification and even resonance. Moreover, as shown in Fig. 5, the phase angle appears to be ahead between 100 Hz and 6000 Hz, which may make the system unstable. The impact mechanism of the RC filter can be explained as follows: First, the closed-loop transfer function (G cl ) of the current control loop is deduced as (6).
Then, G cl (s) in (6) can be divided into two parts as in (7). (7) where G cl (s) can be regarded as the system ideal closed-loop transfer function (i.e., H (s) =1) and G extra denotes the part that is introduced by the practical nonideal H (s).
Thus, if H (s) = 1, then G extra = 0, which affects the performance of the whole transfer function. To investigate the impact of the RC filter circuits, the Bode plot of G extra (s) is plotted in Fig. 6 based on (7). According to the magnitude-frequency response curve, G extra (s) is similar to an HF bandpass filter with considerably high gain, which expands the inherent resonance peak and leads to HF harmonic amplification.
On the other hand, according to the phase-frequency response curve, it can be found that G extra also causes phase lead in the high frequency range, which thus causes system instability.
For simplicity and clarification, a simplified model of the actual current loop can be given as shown in Fig. 7, where  the ideal current loop G cl (s) is equivalent to a low-pass filter (LPF) and the extra part G extra (s) is regarded as a series connection of proportional amplifier (K ) and bandpass filter (BPF).
Therefore, for the grid-side converter with the function of harmonic suppression and a wider control bandwidth, the single controller structure (i.e., DB or PI) cannot ensure satisfactory performance in the high frequency range due to the inherent resonance peak. Furthermore, the RC filter in the sampling circuit should be carefully designed to avoid expanding the resonance peak and causing extra phase lead.

III. PARAMETER DESIGN OF THE SAMPLING CIRCUIT
To minimize the effect of the RC filter in the sampling circuit, the parameters should be carefully designed, which is discussed in the following.
As shown in Fig. 3, the RC filter is used in the filter circuit to enhance the filter performance of high frequency signals. To analyze the performance of the filter circuit with different parameters, in the following, two sets of filter circuits with different parameters are selected for comparison. The final cut-off frequencies of the RC filters are both designed to be the same.
As shown in Fig. 8, a comparison of curves 1 and 2 shows that the amplitude attenuation speed and phase trajectory are slightly different. Thus, the ability to suppress high frequency glitches and the filtering performance are basically the same. Hence, different parameters do not cause the filter characteristics to change significantly when the filter circuit maintains the same cut-off frequency. Thus, to facilitate the overall parameter design of the sampling circuit, the two RC filter branches use the same parameters. The open-loop Bode diagrams of a current control loop with four groups of different RC circuit parameters are illustrated in Fig. 9(a). For curve 1, the phase angle margin is −21 • , and thus, its closed-loop control system is unstable. In addition, the phase delay of curve 1 in the HF band is larger, which may cause system resonance and instability problems. In contrast, the phase angle margins of the other curves are 2.5 • , 15.8 • and 27.4 • , which can ensure the system ability and avoid a large phase delay in the HF range. Compared with other curves, curve 4 may have poorer filtering performance around the frequency of 10 kHz, which affects the filtering effect of the switching high-frequency glitch. According to the closed-loop Bode diagram shown in Fig. 9(b), the resonance peak of curve 2 is significantly higher than that of curve 3. The resonance peak of curve 2 appears at approximately 1000 Hz, which implies that the harmonics nearby are amplified. Additionally, the phase angle of curve 2 appears to be ahead after 100 Hz, which may make the system unstable.
Therefore, considering the stability of the system and the filter performance of the RC filter circuit on the switching frequency signals, the parameters of curve 3 are selected, that is, R 2 = 2.2 k and C 2 = 0.01 µF.

IV. IRC-PLUS-PI COMPOUND CURRENT CONTROL STRATEGY
As mentioned above, the DB-or PI-based control loop has an inherent resonance peak and is affected by the parameters VOLUME 8, 2020 of the sampling circuits. Therefore, in addition to choosing the proper parameters to reduce the resonance peak, in this paper, a parallel controller structure is presented. As shown in Fig. 10, a repetitive controller is introduced here to cooperate with the PI controller to enhance the grid-side converter performance and eliminate the influence of the resonance peak.
The presented control strategy is implemented in a dq synchronous rotating frame. The fundamental components can be transferred to dc components based on dq transformation, and thus, zero steady-state error can be achieved by the PI control loop. For the harmonic current, i.e., harmonics of order 6k ± 1, the components are transferred into ac components of order 6k. Then, the new harmonic distribution in the dq reference frame after coordinate transformation can be obtained as follows: where k ≥1, I 1 and I i represent the magnitude of the fundamental component and the harmonic current of order i, respectively, and ω i and ϕ i represent the angular frequency and phase angle of the harmonic current of order i, respectively. Therefore, the control objects of the IRC control loop are the ac components of order 6k. Motivated by the CRC shown in Fig. 11(a), the proposed improved repetitive control scheme is feasible if the internal model of CRC is reconstructed, as shown in Fig. 11(b). More precisely, the delay time of the periodic time delay unit e −sT 0 is reduced to T 0 /6. The internal model of the improved repetitive controller can be rewritten as follows: Resonant controllers (9) where T 0 is the fundamental period and T 0 =2π/ω 0 =1/f 0 . f 0 and ω 0 are the fundamental frequency and the fundamental angular frequency, respectively. Obviously, the proposed IRC has an infinite number of poles located at 6nω 0 , which is also illustrated in Fig. 12, so it can effectively compensate  selective harmonics of order 6k in the synchronous reference frame. Moreover, compared with the classic repetitive controller, the delay time of the IRC is only T 0 /6, which indicates a faster transient response.
Hence, in the compound control system in Fig. 10, the PI controller is mainly used to control the fundamental current and improve the dynamic response performance. Therefore, the bandwidth of the PI controller can be reduced to a low level, which also provides the possibility to avoid resonant peaks.
Additionally, the IRC controller with a shorter time delay is used to track the harmonic components with nearly zero steady-state error and suppress the others to some extent. Considering the closed-loop system stability, a low pass filer Q(z) and an appropriate phase-lead compensator G f (z) = z p (with p being the phase leading step) are incorporated in the proposed IRC.
Thus, in contrast with the simplified model of the single controller structure in Fig. 7, the approximately equivalent model of the compound control system can be modified as shown in Fig. 13. The PI controller is regarded as a LPF with  reduced bandwidth. The reconstructed repetitive controller is regarded as a functionally equivalent selective filter (SF) cascaded with another low pass filter, which allows only selected harmonics of order 6k (below the cut-off frequency) to pass through, but the other additional interferences (e.g., high-order resonance) can be attenuated efficiently.

V. DESIGN AND ANALYSIS OF THE IRC-PLUS-PI CONTROL SYSTEM A. DESIGN OF THE PARALLEL PI CONTROLLER
As shown in Fig. 14, in the presented parallel compound control system, when the input (r) and output (y) of the system are not equal, the PI and IRC controllers simultaneously respond to the error signal ( e). The sum of the outputs of the two controllers forms the modulation signal of the system, thereby changing the output y of the system until y(z) = r(z).
In fact, during the transient process, due to the inherent delay in the IRC, the system is mainly regulated by the PI regulator during this period. Thus, to ensure the stability of the compound control system, the system should not only ensure stable operation and guarantee proper bandwidth and stability margin when the PI regulator is used alone but also work stably after introducing the proposed improved repetitive controller.
However, unlike the single controller structure, the main control object of the PI controller here is only the fundamental component, which does not contain the harmonic components that need to be compensated. Then, the bandwidth of the PI controller can be reduced to a low level without the consideration of full harmonic compensation.
Thus, the controller gain k p of the PI controller could be designed to achieve a trade-off between resonance peak cancelation and proper bandwidth. As illustrated in Fig. 15, the parameter tuning process is conducted in MATLAB with the consideration of system stability and proper bandwidth.  To avoid extra resonance peaks, k p is chosen to be 0.01 in this case.

B. DESIGN OF THE DIGITAL FILTER Q(Z) IN IRC WITH THE CONSIDERATION OF FRACTION DELAY
Importantly, it should be noted that the exponent N /6 of the delay unit z −N /6 might be a noninteger, where N (N = T 0 /T s ) is the number of samples per fundamental period. In practical applications, N /6 is treated as the largest previous or the smallest following integer in a digital processor (e.g., N /6 is set to be 33 or 34 in cases where T 0 = 0.02 s, f s = 10 kHz and N = T /T = 200). However, as illustrated in Fig. 16(a), the corresponding resonance peaks deviate from the selective harmonic frequencies, especially for high frequencies. Then, the tracking accuracy is degraded significantly. Hence, compensation of the fractional delay should be considered.
Taylor series expansion could be used to address the fractional problem. Assuming that z −N /6 = z −(I +F) , where I and F represent the integral and fractional parts, respectively, the Taylor series of z −F about 1 can be obtained as As the blue dotted line shows in Fig. 17(a), f (z) acts as an LPF with the cut-off frequency nearing 2800 Hz. As illustrated in Fig. 17(b), with fractional delay compensation, the frequency deviation problem can be solved. Additionally, the open-loop gain of the IRC decreases with increasing frequency due to the low-pass filter characteristic of f (z). Hence, an alternative is to replace the LPF Q(z) with f (z). However, when only f (z) plays the role of Q(z), the system stability cannot be ensured in the HF band since the cut-off frequency of f (z) is high. Thus, a zero-phase digital LPF with no extra phase lag M (z) [15], [26] can be introduced and cascaded with f (z), as depicted in (11).
where α 1 , α 0 >0, α 1 +2α 0 =1 and n is the order of the filter. Figure 17(a) shows the magnitude responses of Q(z) with n =1, 2, 3. As illustrated in Fig. 17(b), when the first-order M (z) is inserted, the open-loop gain of the IRC decreases quickly in the HF band. Specifically, the first-order M (z) is chosen for this design case.

C. DESIGN OF G F (Z) AND K RC IN IRC WITH CONSIDERATION OF SYSTEM STABILITY
Based on the system control block in Fig. 10, the current tracking error e(z) can be expressed as (12).
The whole system is asymptotically stable if and only if all the roots of (13) are inside the unit circle.
Then, (13) can be rewritten as follows: Hence, the stability condition of the system is that the roots of both S 1 and S 2 are located in the unit circle. More precisely, two conditions should be met: 1) S 1 : the system is stable when the PI controller is used alone; 2) S 2 : (15) should be satisfied when considering the improved repetitive controller, To explain the influence of Q(z), K rc and G f (z), the stability constraint of (15) is plotted in Fig. 18, where the vector Y (e jωTs ) should not exceed the unit circle. The LPF Q(z) makes the unit circle move towards the left-half-plane, which allows a larger stability area for k rc G f T eq . With increasing frequency, the magnitude of k rc G f T eq decreases while the phase delay increases. Then, |Y (e jωTs )| increases since the vector k rc G f T eq rotates closer to the imaginary axis so proper phase-lead compensator G f (z) = z p can be included to maintain the stability condition of (15).
In the frequency domain, LPF Q(z), phase compensator G f (z) and T eq (z) can be rewritten as T eq (e jωT s ) = M T (e jωT s )e j(P T (e jωTs )) (16) where 0 < ω < π/T s and M T (e jωTs ) and P T (e jωTs ) are the magnitude and phase angle of T eq (e jωTs ).
Then, Y (z) can be expressed in the frequency domain as (17).
Based on (17), the range of k rc can be deduced as follows (18), as shown at the bottom of the next page.
Note that the first stability condition S 1 of (14) can be fulfilled by the PI controller design in Part A. The latter stability condition S 2 can be ensured when the values of k rc and p meet (18).
Under the premise mentioned above, p is chosen as 2, and the parameter tuning of the control gain k rc is performed in MATLAB with G f (z) = z 2 . Fig. 19 shows a family of Bode plots of the IRC open-loop system and IRC-plus-PI closed-loop system. According to Fig. 19(b), k rc is chosen as 0.3 to ensure sufficient bandwidth and avoid introducing an extra specific resonance peak in the HF band. Additionally, as highlighted by the red curve, although the PI loop bandwidth is limited to a low level for resonance suppression, it plays the important role of tracking the low frequency signals and improving the dynamic response, which makes it a good addition to the IRC.

VI. EXPERIMENTAL VERIFICATION
To verify the performance of the presented scheme, a simplified experimental prototype was built in the laboratory. Fig. 20(a) illustrates the linkages between the power circuit and the control circuit. Fig. 20(b) shows the signal extraction and reference instruction calculation. Hardware photographs are shown in Fig. 20(c) and (d).
Converter #1 connected to a grid simulator is used to approximately simulate the machine-side converter of the wind power system. Converter #2 is used to simulate the grid-side converter. The local load of the wind power system consists of a three-phase diode rectifier bridge with two sets of parallel resistance-inductor loads. The digital control system is based on DSP and FPGA, which are responsible for the control algorithm and data communication. The power circuit and controller parameters are listed in Table 1.
In the experiments, the voltage of the DC link is designed to be controlled by converter #1, and converter #2 is used to verify the system control method. The start-up process of the experiment setup includes three stages: (1) the AC contactor K 1 is turned on and all the IGBTs are locked, so converter #1 is connected to the utility grid with the DC-link capacitors   charged up though anti-parallel diodes and provides power supply to the control system; (2) when U dc > 500 V, K 1 is turned off, and all the IGBTs are unlocked for the controllable process with the buffer resistance bypassed; (3) the DC-link voltage reaches the rating value of 700 V in the steady state and another AC contactor K 2 is turned on to connect with the utility grid. The DC-link voltage of the start-up process is shown in Fig. 21. Furthermore, the related experimental results are shown in Fig. 21-Fig. 24. For the sake of simplicity, only the waveforms of phase-A are displayed in the figures. The harmonic amplification phenomenon mentioned above is verified in the experiments. Fig. 22 shows the output current spectrum when the converter compensates for the 7 th and 5 th harmonic currents with a single deadbeat controller. The parameters of the conditioning circuit remain unchanged while different parameters of the sampling circuits are selected for testing. As illustrated in Fig. 22, the output current contains high-order harmonics. Due to the resonance peak, the high frequency harmonics are amplified, and the stability of the system may deteriorate. The experimental results are consistent with the analysis in Section II. Figure. 23 shows the output current spectrum when the converter compensates for the 5 th harmonic current with the compound control strategy. The converter can track the  harmonic reference well, and the high-frequency harmonics are not significantly amplified. It can also maintain a good control effect when compensating for larger harmonic currents.
In Fig. 24, a comparison of the experimental results of the IRC-plus-PI control scheme are presented. As shown in the partial detailed drawing of Fig. 24(a1), when only the PI controller with closed-loop insufficient bandwidth is working, the system can prevent current amplification and harmonic resonance. Nevertheless, the system cannot achieve satisfactory compensation performance since the PI controller cannot track AC signals with zero steady-state error. In contrast, with IRC inserted, the distortion ratio of the grid current reduces to 4.2%, as shown in the partial detailed drawing of Fig. 24(a2). The harmonics out of the range of the PI control loop can be suppressed by IRC and can ensure a smaller steady-state error due to the specific internal model of the IRC. Moreover, to verify the dynamic performance of the presented scheme, a load-variation test is also carried out, with the experimental results shown in Fig. 24(b). As seen, with the other set of resistance-inductor loads connected to or disconnected from the grid, the control system can take effect, and the new steady state of the compensation harmonic current can be achieved soon because of the PI controller, although the output of the parallel IRC is postponed by one-sixth of the fundamental period. Therefore, the compound scheme presented in this paper can eliminate the tracking error quickly and has good dynamic performance.
In addition, the system performance of the reactive current compensation is illustrated in Fig. 24(c). In this case, the reference reactive current is set as 10 A. It can be found that the system can achieve harmonic and reactive current compensation with satisfactory performance.

VII. CONCLUSIONS
This paper further investigates the influence of the sampling circuits on a PI-or DB-based control loop. It is found that inappropriate filter design may result in the expansion of the inherent resonance peak. Therefore, the design of the RC filter in the sampling circuit is provided to reduce the inherent resonance peak. Moreover, an IRC-plus PI-control strategy is presented, and the compound control structure takes advantage of both their merits. With the reconstructed internal model of the improved repetitive controller, the IRC-based control loop can compensate 6k ± 1 harmonics with shorter time delays and avoid unnecessary harmonic amplification in the high frequency band. By limiting the bandwidth of the PI-based control loop, the high-frequency resonance peak can be eliminated to some extent, and the parallel PI controller can ensure reactive current compensation and system dynamics, which makes it a good addition to the IRC.
Prototype experiments show that the harmonic amplification suppression performance of IRC-plus-PI is acceptable and its dynamic response is good. Thus, it is suitable for gridside converter engineering applications. In addition, with the presented control method, the efforts of optimal filter tuning and precise system modeling can be preserved in practical engineering.

APPENDIXES
The derivation of (16) is as follows. The transformation of the discrete domain and frequency domain is given as Thus, the compensation function G f can be rewritten in the frequency domain as follows: The LPF Q can be rewritten in the frequency domain as