Analysis and Investigation of Hybrid DC–DC Non-Isolated and Non-Inverting Nx Interleaved Multilevel Boost Converter (Nx-IMBC) for High Voltage Step-Up Applications: Hardware Implementation

In significant cases, the generated voltage needs to be step-up with high conversion ratio by using the DC-DC converter as per the requirement of the load. The drawbacks of traditional boost converter are it required high rating semiconductor devices and have high input current ripple, low efficiency, and reverse recovery voltage of the diodes. Recently, the family of Multilevel Boost Converter suggested and suitable configuration to overcome the above drawbacks. In this article, hybrid DC-DC non-isolated and non-inverting Nx Interleaved Multilevel Boost Converter (Nx-IMBC) is analyzed in Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM) with boundary condition and investigated in detail. The Nx-IMBC circuit combined the features of traditional Interleaved Boost Converter (IBC) and Nx Multilevel Boost Converter (Nx-MBC). The modes of operation, design of Nx-IMBC and the effect of the internal resistance of components are presented. The comparison study with various recent DC-DC converters is presented. The experimental and simulation results are presented with or without perturbation in input voltage, output power and output reference voltage which validates the design, feasibility, and working of the converter.


I. INTRODUCTION
When the current world energy scenario is analyzed, all the nations of the world is riveted towards ingestion of exhaustible sources to beget the energy and to feed the energy The associate editor coordinating the review of this manuscript and approving it for publication was Eklas Hossain .
requisites. The idea of energy generation is entirely unaffordable, which would eventually create paucity of fossil fuels soon. As a result, the entire focus has increasingly shifted towards inexhaustible energy sources [1]- [5]. There are so many ways to generate power using these sources like solar, wind, fuel-cell, tidal etc. Among these sources, solar energy is one of the conventional renewable sources due to abundance, VOLUME 8, 2020 This eco-friendly, free of cost and continuously developing with the advancement in photovoltaic cells which is leading to the high efficiency of the solar system. Photovoltaic technology is tenaciously growing with betterment in photovoltaic cells which ultimately leads to the priceless powered nation and the world too [6]. More and more renewable energy sources such as solar arrays, wind turbines, and fuel cell stacks are widely employed for front-end DC/DC applications [7], [8]. These inexhaustible energy sources need a DC-DC converter with a high conversion ratio to augment the voltage magnitude to feed the power grid or power DC-AC converter (Inverter) [9], [10]. The solar arrays give out low output voltage which certainly cannot suffice the voltage requisite. Therefore, the low voltage fed to boost converter to inflate the voltage level to suffice the application requirements [11]- [13]. A traditional Boost converter ( Fig. 1(a)) is not preferred practically to fulfil the high voltage demand due to its design constraints, low efficiency and diode reverse recovery problem etc. [14], [15]. For attain a high voltage conversion ratio, many DC-DC converters with the different boosting technique are reviewed in [16]. Isolated topologies introduce transformer, results in bulky and costly circuitry [17], [18]. Unfortunately, a significant voltage spike across the switch observed due to leakage inductance of the transformer. Thus, energy regeneration and clamping techniques are employed to recycle the energy and to limit the voltage stress [19], [20]. However, these techniques make the circuit complex and increase the cost of the converter. Coupled Inductor employed in the converter, e.g., coupled inductor-based boost converter [21], three winding coupled inductor [22], [23] to attain high voltage conversion ratio. However, additional input filter and active clamped techniques are required to minimize the input current ripple when turns ratio increased to meet desired voltage level, and complex structure is the main drawbacks of these converters [24], [25]. Interleaved converters based on coupled inductor are proposed to attain higher voltage conversion ratio with minimum input current ripple and higher efficiency [26], [27]. Nevertheless, complicated design, control, winding arrangement, and high frequency coupled inductor are the main challenges for these converters.
Numerous non-isolated converters are proposed to achieve high voltage conversion ratio without using a transformer and coupled inductor [28], [29]. Several existing DC-DC converter topologies are analyzed, and the power circuits of DC-DC converter topologies are depicted in Fig. 1 and their voltage conversion ratio is given in the Table-1. Cascaded Boost Converter (CBC) and Quadratic Boost Converter (QBC) are employed in [29], [30], whereas the method of cascading the necessary converters causes very high voltage stresses across the switches. Moreover, the efficiency is likely to get lessened with rising stages because of the several synchronous control switches and semiconductor device losses. In QBC ( Fig. 1(b)), when the control switch turned OFF, the voltage across control switch is equal to the output voltage. Thus, high voltage rating control switch is required to design QBC, which increases the cost and decreases the efficiency of the converter due to higher conduction and switching losses [31]- [33].
Switched Capacitor (SC) and Switched Inductor (SI) are other possible solutions to increase the voltage conversion ratio of the converter. In [34], SI is employed in boost converter to step up the voltage. However, the voltage conversion ratio is not improved by several times and the voltage stress across the switch is equal to the output voltage. To overcome this drawback, several DC-DC converters, e.g. Three-level boost converter, Quadratic Three-level converter, converter using a bootstrap capacitor and inductor, switched capacitor boost converter are proposed [28], [35], [36]. However, the converter voltage conversion ratio is not enhanced by a higher factor even though multiple switches and boosting stages are employed. A high voltage converter is proposed in [37] using several reactive stages. However, it required a large number of inductors, capacitor and diodes.
For overcome the abovementioned drawback, the groundbreaking solution is voltage multipliers to raise the output voltage, which is the most affordable and frugal way to increase the gain of the converter [38]. Non-inverting, as well as inverting boost converter topologies with a combination of the traditional converter with voltage multiplier, are discussed [39]. Later, in [40] Nx inverting configuration of the boost converter is also recommended for photovoltaic DC Link applications. These multiplier boost converter topologies provide a practical solution to intensify the voltage conversion ratio. The multilevel DC-DC converters circuit avail Cockcroft Walton (CW) voltage multiplier which can be a crucial solution for the voltage conversion ratio intensification. Fig. 1(k) and 1(l) show the power circuit of Nx Multilevel Boost Converter (Nx MBC) and Nx Multilevel Buck-Boost Converter (Nx MBBC), respectively [38]- [40]. Reactive elements incorporated in the power converter topology, and operating frequency holds a pivotal role in the designing of the reactive element. Lower magnitudes of reactive components along with high switching frequency serves an acceptable magnitude of the output voltage. However, it also produces a noticeable amount of ripple at the input side.
For clarify the issue of current ripple across the inductor, the value of inductance designed according to application requirement, which may increase the cost, size of the converter and its transient response time. In the original, the configuration of the interleaved structure of positive output multilevel converter for two levels (parallel connected at both input side and load side) is discussed to minimize VOLUME 8, 2020 the input current ripple and the size of the passive components [39], [41]. However, the only circuitry suggested, and the work extended to another CW multiplier based high gain interleaved DC-DC converter with centralized source using negative and positive multiplier for input ripple cancellation (parallel connected at the input side and series-connected at output side) [39], [41], [42] to attain high voltage conversion ratio with minimum input ripple. Two input boost stage interleaved converters [43] is proposed to attain high voltage conversion ratio with minimum input ripple. However, in [43], two sources and load capacitor with a high voltage rating increases the cost of the converter. Modified Dickson charge pump is used to achieve high step-up voltage by reducing the number of semiconductor devices [44]. However, the converter is limited in the number of stages, and further addition of more number of levels is not possible to achieve high voltage as per requirement. Also, the high rating output capacitor is required to attain a constant output voltage. In [45], the structure of 2x interleaved multilevel converter [39] is extended for higher levels (N), and four different modes of operation are suggested with simulation results for renewable energy applications to boost the voltage with high conversion ratio. In [45], the interleaved multilevel structure is obtained from two same Nx multilevel DC-DC converters [38] connected in parallel at the input side and combined at output side and operated at a higher duty cycle. It reduces the current rating of the components as well as reduces the input current distortion compared to Nx MBC suggested in [38].
In light of the advantages of interleaved structure and voltage multiplier, this article contributes to the following: Detail analysis and investigation of a non-isolated Nx Interleaved Multilevel Boost Converter (Nx-IMBC) with hardware implementation for different operation modes to achieve high output voltage and minimum input ripples. Possible modes of operation are discussed with analysis of CCM and DCM boundary condition. The effect of internal inductor resistance and semiconductor devices is analyzed in detail. The design of reactive components and the selection of semiconductor devices are discussed. The comparison of the suggested converter and recently addressed converter is provided in detail to show the benefits. The performance of Nx-IMBC converter is tested through numerical simulation and hardware implementation of 100W three-level prototypes with or without perturbation in input voltage, output reference voltage and power.
This article is structured as follows: Introduction and several existing derived DC-DC converters, the motivation of converter, and the main contribution are discussed in section-I. The circuit description, modes of operation (CCM and DCM) of hybrid non-isolated and non-inverting Nx-IMBC are discussed in section-II. The effect of inductor internal resistance and semiconductor devices on a voltage conversion ratio of Nx-IMBC, steady-state analysis for CCM and DCM, efficiency and power losses are provided in section III. Various range of operation and waveforms discussed in section IV. The design, current and voltage stress, and selection of semiconductor devices for Nx-IMBC are explained in section-V. Also, comparison of Nx-IMBC with recently addressed converters is provided in section V. Experimental and numerical simulation results of Nx-IMBC are discussed with applications in section-VI. Finally, based on the detailed investigation of obtained experimental and simulation results, the conclusion is provided in section-VII.  The main advantages of Nx-IMBC are that in case if one phase of the converter is failing, then also Nx -IMBC provides the same voltage conversion ratio. Additionally, it is also possible to feed Nx-IMBC with two different sources, which required in several applications like PV-FC feeds DC microgrid.
Others merits of Nx-IMBC topology are 1) The non-inverting output voltage, 2) Non-isolated configuration, 3) N-times high voltage conversion ratio compared to traditional Boost converter (N is the number of levels), 4) Low input current and output voltage ripple, 5) Suitable to feed MLI due to capacitor stack, and 6) Voltage stress across semiconductor devices is low. Additionally, Nx-IMBC circuitry is simple, and the number of output levels can be easily increased by adding diodecapacitor circuitry to increase the voltage conversion ratio. The output voltage is calculated by adding the voltage across output side capacitors C 1 , C 2 . . . , and C N as follows, (1)

B. THE POSSIBLE STATES IN CONTINUOUS CONDUCTION MODE
To explain the states of operation, 3x Interleaved Multilevel Boost Converter (Nx-IMBC with N = 3) is assumed with ideal components, capacitors are large enough to provide constant voltage, and the circuit operated in Continuous Conduction Mode (CCM). The proposed converter can exercise in four states of operations.

1) STATE-1: WHEN SWITCHES S 1 AND S 2 ARE ON
When the switches (S 1 and S 2 ) are ON, inductors L 1 and L 2 magnetized from the input source (V in ), and the capacitors C 1 , C 2 and C 3 are discharged through the load (R o ).
The voltage across the capacitors make diodes D 21 , D 22 , D 41 and D 42 forward biased and the load side capacitors C 1 , C 2 discharged through the path of diodes to charge capacitors C 21 , C 22 and C 31 and C 32 , respectively. Fig. 4(a) shows the equivalent power circuit when both the switches S 1 and S 2 are ON. In this mode, diodes D 11 , D 12 , D 31 , D 32 , D 51 and D 52 are reversed biased. The voltage across inductors and capacitors are calculated as follows, 2) STATE-2: WHEN SWITCH S 1 IS ON, AND SWITCH S 2 IS OFF The equivalent power circuit when switch S 1 is ON and switch S 2 is OFF is depicted in Fig. 4(b). The inductor L 1 is magnetized from input voltage (V in ) and at the same time, the capacitors C 1 , C 2 and C 3 charged by inductor L 2 and capacitors C 22 and C 32 . The inductor L 2 and capacitors C 22 and C 32 also charge capacitors C 21 , C 31 of the multiplier cell and provides energy to load (R o ). In this mode, diodes  inductors and capacitors are calculated as follows,

3) STATE-3: WHEN SWITCH S 1 AND SWITCH S 2 ARE OFF
The equivalent power circuit when switches S 1 and S 2 are OFF is depicted in Fig. 4(c). In this mode, inductors L 1 and L 2 are demagnetized to charge output side capacitors. Capacitors C 1 , C 2 and C 3 are charged by series combination V in , L 1 , C 21 , C 31 and series combination of V in , L 2 , C 22 and C 32 . Diodes

4) STATE-4: WHEN SWITCH S 1 IS OFF, AND SWITCH S 2 IS ON
The equivalent circuit of the proposed converter when switch S 1 is OFF and switch S 2 is ON is depicted in Fig. 4(d). The inductor L 2 is magnetized from input voltage (V in ) and at the same time, the capacitors C 1 , C 2 and C 3 charged by inductor L 1 and capacitors C 21 and C 31 . The inductor L 1 and capacitors C 21 and C 31 also charge capacitors C 22 The CCM inductor current and voltage waveforms for all the state are shown in Fig. 5. The equivalent power circuit for this state is depicted in Fig. 6(a). The inductor L 1 is magnetized from input voltage (V in ) and the capacitors C 21 is charged by the capacitor C 1 through diode D 21 and switch S 1 . Capacitor C 31 is charged by the capacitor C 2 through diode D 41 and switch S 1 . At the same time, capacitors C 1 , C 2 , C 3 also discharged through the load (R o ). In this mode, diodes D 11 , D 12 2) STATE-2: WHEN SWITCH S 1 IS OFF, SWITCH S 2 IS ON, AND L 1 CURRENT IS ZERO The equivalent power circuit for this state is depicted in Fig. 6(b). The inductor L 2 is magnetized from input voltage (V in ) and the capacitor C 22 is charged by the capacitor C 1 through diode D 22 and switch S 2 . Capacitor C 32 is charged by the capacitor C 2 through diode D 42 and switch S 2 . At the same time, capacitors C 1 , C 2 , C 3 discharged through the load (R o ). In this mode, diodes D 11 , D 12 , D 21 , D 31 , D 32 , D 41 , D 51 , and D 52 are reversed biased, and diodes D 22 , D 42 are forward biased. The slope of inductor current and capacitors voltage is calculated as follows, 3) STATE-3: WHEN SWITCHES S 1 , S 2 are OFF, L 1 AND L 2 CURRENT IS ZERO The equivalent power circuit for this state depicted in Fig. 6(c). In this mode, all the diodes are reversed biased and capacitors C 1 , C 2 , C 3 are discharged through the load (R o ). The slope of inductor current and the output voltage is calculated as follows, Inductor current and voltage waveforms for all the state of DCM are shown in Fig. 7.

D. BOUNDARY OF CCM AND DCM
In general, DCM is occurring when the inductor current reaches zero. The condition for CCM and DCM for Nx-IMBC is, For simple calculation, assume all the components and semiconductor devices are ideal. Consider D is the duty ratio of gate pulses provided to switches S 1 and S 2 (Note: Both switches have an equal duty cycle (D) and switching frequency). The pulse given to switch S 2 is delayed by 50% compared to switch S 1 . Therefore, according to circuit topology, the voltage across all the capacitors is the same, and the voltage across the load is calculated as follows, It is noteworthy that, the current flowing through both the inductors is same (I L1 = I L2 = I L ). The condition for DCM is obtained as, The boundary for DCM and CCM is shown in Fig. 8. Investigated that B critical (D) decreases as the number of levels increased, and 8/27N 2 is the maximum value of B critical (D) for N level at D = 1/3. VOLUME 8, 2020 FIGURE 6. Equivalent circuit of DCM states (a) Switches S 1 ON, S 2 is OFF, and L 2 operated in DCM (b) Switches S 1 is OFF, Switch S 2 is ON, and L 1 is operated in DCM (c) Switches S 1 and S 2 are OFF, and L 1 and L 2 are operated in DCM.

III. STEADY-STATE ANALYSIS AND EFFECT OF INTERNAL RESISTANCE OF INDUCTOR AND SEMICONDUCTOR DEVICES FOR N X -IMBC A. ANALYSIS IN CCM
In real-time applications, the voltage conversion ratio of any DC-DC converter is restricted by parasitic resistance of passive components or devices; specially inductor of the converter. Parasitic R L1 and R L2 (Equivalent Series Resistance) is considered in series with inductor L 1 and L 2 respectively. The voltage across inductors L 1 and L 2 is calculated when switches S 1 and S 2 are ON and OFF as follow, Note: for simplicity, consider ideal diode (V d = 0) and ideal switch ( Inductor volt balanced second method is applied and equations obtained as follow, 87316 VOLUME 8, 2020 Noted that identical rating inductor are used. So, their internal resistance is the same (R L1 = R L2 = R L ). Thus, By the above equation, the voltage conversion ratio obtained as, In Fig. 9(a) -9(c), the voltage conversion ratio is a plot against duty cycle for various cases of R L /R o when N = 1 to 3. In Fig. 9(d), the voltage conversion ratio is a plot against duty cycle for N = 1 to 5 and R L = 0 (ideal case). Examined that the voltage conversion ratio is linear increases up to duty cycle 80%, and this linear region called a Quasi Linear Region.
To calculate the efficiency of the converter, let us consider voltage V d and V s is the drop of each diode and each switch, respectively.
It is examined that capacitor C 1 transfers its energy to charge capacitor C 21 through diode D 21 and switch S 1 in state I and II. Also, capacitor C 1 transfers its energy to charge capacitor C 22 through diode D 22 and switch S 2 in state I and IV. The voltage across capacitor C 21 and C 22 are obtained as follows, The capacitor C 21 and C 22 transfer its energy to charged capacitor C 2 . The voltage across C 2 is obtained as follows, The capacitor C 2 transfers its energy to charge capacitor C 31 through diode D 31 and switch S 1 in state I and II. Also, capacitor C 2 transfers its energy to charge capacitor C 32 through diode D 32 and switch S 2 in state I and IV. The voltage across capacitor C 31 and C 32 is obtained as follows, Further, observed that the voltage across capacitors C 31 , C 32 , C 41 , C 42 . . . ., C N 1 , and C N 2 is same and equal to V C1 -4V d . The total output voltage is calculated as follows (21), shown at the bottom of the next page. VOLUME 8, 2020 The efficiency (η) of the Nx-IMBC obtained as follows, The power loss due to semiconductor devices (P LS ) and internal resistance of inductor (P Li ) of the Nx-IMBC obtained as follows,

B. ANALYSIS OF DCM
Let's consider, switch S 1 is ON and inductor L 1 is magnetized for the time D 1 T S ; switch S 1 is OFF and inductor L 1 is demagnetized for the time D 2 T S ; and switch S 1 is OFF and inductor L 1 current is zero for the time D 3 T S . Similarly, at 180 • phase shift, switch S 2 is ON and inductor L 2 is magnetized for the time D 1 T S ; switch S 2 is OFF and inductor L 2 is demagnetized for the time D 2 T S ; and switch S 2 is OFF and inductor L 2 current is zero for the time D 3 T S . The time relations obtained as follows, The voltage across inductor L 1 and L 2 for each time-period obtained as follows, By inductor volt-second balanced method, the equation obtained as follows, For simple calculation, consider all the semiconductor devices are ideal, and capacitors are large enough to provide ripple-free voltage. The voltage across the load calculated as follows, If both inductors are identical and ideal then, L 1 = L 2 = L and R L1 = R L2 = 0; The solution of (31) yields two roots. However, we know that the output of the proposed converter is positive. Therefore positive root is selected, and the voltage conversion ratio obtained as follows, Examined that the voltage conversion ratio is loaddependent and consequent increasing converter output impedance. Inductor L 1 and L 2 current waveform (a) when the duty cycle is higher than 50%, (b) when the duty cycle is lesser than 50%, (c) when the duty cycle is equal to 50%.

IV. VARIOUS RANGE OF OPERATION AND INDUCTOR CURRENT WAVEFORM
The converter is possible to control in three different range of duty cycle i) duty cycle higher than 50% ii) duty cycle lesser than 50% and iii) duty cycle is equal to 50%. The slope of the inductor (L 1 and L 2 ) current waveforms are analyzed for three different ranges of duty cycle, as shown in Fig. 10(a)-(c). First, analyzed that the proposed converter operates in states 1, 2 and 4 when the duty cycle is higher than 50%. Second, analyzed that the proposed converter operates in states 2, 3 and 4 when the duty cycle is lesser than 50%. Third, analyzed that the proposed converter operates only in state 2 and 4 when the duty cycle equal to 50%.

V. DESIGN AND COMPARISON OF N X -IMBC
The slope of the inductor currents is used to calculate the critical inductance such that considered current ripples obtained. The critical inductance and current stress calculated as follows, The voltage across all the capacitors is precisely the same if all the diodes are considered ideal. Therefore, due to the balanced voltage structure of voltage multiplier, it is feasible to select all the capacitors with an equal rating. The slope of capacitor voltage is used to calculate the critical capacitance such that considered voltage ripples obtained. The critical capacitance and voltage rating of the capacitor decided as, It is also feasible to select all the diodes with equal rating due to the benefits of voltage multiplier. The voltage and current rating of the diode decided as, The drain to source voltage of both switches S 1 and S 2 calculated and examined that each switch voltage is equal to each capacitor voltage. The current flowing through switch is equal to the addition of inductor current and capacitor clamping current. Voltage and current rating of the switch are decided as, In Table-2, Nx-IMBC configuration compared with existing DC-DC converter in terms of voltage conversion ratio, voltage stress, number of the inductor, number of the capacitor, number of diodes, number of switches, input current behavior. It is noteworthy that the Nx-IMBC provides high voltage conversion ratio with the low voltage across switch, input current ripple cancellation, and without using a more significant number of inductors and switches. In Fig. 11, the Nx-IMBC and existing converters are compared in terms of voltage conversion ratio. Notably, Nx-IMBC provides a practical solution to obtain high voltage with reduce input ripple, and low rating components are suitable to design converter.
at a different output level. Observed that each level contributes to equal voltage (Vo/3, i.e. 40V). Thus, the voltage at the first level is 40V, the voltage at the second level is 80V, and the voltage at the third level is 120V. Fig. 12(c) shows the voltage distribution across output side capacitors (C 1 , C 2 and C 3 ). Investigated that voltage across output side capacitors is equal to Vo/3 (i.e. 40V). The voltage distribution across all the output side capacitors (C 1 , C 2 and C 3 ) shows that the converter performs satisfactorily. Fig. 12(d) shows the voltage distribution across multiplier capacitors. Investigated that voltage across capacitors of the multiplier is equal to Vo/3 (i.e. 40V). The voltage distribution across all the capacitors C 21 , C 22 , C 31 and C 32 shows that the converter performs satisfactorily. Fig. 13(a) shows the inductor current waveform with the gate pulse of switches. Investigated that 5.2A current is flowing through the inductor (L 1 and L 2 ) which is nearly half of the input current (I in /2). Fig. 13(b) shows the drain to source voltage of switches (V DS1 and V DS2 ) with gate to source voltage of switches (V GS1 and V GS2 ). Observed that the drain to source voltage of switches is equal to Vo/3 i.e 40V. This drain to source voltage of switch remains same even also of the voltage levels at the output. Output and input current ripples shown in Fig. 13(c). Observed that the input current and output current ripple is 600mA and 2mA, respectively. Thus, 3Nx IMBC provides a low input and output current ripple, and highly desired in photovoltaic application.
The 3x IMBC investigated experimentally, and the result shows a good match with the simulation results. The detail of the hardware components used for the experimental purpose shown in Table 4. The hardware prototype of Nx IMBC is designed for three-level (3x IMBC) and tested at power 100W, and gate pulses are generated through FPGA with a classical PI controller to control the output voltage. Fig. 14(a) shows the obtained output voltage, input voltage, output current and input current waveform. Examined that output voltage (v o ) 120.17V achieved by feeding input voltage (v in ) 10V. The observed input current (i in ) and output current (i o ) are 10.63A and 808.5mA, respectively. Fig. 14(b) shows the obtained voltage waveform at various levels of the designed converter. Examined that the voltage at level one, two, and three are 40.13V, 80.19V, and 120.21V, respectively. Separately, the voltage across each output side capacitor also measured and shown in Fig. 14(c). The obtained voltage   across capacitor C 1 , C 2 , and C 3 are 40.13V, 40.09V, and 40.05V, respectively. The voltage across multiplier capacitors C 21 , C 31 , and C 22 , C 32 is shown in Fig. 14(d) and Fig. 14(e), respectively. The obtained voltage across capacitor C 21 , C 31 , C 22 , and C 32 is 40.07V, 40.05V, 40.09V, and 40.08V, respectively. Based on the obtained results, it is clear that voltage VOLUME 8, 2020 distributions in all the capacitors are equal, and the magnitude is equal to the voltage at the first level of the converter. Fig. 14(f) shows the waveform of inductor current (i L1 , i L2 ) and input current (i in ). Noted that both the inductor current are same, but shifted by 180 • . The ripple at the input side is nearly cancelled, and 930mA ripple observed in the input current (i in ). Confirmed that if both the switches operated at 50% duty cycle, then the ripples in the inductor current is zero. Fig. 14(g) shows the drain to source voltage waveform of switches S 1 and S 2 (v DS1 and v DS2 ). During OFF state of the respective switch, observed that voltage v DS1 and v DS2 are 41.23V and 41.17V, respectively. Seen that the inductor L 1 and L 2 are charging and discharging when switches S 1 and S 2 turned ON and OFF, respectively. Fig. 14(h) shows the waveform of inductor L 1 and L 2 voltage and current. Observed that the inductor L 1 voltage (v L1 ) during charging and discharging is 10.05V and 30.13V, respectively. Also, observed that the inductor L 2 voltage (v L2 ) during charging and discharging is 10.04V and 30.1V, respectively. It is clear that the magnitude of both the inductor L 1 and L 2 voltage waveform the same but shifted by 180 • .
The performance of the designed converter also tested under the perturbation from the input side, load side and output voltage reference. Note: State-space modelling skipped from the article; however, the results discussed. Fig. 15(a) shows the waveform of input voltage (v in ), inductor L 1 current (i L1 ), output voltage (v o ) and output current (i o ) when power is abruptly changed from 100W to 120W and 120W to 100W. Fig. 15(b) shows the waveform of the drain to source switch S 1 voltage (v DS1 ), inductor L 1 current (i L1 ), output voltage (v o ) and output current (i o ) when power is abruptly changed from 100W to 120W and 120W to 100W. For convenient, the obtained waveforms sectioned in three sections A, B and C. Section A and C are the obtained waveform when the converter operated at 100W, and section B are the obtained waveform when the converter operated at 120W. Highlighted part AB shows the transients when the power of the converter abruptly changed from 100W to 120W. Highlighted part BC shows the transients of the converter when the power of the converter abruptly changed from 120W to 100W. Notably, the output voltage is maintained; even power abruptly changed with constant input voltage (v in ). Due to the constant input voltage (v in ) and output voltage (v o ), inductor current (i L1 ) and output current (i o ) are changed to fulfil the demand for power. There is no change in the drain to source switch voltage (v DS1 ) even power changed 100W to 120W and 120W to 100W because of constant output voltage (v o ). Fig. 15(c) shows the waveform of input voltage (v in ), inductor L 1 current (i L1 ), output voltage (v o ) and output current (i o ) when output reference voltage (v oref ) is abruptly changed from 100V to 110V and 110V to 120V at constant load. For convenient, the obtained waveforms sectioned in three sections A, B and C. Section A, B, and C shows the obtained waveform when converter output reference (v oref ) is set to 100V, 110V, and 120V respectively. Highlighted part AB and BC shows the transients when the power of the converter output reference (v oref ) is changed from 100V to 110V and 110V to 120V, respectively. Noticed that expected output voltage achieved even there is no change in input voltage (v in ). It is interesting to know that to maintain the equal power at the input and output side, inductor current (i L1 ) and outputs current a changed according to output voltage reference (v oref ). Fig. 15(d) shows the waveform of input voltage (v in ), inductor L 1 current (i L1 ), output voltage (v o ) and output current (i o ) when the input voltage (v in ) abruptly changed from 8V to 10V and 10V to 12V. Section A, B, and C shows the obtained waveform when the converter input voltage (v in ) set at 8V, 10V, and 12V, respectively. Highlighted part AB and BC shows the transients when input voltage (v in ) converter abruptly changed from 8V to 10V and 10V to 12V, respectively. Notably, constant output voltage (v oref ) 120V achieved even changed in input voltage (v in ). For maintain the equal power at the input and output side, the inductor current is increased or decreased according to input side voltage (v 1 ).   (v in ) abruptly changed from 8V to 10V, 10V to 12V, and 12 V to 14V. Section A, B, C and D show the obtained waveform when the converter input voltage (v in ) set at 8V, 10V, 12V and 14V, respectively. Highlighted part AB, BC and CD shows the transients when input voltage (v in ) converter abruptly changed from 8V to 10V, 10V to 12V, and 12V to 14V respectively. Drain to source voltage of switch S 1 (v DS1 ) and output voltage (v o ) is constant even input voltage changed. For maintain equal power at the input and output side, the inductor current is increased or decreased according to the input voltage (v 1 ). Various tests conducted, and observed efficiency at 100W shown in Fig. 16(a). It observed that on an average 91.37% efficiency of the 3x IMBC. It noted that the 3x IMBC is slightly improved when compared to the multilevel boost converter (∼89%) at 100W proposed in [38], Interleaved Converter (∼94%) at 150W proposed in [43], and Interleaved converter (∼93.5%) proposed in 150W [44].
The converter is operated at various power levels from 60W to 120W. The observed efficiency at various power levels shown in Fig. 16(b). During power variation, the efficiency of the 3x MBC is in range of 87 to 92%. Majorly, the PV to the grid system, MLI circuitry needs several voltage sources along with several DC-DC converters at the input side. The Nx-IMBC configuration is suitable to feed MLI due to capacitor stack structure at the output side, as shown in Fig. 17. The Nx IMBC provides a solution to feed MLI with single DC-DC converter. Additionally, the Nx-IMBC configuration finds the applications like automotive, renewable appliances, electric vehicles and microgrid were low to high conversion ratio is necessary. Further, it is also possible to increase the phases of the interleaved converter based on the applications, e.g. four phases Nx IMBC possible configuration is shown in Fig. 18.

VII. CONCLUSION
The detail investigation and boundary of CCM and DCM with steady-state analysis of hybrid Nx-IMBC are presented. Nx-IMBC converter topology extended the feature of 2x interleaved boost converter and combines the features of the interleaved converter and recently proposed Multilevel Boost Converter (MBC). Nx-IMBC provides higher voltage conversion ratio compared to recently addressed converters with reduced input ripples. The main advantages of Nx IMBC are that in case if one phase of the converter is failing, then also Nx-IMBC provides the same voltage conversion ratio. Additionally, it is also possible to feed Nx-IMBC with two different sources.
Additional merits of the novel converter include: 1. The non-inverting output voltage, and performed as similar as a recently proposed multilevel boost converter. 2. Non-isolated configuration, and avoided bulky transformers. 3. Low input/output current and output voltage ripple. 4. Voltage stress across the switch is low. 5. The number of output side levels raised by adding a diode-capacitor circuit, thereby the voltage conversion ratio increased. Moreover, the Nx-IMBC converter compared with a new non-isolated DC-DC converter and multilevel converters in terms of switch voltages and number of components. Based on the experimental and simulation result, it is possible to conclude that Nx-IMBC is a promising topology for feeding MLI, photovoltaic applications, automotive appliances, PV drives, and electric vehicles. The experimental shows a good match with simulation results and verifies the validity of the design, feasibility, working of the converter.  He was with ABB Scandia, Randers, Denmark, from 1987 to 1988. He became an assistant professor in 1992, an associate professor, in 1996, and a full professor of power electronics and drives, in 1998. In 2017, he became a Villum Investigator. He has published more than 600 journal articles in the fields of power electronics and its applications. He is the coauthor of four monographs and an editor of ten books in power electronics and its applications. His current research interests include power electronics and its applications such as wind turbines, PV systems, reliability, harmonics, and adjustable speed drives.
Dr UMASHANKAR SUBRAMANIAM (Senior Member, IEEE) is with the Renewable energy Lab, College of Engineering, Prince Sultan University, Saudi Arabia, and has 15+ years of teaching, research, and industrial research and development experience. Previously, he worked as an Associate Professor, the Head, and a Senior Research and Development and Senior Application Engineer in the fields of power electronics, renewable energy, and electrical drives, with the Vellore Institute of Technology (VIT), Vellore. Under his guidance, 24 master's degree students and more than 25 bachelor's degree students completed the senior design project work. Also, six Ph.D. degree scholars completed their doctoral thesis as research associates. He is also involved in collaborative research projects with various international and national level organizations and research institutions. He has published more than 250+ research articles in national and international journals and conferences. He has also authored/coauthored/contributed 12 books/chapters and 12 technical articles on power electronics applications in renewable energy and allied areas. He is a member of the IACSIT, IDES, and ISTE. He has taken charge as the Vice-Chair of the IEEE Madras Section and the Chair of the IEEE