A Buck Type Multi-Input Distributed Generation System With Parallel-Timesharing Power Supply

This paper proposes the circuit structure, topological family and energy management control strategy (EMCS) of a Buck type multi-input distributed generation system (DGS) with parallel-timesharing power supply. Also, the power supply modes (PSMs) and their smooth transition, as well as the control loops and multiple duty cycles expression are studied. The circuit structure is composed of a Buck type single-stage multi-input inverter and a single-stage isolated battery charging/discharging converter, with their outputs parallel-connected on the AC side. The topological family includes full-bridge etc. 3 types of circuit. By comparing the load power and the total generated multi-input sources power, the proposed EMCS achieves real-time control of charging/discharging converter’s power flow and the system’s smooth transition among different PSMs. The proposed “variable inductances equivalent method” regards the output filter inductor as the parallel connection of two virtual inductances, based on which the small signal model of multi-input inverter is established and the corresponding control loops are designed. Experimental results of a 3kVA laboratory prototype have shown that the proposed circuit topology has a good performance of high conversion efficiency, low distortion of output voltage, and galvanic isolation among load, multi-input sources and battery, etc.


I. INTRODUCTION
Due to the increasing shortage of traditional fossil energy, new energies such as photovoltaic (PV) cells, wind power possess a high level of penetration as they are clean, pollution-free and abundant. However, the periodic nature of the generated power and the intermittent characteristics of single new energy introduce adverse impacts on the power system performance [1]- [3]. In order to become independent as much as possible from these impacts, and improve the stability of new energy power generation system, the DGSs that combines multiple new energies have been implemented [4]- [8].
A two-stage multiple single-input DC-DC converters type DGS was proposed in [9]- [11], which was constructed by multiple single-input DC-DC converters and a cascaded Buck type inverter. The outputs of the single-input DC-DC converters were connected in serial or in parallel. This kind of DGS The associate editor coordinating the review of this manuscript and approving it for publication was N. Prabaharan . has deficiencies of two-stage power conversion, bulky size and high cost.
When replacing the multiple single-input DC-DC converters with one multi-input DC-DC converter, the twostage multi-input DC-DC converter type DGS was formed in [12]- [18]. A two-stage integrated Boost/dual half-bridge DC-DC converter type DGS was presented in [12]. The two input sources of PV and wind power adopted MPPT control. The battery was current-limited charged during gridconnected operation, and complemented the load power or absorbed the surplus power during island operation. This DGS was single-stage power conversion when the battery was charged but three-stage conversion when discharged. Also, control of the system was complicated and not available to extend to n-sources. A two-stage combined Buck/Buck-Boost multi-input DC-DC converter type DGS was discussed in [13]. The PV and wind power adopted MPPT control, and Buck inverter adopted DC bus voltage outer loop, gridconnected current inner loop control. A two-stage combined Buck/Boost/Buck-Boost multi-input DC-DC converter type DGS was presented in [14], in which the multi-input DC-DC converter can operate in Buck, Boost, and Buck-Boost modes. However, the EMCS of the system was not mentioned. A twostage LCC resonant multi-input DC-DC converter type DGS was proposed in [15]. The multi-input DC-DC converter was composed of multiple LCC resonant chopper units and a DC filter. The chopper units were connected in serial on the secondary side of high-frequency (HF) transformer, yet the EMCS of the system was not discussed either. The DGSs in [13]- [15] have the features of multi-input sources supplying power at the same time, a wide range of duty cycle adjustment, but requiring multiple free-wheeling diodes, and hard to extend to n-sources. A two-stage multi-winding Boost DC-DC converter type DGS was proposed in [16]. The former stage adopted the maximum power phase-shift PWM control strategy, and the latter stage used the DC bus voltage outer loop, grid-connected current inner loop unipolar SPWM control strategy. A two-stage multi-winding Buck DC-DC converter type DGS was presented in [17], in which the former stage adopted PWM phase-shift control strategy, but the EMCS of the system was not discussed. All the inputs and output in [16], [17] were HF isolated, and could supply power simultaneously or in timesharing. However, there were too many power switches in the circuits, and both the HF transformer's structure and control strategy were complicated. A two-stage Buck-Boost multi-input DC-DC converter type DGS was proposed in [18]. The fuel cell adopted peak current control to achieve constant output current, and the wind power was controlled by DC bus voltage regulation. It has simple circuit structure and control strategy, low voltage stress over power switches, well integrated and easy to extend to n-sources, despite of a small range of duty cycle adjustment.
In conclusion, two-stage multi-input DC-DC converter type DGS simplifies the circuit structure and reduces the cost. However, it still has a two-stage circuit structure, thus the conversion efficiency and power density are not satisfactory. Besides, when a battery charging/discharging converter is connected with the DC bus, it is two-stage power conversion whether the battery is charged by multi-input sources or discharges to the AC load. Consequently, the conversion efficiency is still not ideal.
In order to further simplify the circuit structure and reduce power conversion stage, it is necessary to seek a multi-input inverter with a single-stage circuit structure and its DGS. This paper proposes the circuit structure, topological family and EMCS of a Buck type multi-input DGS with parallel-timesharing power supply. Theoretical analysis and experimental results indicate that the proposed multi-input DGS possesses some distinct advantages as follows.
(i) The multi-input inverter directly converts the total multi-input sources power into LF alternating current, exhibiting a simple circuit structure.
(ii) Single-stage power conversion during battery discharge, and single-stage or two-stage conversion during battery charge, which is favorable for conversion efficiency.
(iii) The proposed EMCS achieves real-time control of charging/discharging converter's power flow and the stability of output voltage as well as smooth transition among different PSMs.
(iv) The proposed L r -C r parallel-resonant circuit effectively suppresses the low-frequency current ripple on battery side, which is favorable for interfacing the battery and its single-stage converter.
(v) Galvanic isolation between any two of the load, multiinput sources and battery.
The rest of this paper is organized as follows: Section II illustrates the circuit structure and topological family. The EMCS, PSMs of the proposed DGS and the mechanism of their smooth transition are elaborated in Section III. Section IV sheds light on the design of the system's control loops. Analysis on key issues, e.g., derivation of multiple duty cycles expression, is given in Section V. Section VI depicts the prototype experimental verification of the proposed DGS and its EMCS, followed by the drawn conclusion in Section VII.

II. CIRCUIT STRUCTURE AND TOPOLOGICAL FAMILY
The circuit structure and topological family of the proposed Buck type multi-input DGS are shown in Fig. 1. The DGS is composed of a Buck type single-stage multi-input inverter with external parallel-timesharing selection switches and a single-stage isolated battery charging/discharging converter, with their outputs connected in parallel on the AC side.
The multi-input inverter is cascaded by the input filter capacitors C i1 ∼ C in , the external parallel-timesharing bi-directional selection switches S s1 ∼ S sn , HF inverting bridge, output filter inductor L f1 , line-frequency (LF) transformer T 1 and output filter capacitor C f . ''Timesharing'' denotes that each parallel-connected input source separately delivers energy through its selection switch (S s1 ∼ S sn ) at a time during a single high-frequency switching period. Using four quadrant switches S s1 ∼ S sn could prevent the short circuit among different inputs, because S s1 ∼ S sn conduct in timesharing, there's no current flow path between any inputs. The L r -C r parallel-resonant circuit is designed to suppress the low-frequency current ripple on the battery side.
For half-bridge topologies shown in Fig. 1(c), the multiinput sources voltage are imposed in timesharing on the bridge-arm capacitors C 1 , C 2 in a HF switching period, thus the sources voltage should be approximately the same, which restricts the practicability to a great extent. However, for push-pull and full-bridge topologies shown in Fig. 1(b), (d), the input sources voltage allows differences. Variation in input sources voltage reflects on the voltage across its own capacitor C i1 ∼ C in and the rising slope of inductor current i Lf1 . Compared the proposed DGS with the entire two-stage parallel-timesharing multi-input DC-DC converter type DGS in [18], the proposed DGS has less power switches and only one filter inductor.
The connection of the HF transformer T 2 's secondary winding and cycloconverter is adjusted from the collectors of S b5 and S b7 to collectors of S b6 and S b5 , which shortens the lead wire of secondary winding in practical circuit thus the leakage inductance of T 2 decreases. This kind of connection is different from the conventional way in [19]. Instead of a DC link in other multi-input converters, this paper proposes an AC link topology which incorporates the new energy sources and a battery. Therefore, the input sources intermittency could be taken care of by the battery through charging/discharging converter, and the output voltage of the system is maintained stable.
It can be seen that the proposed DGS has the following features: (1) the multi-input inverter directly converts the total multi-input sources power into LF alternating current, exhibiting a simple circuit structure; (2) single-stage power conversion during battery discharge, single-stage or two-stage conversion during battery charge, and small low-frequency current ripple on battery side; (3) galvanic isolation among AC load, multi-input sources and battery; (4) the primary leakage inductance of transformer T 1 can be used as the filter inductor for half-bridge and full-bridge circuits in Fig. 1(c), (d).

III. EMCS OF PROPOSED DGS A. MAXIMUM POWER EMCS
Major concerns of EMCS for DGSs are: (1) energy management of multi-input sources; (2) MPPT control of new energy equipment such as PV, wind power and (3) stability of output voltage. Take full-bridge topology shown in Fig.1(d) and PV, wind power two inputs as an example (the same below), the maximum power EMCS with analogous-rectifying unipolar phase shift of the proposed DGS is illustrated in Fig. 2.
The single-stage multi-input inverter employs maximum power energy management SPWM control strategy, which consists of PV, wind power MPPT voltage outer loops and inductor current inner loops. By sampling the voltage and current of the two input sources, the MPP voltage U * i1 and U * i2 can be obtained through MPPT algorithm. i 1r , i 2r , as the product of PV, wind power MPPT voltage outer loop signals I 1r , I 2r and AC voltage synchronous signal sin(ωt), are the references of each inductor current inner loop, and I 1r i Lf1 /(I 1r + I 2r ), I 2r i Lf1 / (I 1r + I 2r ) are the corresponding feedback signals of inductor current. Their error amplifying signals and the output volt- ] are respectively summed up to obtain the driving signals of S s1 ∼ S s2 and S 1 ∼ S 4 .
As is shown in Fig. 2(a), driving signal of S s1 is obtained right from its regulated signal i e1 . However, as the two inputs are parallel-connected, driving signal of S s2 cannot be obtained right from i e2 as to prevent short-circuit case between the two inputs. Regulated signals i e1 and i e2 are summed up by a summator to generate the total duty cycle of two inputs. By deducing the duty cycle of S s1 , driving signal of S s2 is obtained. Therefore, S s2 is turned on only after S s1 turned off, and the two inputs supply power in a parallel-timesharing way in a HF switching period, as shown from waveforms of S s1 and S s2 in Fig.2 (b).
It should be noted that as the two inputs are parallelconnected through S s1 , S s2 , a dead-time interval is mandatory between S s1 and S s2 . Nevertheless, it arises a turnoff voltage spike over selection switches because of no feedback path for i Lf1 while u o i Lf1 < 0. In order to restrain the voltage spike, drive signals of S s12 , S s22 need to be adjusted from the original ones which is the same as S s11 , S s21 respectively to the reversed signals of S s21 , S s11 , respectively, so that an overlap time between S s12 and S s22 is generated. As the feedback path is ensured, the turnoff voltage spike is intrinsically restraint.
The battery charging/discharging converter adopts analogous-rectifying unipolar phase-shifted control strategy. It implies that (1) a phase-shifted angle δ between the right and left bridge legs of HF inverting bridge, and the front-end voltage of the output filter u EF is an unipolar SPWM wave; (2) during the positive half cycle of output voltage, S b6 (S b6 ) and S b7 (S b7 ) are turned on, the rectification circuit composed of S b5 (S b5 ) and S b8 (S b8 ) rectifies the secondary side voltage u CD into positive half cycle SPWM wave, while during the negative half cycle, S b5 (S b5 ) and S b8 (S b8 ) are turned on, the rectification circuit composed of S b6 (S b6 ) and S b7 (S b7 ) rectifies u CD into negative half cycle SPWM wave, therefore it is called analogous-rectifying control. By adding an overlap time to rectification power switches, energy could be backward transferred to the battery side.
Features of the proposed EMCS are: (1) direct control of i Lf1 is realized by decomposing i Lf1 ; (2) the cycloconverter switches are ON in half cycle and zero-voltage turnoff HF operation in another half cycle, hence reduces the switching losses; (3) soft commutation of leakage inductance and filter inductor current is realized without judging the polarity of i Lf2 .

B. PSMs
Comparing the load power P o and the total input power P 1max + P 2max , the proposed DGS has three PSMs.
Mode I: P 1max + P 2max > P o , two inputs supply the load and battery simultaneously, and the system is equivalent to a single-stage multi-input inverter and a single-stage VOLUME 8, 2020 Boost-type HF rectifier, with the battery output power Mode II: P 1max + P 2max < P o , two inputs and the battery supply the load at the same time, while the system is equivalent to a single-stage multi-input inverter and a single-stage Buck-type HF inverter parallel-connected in their outputs, with the battery output power P o − (P 1max + P 2max ) > 0.
Mode III: P 1max + P 2max = P o , the two inputs only supply power to the load, while the battery output power is 0 (the charging/discharging converter operating in no-load condition). However, in the extreme case while neither the 1 st nor the 2 nd input supplies power, that is, P 1max + P 2max = 0, the load power is totally provided by the battery, which is an exceptional case of Mode II.
Usually, the capacities of multi-input sources, battery and load are configured in a certain proportion. In the proposed DGS, the capacities of multi-input sources, battery and load are configured equally to verify the maximum power EMCS. Therefore, the PV cells and wind generator normally work at their MPPs. On the other hand, when adding battery voltage loops to the MPPT voltage outer loops of PV and wind generator, making PV or wind generator not work at their MPPs, overcharge of battery can be avoided.

C. MECHANISM OF SMOOTH TRANSITION AMONG DIFFERENT PSMs
For output filter capacitor C f and load Z L , the parallel connect of multi-input inverter and charging/discharging converter is equivalent to the parallel superposition of two current sources. From Fig. 2 (a) the EMCS indicates that inductor current i Lf1 (or i N 12 N 12 /N 11 ) is in phase with output voltage u o , providing the active power; the phase difference θ between charging/discharging converter's inductor current i Lf2 and u o differs by the amount and direction of active power for the converter. In this regard, the phasor diagram of output fundamental component on AC side under three PSMs and different load properties, can therefore be drawn in Table 1, where ϕ is the power factor angle of the load.
When P 1max + P 2max = P o , namely, I N 12 = I o cosϕ, the phase difference |θ| = 90 • , and the active power of charging/ discharging converter is 0, thus the battery output power P b = 0 (no-load condition)-Mode III. When the load power increases, making P 1max + P 2max < P o , that is, I N 12 < I o cosϕ, u o decreases and the phase-shifted angle δ decreases too, while the phase difference spontaneously adjusts to 0< |θ | < 90 • ; the charging/discharging converter delivers active power, thus battery complements the load power at P b = P o − (P 1max + P 2max ) > 0-Mode II. When the load power decreases, making P 1max +P 2max > P o , that is, I N 12 > I o cosϕ, u o increases and the phase-shifted angle δ increases too, while the phase difference becomes 90 • < |θ| < 180 • ; the charging/discharging converter absorbs active power, thus surplus power from the 1 st and 2 nd input charges the battery at P b = P o -(P 1max + P 2max ) < 0-Mode I. Hence, by comparing the load power P o and the total generated multi-input sources power P 1max +P 2max , the proposed EMCS achieves real-time control of charging/discharging converter's power flow and stability of output voltage, as well as the smooth transition among different PSMs.

IV. DESIGN OF CONTROL LOOPS
The output voltage of the proposed DGS is regulated stable by the battery charging/discharging converter, which can be metaphorically regarded as a ''grid-connected voltage'' for the single-stage multi-input inverter. Therefore, the control loops include 2 current loops for the multi-input inverter and a voltage loop for the charging/discharging converter, which are independent of each other and therefore can be designed separately. This section focuses on the analysis of the current loops design.

A. VARIABLE INDUCTANCES EQUIVALENT METHOD AND SMALL SIGNAL MODELING
Since the two input sources share a common output filter inductor L f1 , it can be equivalent to the parallel connection of two inductances L f11 and L f12 . Consequently, i Lf1 can be regarded as the sum of corresponding inductor current i Lf11 for 1 st input source power and i Lf12 for 2 nd source power, as shown in Fig. 3.
I 1r , I 2r are the MPPT voltage outer loop signals of PV, wind power, respectively. Therefore L f11 and L f12 can be derived as L f11 , L f12 changes with the value of I 1r and I 2r , hence it is called ''variable inductances equivalent method''. When only the 1 st input source works, I 2r = 0, L f11 = L f1 , L f12 = ∞; when only the 2 nd input source works, I 1r = 0, L f12 = L f1 , and L f11 = ∞.
When the two input sources jointly work, variations ofd 1 (s),d 2 (s) affectî Lf 11 (s),î Lf 12 (s) due to G 12 (s), G 21 (s). In other words, single-stage multiple-input inverter is a strong coupling multiple-input multiple-output control system, thus the current regulator design in control loops is complicated. However, when only the 1 st or 2 nd input source works, there's only one current loop for the inverter, in this case L f11 = L f12 = L f1 .

B. CURRENT REGULATORS DESIGN
From the small signal model shown in Fig. 4(b), the loop gain when only the 1 st input source works is: From Fig. 4(c), the loop gain when only the 2 nd input source works is: When the two input sources jointly work,î 2r (s) in Fig. 4(a) is considered ''0'' to derive the 1 st current loop gain. Therefore, the 1 st current loop gain under two input sources joint work is and the 2 nd current loop gain under two input sources joint work can be deduced as If the parameters of the two current regulators from (3), (4) are taken into (5), (6), and the two current loop gains meet the stability and rapidity requirements, then the design process is completed; otherwise, the parameters of the two current regulators need to be readjusted and substituted into (5) and (6) to verify the stability and rapidity again. Here, it is considered that when the phase margin of the loop gain is higher than 45 • and the cut-off frequency f c satisfies f s /20< f c < f s /5, the system meets the stability and rapidity requirements.
Switching frequency of multi-input inverter f s = 30kHz, take f c ≈3kHz as the cut-off frequency of the current loop. Other parameters are: (5) and (6), the frequency characteristics of the two current loop gains under two input sources joint work can be drawn in Fig. 5.
It can be seen from Fig. 5 that the cut-off frequency of the 1 st current loop gain is 3.85kHz, the amplitude at 50Hz is 52.3dB and the phase margin is 49.7 • ; for the 2 nd current loop gain, the cut-off frequency is 3.85kHz, the amplitude at 50Hz is 53.4dB and the phase margin is 50.1 • . Therefore, the design of the two current regulators meets the stability and rapidity requirements under three working cases.

V. ANALYSIS ON KEY ISSUES A. DERIVATION OF MULTIPLE DUTY CYCLES EXPRESSION
The output AC voltage can be described as where d 1 , d 2 are the multiple duty cycles of multi-input inverter, d b is the duty cycle of the charging/discharging converter. Assuming that L f1 is large enough, current ripple of i Lf1 can be neglected. The average value of inductor current i Lf1 in a HF switching period T s is I Lf1avg ; the average values of each inner current loop reference for the 1 st and 2 nd input sources are I 1ravg , I 2ravg , respectively; u o can be regarded as a constant value U oavg in a switching period. Therefore, in a T s , the average output power of 1 st , 2 nd input and the primarywinding port of T 1 is From power balance and (9)-(11), there is d 1 , d 2 can be derived from (7), (9), (10) as: For an output line cycle, (13) is rewritten as Taking d 1 and d 2 in (14) as the feedforward subjects in respective current loops, to ensure that I 1r /I 2r = P 1 /P 2 (P 1 and P 2 are the average power in a line cycle of the 1 st and 2 nd input, respectively).

B. LOW-FREQUENCY CURRENT RIPPLE SUPPRESSION
The L r -C r parallel-resonant circuit is added to suppress the low-frequency current ripple on battery side. Assuming that the conversion efficiency of charging/discharging converter is η, the voltage variation across C b is From (15) we obtain (16) and the voltage variation is taken U Cb = 10%U b .
The voltage across C r (17) and the current through L r In addition, L r , C r is restricted by

VI. EXPERIMENTAL VERIFICATION
Taking full-bridge topology in Fig.1(d) as an example, to verify the effectiveness of the proposed circuit topology and EMCS. Key parameters are listed as follows: rated capacity 3kVA, the PV and wind power in the experiment are both simulated by TopCon programmable DC power supply TC.P. 16.800.400.S, which exhibits the same characteristics as PV cells; the 1 st input MPP is set at (1275W/288V/ 4.43A) and the 2 nd input MPP is set at (915W/250V/3.66A), both under room temperature 25 • C and light intensity 1000W/m 2 ; battery voltage U b = 96V, output voltage u o = 220V/50Hz, switching frequency f s = 30kHz, input filter capacitors C i1 = C i2 = 4000µF, C b = 14.1mF, resonant circuit L r = 1.1mH, C r = 2300µF, L f1 = 1.0mH, L f2 = 1.2mH, turns ratio N 11 /N 12 of T 1 is 57/80, for T 2 N 21 /N 22 = 9/40, IGBT IXXH50N60B3D1 for power switches S s11 ∼ S s22 and S 1 ∼ S 4 , MOSFET IXFH150N20T for S b1 ∼ S b4 , IGBT IXXH40N65B4H1 for S b5 (S b5 ) ∼ S b8 (S b8 ), DSP TMS320F 28335 for control circuit chip, and the MPPT algorithm employs open-circuit voltage and disturbance observation methods.
Steady-state experimental waveforms of the proposed topology at U i1 /U i2 = 288V/250V, rated resistive load and PSM II are illustrated in Fig. 6.
Steady-state experimental waveforms of the charging/ discharging converter at U i1 /U i2 = 288V/250V, rated resistive load and PSM II are illustrated in Fig. 7. It can be seen that: (1) L r -C r parallel-resonant circuit effectively suppresses the low-frequency current ripple on battery side, as shown in Fig. 7(a), (b); (2) both the leading and lagging leg switches S b3 and S b4 achieve zero voltage switching (ZVS) turn-on, as shown in Fig. 7(c); (3) the cycloconverter switches work at half cycle HF square wave and half cycle high level, and also achieve ZVS turn-off, as shown in Fig. 7(d). Steady-state experimental waveforms of the proposed topology at U i1 /U i2 = 288V/250V, different load properties and PSMs are depicted in Fig. 8.
In Fig. 8(a), P 1max + P 2max ≈2kW, inductive load power S ≈1kVA, the surplus power charges the battery with the phase difference 90 • < |θ | < 180 • and the system operates in Mode I; in Fig. 8(b), P 1max +P 2max ≈ 2.25kW, capacitive load power S ≈3kVA, and battery output power P b ≈0 with the phase difference |θ | ≈90 • , the system operates in Mode III; Fig. 8(c) shows the 1 st , 2 nd inputs and battery supplying the rectifier type load at the same time.    Fig.9 (a), the 1 st and 2 nd inputs work at MPPs (1275W/288V/4.43A), (915W/250V/ 3.66A) throughout the operation, P o in Stage 1, 3 is 1kW while in Stage 2 is changed to 3kW. During Stage 1, 3, P 1max +P 2max > P o and the battery current i b < 0, the system works in Mode I; during Stage 2, P 1max + P 2max < P o , i b > 0, the system switches to Mode II. In Fig. 9(b), the MPPs of the 1 st and 2 nd inputs at light intensity of 1000W/m 2 are (1275W/288V/4.43A), (915W/250V/3.66A), while P o keeps constant in 1kW. During Stage 1, P 1max + P 2max > P o , i b < 0, the system works in Mode I; during Stage 2, the light intensity of two inputs suddenly drops to 500W/m 2 , resulting in P 1max + P 2max = P o , i b = 0, the system switches to Mode III; during Stage 3, the light intensity decreases to zero and the two inputs stop working; I i1 , I i2 decreases to 0 and U i1 , U i2 rapidly rise to their respective open-circuit voltage, resulting in P 1max +P 2max < P o , i b > 0, the system switches to Mode II. Therefore, the proposed DGS exhibits smooth transition among different PSMs under sudden change of load power and light intensity.
The conversion efficiencies of the proposed single-stage multi-input inverter and its DGS are shown in Fig. 10, wherein the efficiency of transformer T 1 at 3kVA is 97.2%. In Fig. 10(a), switching loss and core loss of T 1 and L f1 possess a high proportion, resulting in a lower efficiency under light load; while under heavy load, the conduction loss and the copper loss of T 1 and L f1 are in proportion to the square of current RMS value, thus the conversion efficiency increases and then decreases, with an efficiency of 92.5% at full load of 3kW and a maximum efficiency 93.2% at 1.7kW. In Fig. 10(b), the full-load conversion efficiencies when P 1max + P 2max is 1kW and 2kW are 91.0% and 92.4%, respectively. Conversion efficiency at P o = 3kW under P 1max + P 2max = 2kW is higher than 1kW, because the inverter reaches its highest efficiency at 1.7kW, while charging/discharging converter has its highest efficiency of 92.2% at 1.3kW. In addition, resonant inductor L r on the battery side occupies copper loss too.
Compared the proposed topology with [9][10][11][12][13][14][15][16][17][18], conversion efficiency of the two-stage single-input Buck-Boost DC-DC converter type DGS described in [11] was only 81% at input voltage 18V, output voltage 30V50Hz, and output power 43.2W, THD of grid-connected current was 1.6%; in [13], THD of grid-connected current was 4.5% at input voltage 360V/120V, output voltage 110V60Hz, and rated power 1kW, with no conversion efficiency given; in [16], THD of grid-connected current was 1.32% at input voltage 48V/48V, output voltage 220V50Hz and rated power 1kW, with no conversion efficiency given either. Conversion efficiencies and THD of output waveform in other two-stage DGSs mentioned were not given, unfortunately. It is thus evident that the singlestage multi-input inverter and its DGS proposed in this paper exhibit a good performance of simple circuit structure, singlestage power conversion in discharging state, high conversion efficiency and low distortion of output voltage, galvanic isolation among AC load, multi-input sources and battery, which possesses a certain theoretical and applicable value in multiple new energies distributed generation occasions.

VII. CONCLUSION
The circuit structure, topological family and EMCS of a Buck type multi-input DGS with parallel-timesharing power supply have been proposed in this paper. The circuit structure is single-stage power conversion during battery discharge, and single-stage or two-stage conversion during battery charge, which is favorable for conversion efficiency; Galvanic isolation between any two of the load, multi-input sources and battery. The proposed maximum power EMCS achieves real-time control of charging/discharging converter's power flow and the stability of output voltage as well as smooth transition among different PSMs. Also, the ''variable inductances equivalent method'' has been proposed to establish the small signal model of multi-input inverter and corresponding control loops. The proposed L r -C r parallel-resonant circuit effectively suppresses the low-frequency current ripple on battery side, which is favorable for interfacing the battery and its single-stage converter. These features, effectiveness, and feasibility of the proposed topology have been evaluated and verified by experimental results of a 3kVA 240-360VDC/220V50Hz AC laboratory prototype.