An Original Hybrid Multilevel DC-AC Converter Using Single-Double Source Unit for Medium Voltage Applications: Hardware Implementation and Investigation

In this article, an original hybrid multilevel DC-AC converter configurations are proposed by using single-double source unit for medium voltage applications. The proposed topologies are derived by hybridization of single and double source units with polarity changer and cascaded with full-bridge converter for medium and high voltage applications. Two different hybrid topologies presented and each topology configured for both symmetric and asymmetric method. The proposed hybrid topologies compared with the conventional cascaded H-bridge converter (CHB), and the best topologies recommended for medium voltage applications. The comparison in terms of the number of switches, gate driver circuits, maximum blocking voltage by switches and total peak inverse voltages of switches presented. The proposed topologies require a small installation area and low cost. The validity of the proposed hybrid converter structures is verified by simulation using MATLAB/Simulink and hardware results. The simulation and hardware results show a good agreement with the theoretical approach.


I. INTRODUCTION
Multilevel DC-AC converters are the preferred choice of a power converter in medium voltage and high power applications. Generally, the multilevel converters generated staircase output voltage with several D.C. source as input [1]- [3]. The multilevel converter has numerous advantages over two-level inverter like low output voltage total harmonic distortion (THD), low Electromagnetic Interference (EMI), reduced the size of L.C. filter, low dv/dt stress and overall higher The associate editor coordinating the review of this manuscript and approving it for publication was Ramazan Bayindir . efficiency [4]- [8]. The three primary conventional multilevel converters are Neutral Point Clamped (NPC), Flying Capacitor (F.C.) and Cascaded H-bridge (CHB) multilevel inverter. The main advantage of Neutral Point Clamped (NPC) topology is that it is more suitable for back to back operation in HVDC applications. However, NPC has some drawbacks including the following: 1) it generates output voltage equals half of the input voltage; it requires additional circuits for voltage balancing of DC-link capacitor, and 3) it uses high number of power diode [9]. Flying capacitor (F.C.) [10] converter topology produces full input voltage at the output, but this topology uses a large number of DC-link capacitor to achieve a high number of output voltage levels. Furthermore, the reliability of the converter is reduced due to the large number of capacitors used in this design. Cascaded H-bridge converter (CHB) [11]- [13] topology is attractive due to their modular structure and more redundant state. This topology consists of a series connection full-bridge two-level inverter with isolated D.C. source, and it does not require any additional power electronic components. This topology configured as symmetric and asymmetric methods. In the symmetric configuration, the magnitude of all the dc sources are equal and results in a large number of power electronic switches to obtain the high number of output voltage which is not the case in an asymmetric configuration where the magnitude of D.C. source can determine in geometric progression (binary and trinary method). Therefore, it requires fewer switches to generate a high number of voltage levels. Generally, the conventional multilevel inverter topology always requires the high number of switches to generate a higher number of output voltage levels. As a result, the switching pulse generation is sophisticated, the installation area is large, and the total cost of the converter is high.
New symmetric multilevel converter, non-isolated dc sources with bidirectional switches presented [14]. This converter topology uses various voltage ratings of power switches. It can be extended to n number of sources and required n number of the various voltage rating of switches. A new semi-cascaded inverter is proposed in [15], which configured in both symmetric and asymmetric configuration. However, this topology requires a large number of power switches and its maximum blocking voltage is relatively high. Another non-isolated dc source with bidirectional switches presented in [16]. A large number of switches reduced in this topology, but it requires various voltage rating of power switches which increase the cost of the converter. Besides, it is not a viable solution for high voltage applications due to more voltage stress across the full-bridge switches. For utilize this topology in high voltage applications, the full-bridge converter cascaded with symmetric topology. However, these topologies are not suitable for high voltage applications due to high voltage stress of switches. Motivated by the above discussion, and to increase efficiency and reduce the number of switches and a variety of dc sources for high voltage application, two-hybrid converter topologies presented in this article.
The proposed topology has the following advantages: • The proposed topology generates a higher number of voltage level with fewer power switches count, which further reduces the number of gate driver circuits, heat sink, size and layout of the circuit.
• The voltage stress on full-bridge switches reduced.
• The proposed hybrid topology I have high modularity. • In the asymmetric configuration, the number of isolated dc sources reduced.
• The number of ON state switches are less, which leads to a more reduction in power loss.

II. PROPOSED MULTILEVEL INVERTER TOPOLOGY
A new multilevel converter with a smaller number of power switches proposed by using single and double source unit. The series/parallel combination of switches connected with single and double source unit. The single source unit consists of one dc source connected with series/parallel combination of power switches, and standing voltage of the switch is V dc . In double source unit, two dc sources connected along with series/parallel switches, but the standing voltage of switches is 2V dc . The multilevel structure constructed with a combination of both single-double source units (SDS Unit) as shown in Fig. 1, and the 13-level output voltage and current waveforms shown in Fig. 2. The basic unit consists of n number of dc sources, and all these source magnitudes are equal to generate 2n + 1 level. The full-bridge converter used to produce both positive and negative output voltage, and it withstood for the sum of all the dc source magnitude values.
In Table 1, the proposed converter topology is compared with Cascaded H-Bridge (CHB) multilevel inverter. The maximum output voltage V o,max of the proposed topology expressed as, where n denotes the number of isolated dc source presented in the input side. The power loss on a switch is the sum of both  switching and conduction losses. The voltage drop across each switch is undesirable. The losses considered while the switch is changed from ON state to OFF state and vice versa. The voltage drops of each switch are assumed to be V T . , the maximum output voltage with power losses calculated as follows,

III. HYBRID STRUCTURE OF PROPOSED MULTILEVEL CONVERTER
The proposed topology uses a lower number of switches; however, restricted for high voltage applications due to its high voltage stress across the full-bridge converter. For utilizing the proposed topology in high voltage applications, two new hybrid multilevel topologies presented in this section.

A. HYBRID TOPOLOGY I
In hybrid topology, I, the maximum output voltage level is generated with a minimum number of switches. For example, if n = 4 considered as the basic unit, then it consists of four dc sources and eight switches with maximum possible of the 9-level output voltage. In this topology, the magnitude of each dc source is equal. This proposed multilevel topology (discussed in section-2) is hybrid with conventional cascaded H-bridge inverter as shown in Fig. 3, in which nU and nL represent the number of dc source presented in the upper leg and lower leg, respectively. The corresponding 27 level output voltage and current waveforms are shown in Fig. 4(a) and Fig. 4(b).  For symmetrical configurations, the magnitude of n number of dc source for both basic unit and CHB is equal, and equations expressed as follows, For asymmetric configurations, the magnitude of basic unit dc sources is, The magnitude of dc sources for cascaded H-Bridge unit are expressed as follow,

B. HYBRID TOPOLOGY II
The basic unit of the proposed topology is hybrid with the full-bridge converter (Hybrid Topology II) as shown in Fig. 5 and its corresponding simulated 21 level output voltage and current waveforms shown in Fig. 6(a) and Fig. 6(b). For symmetrical configurations, the magnitude of n number of dc source for symmetric topology and the full-bridge unit is equal, and equations expressed as follows, For asymmetric configurations, the magnitude of extended unit dc sources is as, VOLUME 8, 2020  The magnitude of dc sources for full-bridge unit follows, where nU is the number of dc source in an extended unit of the proposed multilevel inverter. The required number of switches, number of levels, maximum blocking voltage and total standing voltage of switches presented for both symmetric and asymmetric configurations of Hybrid Topology I and II in Table 2 and Table 3, respectively.

IV. COMPARISON OF MULTILEVEL CONVERTERS
The hybrid topology I and conventional CHB multilevel inverter produce very close results in terms of the number of switches and total peak inverse voltage. The number of switches in topology II is lower than the other two topologies, but the total peak inverse voltage is higher in topology II as presented in Fig. 7(a) and Fig. 7(b), respectively. For generate maximum output voltage level with reduced dc source and switches, the asymmetric configurations are preferable, but they require a variety of dc source voltage value and different voltage ratings of switches. Two different methods used to determine the magnitude of dc sources in CHB asymmetric configuration; those are binary (power of 2) and trinary (power of 3) configuration. In this paper, the trinary configuration is considered because it is capable of producing a maximum output voltage level with minimum switches. For comparisons, the graph of the number of switches (N switch ) versus the number of levels (N Level ), number of blocks (N Blocks ) versus the number of levels (N Level ), switch Peak Inverse Voltage (V PIV ) versus the number of levels (N Level ) and number of switches (N switch ) versus switch Peak Inverse Voltage (V PIV ) depicted in Fig. 8(a)-8(d), respectively. In Table 4, the symmetric configuration of multilevel inverter compared for maximum output voltage level against equals the power component. In hybrid topology I, maximum blocking voltage of switches is k th cascaded h-bridge unit switches (2nUL + 1)x(3k-1)V dc and basic unit full-bridge converter blocking voltage is 4V dc . In [17], the auxiliary circuit is hybrid with the full-bridge converter. In this topology, the maximum blocking voltage of switches is higher than the hybrid topology I. The proposed hybrid topology I and CHB Trinary configuration uses the lower number of switches for any given number of voltage levels in comparison with proposed hybrid topology II. The basic unit full-bridge converter has to withstand for a maximum of 4V dc whereas in hybrid   topology II is n * V dc , and thus it is restricted to high power applications.

V. NEAREST LEVEL MODULATION SCHEME
Several high and low switching frequency modulation techniques proposed for multilevel converters such as multi-carrier PWM, Space Vector PWM, Selective Harmonic Elimination Method, hybrid modulation and fundamental switching. The nearest level control modulation technique used to control proposed inverter topologies is shown in Fig. 9. The switching sequence for topologies I and II are given in Table 5 and VI, respectively. L 1 to L 12 are the comparator output, as shown in Fig. 9, andL 1 toL 12 is the NOT of the comparator output.
The THD is another important measuring factor in the multilevel converter, which calculates the percentage of harmonic content present in the output waveform.
In general, the THD for the sinusoidal waveform calculated as follows: where V orms and V of denote the magnitude of rms value and fundamental output voltage waveform, respectively. The V rms and V of calculated with the help of switching angles. The formula for finding switching angle represented as follows, The THD of the output voltage waveform depends on the number of levels and switching angles, which is not the case of current waveform because the inductive load acts as a low pass filter and brings to sinusoidal shape. The V out of the proposed topology represented as,

VI. EXPERIMENTAL RESULTS
For analyze the operation of proposed topologies, the experimental test has conducted and results discussed. The nearest level control technique used to generate the appropriate gate pulses for the switches. For verify the performance of the proposed multilevel converter, an experimental prototype based on the primary unit configuration is developed for a resistive-inductive load of R = 65 and L = 40 mH. Moreover, the conventional nearest-voltage level modulation technique, presented in [17], is embedded in the FPGA Spartan XE3S250E controller (that generates the trigger pulses to the appropriate switches) with a fundamental frequency of 50 Hz.

A. HYBRID TOPOLOGY I (ASYMMETRIC CONFIGURATION)
The 27-level hybrid topology I multilevel converter is simulated using MATLAB/Simulink and SimPower Systems toolbox for the proposed topologies. Topology I, asymmetric configuration showed in Fig. 10(a), the magnitude of dc sources of basic unit is V 11 = V 12 = V 13 = V 14 = 4 V and the full-bridge converter voltage V 21 = 36 V for the resistive-inductive load value of 50 and 60 mH. The hardware experimental output voltage and current waveform showed in Fig. 10(b) and Fig. 10(c), respectively. In hybrid topology, I, the maximum blocking voltage of the lower is 36 V, and upper leg is 16 V, the total peak inverse voltage is 232 V whereas in CHB trinary configuration uses 208 V, in case of topology [16]- [19] uses a higher number of blocking voltages.

B. HYBRID TOPOLOGY II (ASYMMETRIC CONFIGURATION)
The hybrid topology II asymmetric configuration is shown in Fig. 11(a). The magnitude of dc sources of basic unit is V 11 = V 12 = V 13 = 8 V and the full-bridge converter voltage V 21 = 56 V for the resistive-inductive load value of 30 and 45 mH. This topology is more suitable for the reduction of a variety of dc source because it uses two varieties of dc source for m-levels and the total peak inverse voltage is close to topology I and CHB. The hardware experimental output voltage and current waveforms are shown in Fig. 11(b) and Fig. 11(c). The maximum blocking voltage of upper leg full bridge converter is 24 V and lower leg is 56 V and total peak inverse voltage is 352 V. Table 5 describes the equal number of levels produces by the various topologies with the different switch count. It is once again proved that the proposed topology I and CHB produces the same number of voltage level, whereas topology II and [16]- [19] uses a large number of switches. The maximum blocking voltage of all the topologies is the same; but, the total peak inverse voltage is higher in [16]- [19] due to various rating of bidirectional switches used. The plots of power loss and efficiency of the proposed topology given in Fig. 12, which shows that the proposed hybrid topology I have higher efficiency compared with topology II.

VII. CONCLUSION
In this article, a new single/double source unit-based hybrid multilevel converter topologies proposed for medium applications. The proposed multilevel converter uses a minimum number of power switches. The comparison of hybrids proposed symmetric and asymmetric topologies presented in terms of the number of switches, the number of gate driver circuits and total peak inverse voltage. These factors reduce the size of the circuit, installation area and total cost of the converter. In the symmetric configuration, the proposed hybrid topologies are superior to the conventional topology, but in case of asymmetric configuration, the proposed hybrid topology I and CHB use an equal number of switches for same output voltage level.
The proposed basic multilevel inverter and hybrid topology II are not suitable for high voltage applications due to restriction of maximum voltage stress on the full-bridge converter, and these topologies are suitable for medium voltage application like 2.0 kV -to-6.0 kV grid-connected photovoltaic system. The proposed hybrid Topology I is suggested for high voltage applications because it is closer VOLUME 8, 2020 to conventional CHB with increased stepped output voltage level as compared to conventional CHB topology.