Tuning of Discrete Complex Proportional Integral Current Controller for Grid-Connected Converters Based on Critical Damping

Current control is of utmost importance for grid-connected converters to achieve a high level of performance. The complex proportional integral controller is usually employed for its excellent performance in terms of cross-coupling decoupling and stability. The pole/zero cancellation characteristic of the complex proportional integral controller, which is always valid in the continues-time domain, fails in the discrete-time domain, resulting in an oscillatory or even unstable response. The discrete complex proportional integral controller has thus been addressed in this work, which cancels the complex plant pole with a matching zero provided by the controller in the discrete-time domain. It has been proved that pole/zero cancellation of the discrete complex proportional integral controller is always valid, regardless of the variation of the excitation frequency. An important feature of performance independence from the pulse ratio is thus achieved. Also, to achieve the possible highest performance, a tuning method based on critical damping is developed in the discrete-time domain, which addresses the one-sample delay directly in the tuning process. In this manner, the minimum settling time and negligible overshoot for transient response can be achieved, along with the most enhanced stability and avoidance of closed-loop anomalous peaks. Experimental results have verified the effectiveness of the developed method.


I. INTRODUCTION
Grid-connected converters (GCCs) have been widely employed for power conversion in a lot of different applications, such as renewable power generation [1]- [4], active power filters [5]- [8], and rectifier systems [9], [10], just to name a few. In these scenarios, the converter presents as a controllable current source to the grid. In particular, the distributed generation units using renewable energy source (RES), is commonly composed of an input-side converter and a grid-side converter. The input-side converter and its controller vary by the RES type, but the grid-side converter, i.e GCC, can be controlled in the same way [11], [12]. With the objective to reduce the high frequency switching ripples of the current injected into the grid, L, LC, and LCL filters The associate editor coordinating the review of this manuscript and approving it for publication was Canbing Li . are commonly connected between the converter and the grid. However, LC and LCL filters can cause stability problems related to resonance, which have been the subject of significant researchers in recent years [7], [13]- [19]. Alternatively, L filter does not experience the aforementioned problem, and has, in fact, been used in lots of applications with satisfactory results [2], [3], [5], [6], [8], [10], [20]- [36].
In particular, the amount of active-and reactive-power exchange between GCCs and the grid can be independently regulated, which is achieved by the effective regulation of current flowing through the filter. Therefore, high performance current controller design for GCCs have been the topic of significant studies for a long time [5]- [8], [10], [13], [15]- [36]. A common practice is to transform the ac signal in the stationary frame into dc ones in the synchronous reference frame (SRF), so that the well-known proportional integral (PI) controller implemented in the SRF can be VOLUME 8, 2020 This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/ employed for non-steady state error tracking of ac currents. However, cross coupling between the d-and q-axes which is proportional to the excitation frequency, i.e. the rotation frequency of SRF, arises when the electrical variables are transformed to SRF. This coupling characteristic can further lead to interference in the active-and reactive-power regulation. Commonly, a state-feedback (SF) technique can be employed for cross coupling decoupling in this case [1]- [3], [8], [25], [28]- [30], [33]- [36]. This method is however typically sensitive to the one-step sampling delay found in a digital implemented system, resulting in reduced performance in cross coupling decoupling and system's overall stability. Incomplete decoupling can further turn the current loop into a two-input and two-output system, making it difficult to perform the investigation of current loop with the help of classical analytical tools, such as frequency response and root locus analysis [25], [30], [35]. An alternative approach noted as complex proportional integral (cPI) controller has therefore been developed in [8] and [25], based on the established vector model with complex coefficient for L-filtered GCCs. It has been proved that the essence of SF for SRF-PI is to turn the complex-coefficient model into a real-coefficient one, so that the revised plant pole can be cancelled by the zero of PI controller, as long as the proportional and integral gains satisfy a certain specific relationship [25], [30], [31], [35]. The situation gets quite different for the case cPI, where the basic idea is to cancel the complex-coefficient plant pole directly by a matching zero provided by the controller [8], [25], [31]. The pole/zero cancellation characteristic of cPI, in particular, does not vary with the introduction of one-sampling delay. An important feature of performance independence from excitation frequency is thus achieved [35]. A comparison between cPI and PI with SF decoupling has also been presented in [8] and [30], where it has been found that cPI is superior to SF-decoupled PI both in terms of decoupling effectiveness and robustness to grid impedance variation. Also, through the inspection of closed-loop frequency response, an amplification characteristic around the excitation frequency has also been identified in [25] and [31], for both PI and cPI controllers, but more distinct for the case of PI with SF decoupling.
The reason underlying this phenomenon has been comprehensively investigated in [31], where it has proved that an equivalent value of arctan ωL R L for delay compensation has been provided by cPI, resulting in improved stability compared to that of PI with SF decoupling. Also, the amplification characteristic, which is noted as closed-loop anomalous peaks in [31], has been proved to be contributed to an inadequate distance between the asymptote at the excitation frequency and the critical point (−1, j0) in the Nyquist diagram. The solution is thus to raise the minimum distance between the Nyquist curve and the critical point, which in [27] and [31], is realized by a systematic delay compensation strategy developed to obtain the highest stability and avoidance of closed-loop anomalous peaks. This delay compensation technique is typically useful for cases with a low pulse ratio, i.e. the ratio of switching frequency with respect to the excitation frequency, which is true for high-power converters operating at a low-switching frequency to reduce switching losses of semiconductor devices [31]. This also happens in medium-or even low-power converters where the frequency of reference current signal can be very high with regard to the switching frequency, such as active power filters and converters for aviation applications whose fundamental frequency is between 400 and 800 Hz [5]- [8].
Nevertheless, the transfer function of cPI is derived in the continuous-time domain, a subsequent discretization is thus needed for digital implementation. This can be resolved by applying a suitable discretization technique that is available in the existing control literature to the continuous-time-derived transfer function [30]. However, the performance of the discretized equivalent has been shown degraded performance compared to that of the continuous-time controller, especially for cases with a low pulse ratio [31], [35]. More importantly, the pole/zero cancellation, which is always valid for cPI in the continuous-time domain, fails in the discrete-time domain, resulting in a more oscillatory or even unstable response [35], [36].
Alternatively, tuning of the current controller is another aspect to achieve the possible highest performance for a specific current controller, which has, therefore, been investigated by a lot of researchers [2], [5]- [9], [16], [18]- [25], [30]- [36]. Commonly, the method based on frequency response analysis to achieve a certain phase margin has been widely employed for its simplicity and intuitiveness. However, this method has suffered from the limitation of lacking explicit objective for system's overall performance optimization. This issue has therefore been addressed in [33] and [36], where the maximum possible proportional gain is determined with convincing mathematical deduction, leading to the maximum possible closed-loop bandwidth. In fact, the above two methods are essentially the same, where Bode diagram with phase-margin criterion is employed for both of them. The main shortcoming of this kind approach is the limited guidance for avoidance of closed-loop anomalous peaks, which have been found in [8], [25] and [36]. A systematic method has therefore been developed in [31], with the objective to obtain the highest stability and avoidance of closed-loop anomalous peaks. It has been proved that the appearance of closed-loop anomalous peaks is a sign of inadequate stability margin from the point view of Nyquist diagram. Therefore, the investigation performed in [31] mainly focuses on the improvement of system's stability, instead of transient response optimization. To solve the problem, a design approach aimed at optimized settling time and overshoot for SRF-PI of current regulation has been developed in [36], where the one-step sampling delay is represented by a second Padé expression. Approximation is thus introduced, which is, to a large extent, may not suitable for cases with a low pulse ratio.
With this under consideration, a method for tuning of the current controller has been developed in this work, which is based on the principle of critical damping and performed directly in the discrete-time domain. In this manner, the minimum settling time and negligible overshoot for transient response can be achieved, along with the most enhanced stability and avoidance of closed-loop anomalous peaks. In particular, the discrete complex proportional integral (DcPI) controller is employed for current regulation in this work. DcPI was first mentioned in [35] and has since been employed for ac machine drive, where it has been shown that the pole/zero cancellation characteristic of DcPI is always valid regardless of the variation of excitation frequency, unlike the case of discretized cPI controller. An important improvement in performance decoupling from pulse ratio is thus achieved. DcPI for negative current regulation and its resonant version in the stationary reference frame have been studied in our recent work. Tuning of DcPI to achieve the possible highest performance is further studied here, with more analytical plots provided to better identify its superior performance compared to that cPI.
To do that systematically, Section II begins by succinctly reviewing of the aforementioned cPI and DcPI current controller, to better identify their features and advantages. The effects of discretization and pole/zero cancellation characteristic for both controllers are also presented in this section. This is followed by Section III, where the tuning method based on critical damping is analyzed and compared with the one aimed at possible maximum bandwidth in detail. Effectiveness of the proposed method is verified through experiments in Section IV, before concluding the findings in Section V. Fig.1 shows a three-phase GCC, which consists of a voltage source converter (VSC) and an output L filter. It should be noted that R L is the equivalent series resistor for emulating the power loss of the converter, which is mainly from the filter and semiconductor devices. The current flowing through the filter, i.e. i a , i b , and i c , are regulated to control the amount of power exchange between the converter and the grid. These currents are then measured and transformed to the αβ coordinate, which in Fig.1, is noted as i αβ = i α + ji β . Also, the grid voltage e ab and e bc are sensed and fed to the phase locked loop (PLL) block for synchronization, whose output is the phase θ and frequency ω e of the positive-sequence grid voltage. The reference current i ref αβ can be determined with the help of a specific power regulation strategy, which in practice, is dependent on the requirement of application where the GCC is employed. Besides, the dc-link voltage V dc is assumed to be constant in this work, which is, theoretically, can be stabilized to its rated value V ref dc through the active power regulation between the converter and the grid [5]- [10], [14], [18], [32], [33].

II. SYSTEM MODELING AND CURRENT CONTROLLERS FOR GCCs IN THE SRF
Transfer function for relating the converter output voltage υ αβ to the grid current i αβ can be derived from the inspection of Fig.1, which is expressed as follows: Further noting that s → s + jω e results if these electric variables are transformed to SRF, which upon substituted to (1), gives rise to An immediate observation noted is that a complex term jω e L appears in the denominator of (2), resulting in cross coupling between i d and i q that is proportional to the excitation frequency ω e .
To eliminate this cross coupling and dependency on excitation frequency, the cPI current regulator was introduced in [8] and [25], which addresses the cross-coupling decoupling as part of the tuning process for achieving pole/zero cancellation. The resulting transfer function of cPI can thus be expressed as follows: It should be noted thatL andR L are the estimated value of L and R L , respectively, which in theory,L is the rated inductance of L andR L can be estimated by the efficiency of the converter. However, pracitcally, the exact value of both L and R L can not be tracked precisely due to the characteristic of the magnetic core of the inductor as well as the grid impedance variation.
The reference voltage of the converter is kept constant over each sampling interval, so the converter can be assumed to be a ZOH circuit [13], [14], [17], [27], [33], [35]. As a result, the discrete-time model can be obtained through the ZOH method to (1), which can be expressed as follows: On the other hand, cPI controller should also be discretized for digital implementation, which can be achieved by applying a suitable discretization technique to (3). Theoretically, VOLUME 8, 2020 there are eight different techniques that can be employed to make the goal, among which Tustin method is commonly preferred for its excellent approximation to the continuous signals [25], [27], [35]. The corresponding expression can be derived as follows: where a 1 = (R L + jω e L) · T s . With (4) and (5) now defined, block diagram for representing the current loop in the discrete-time domain can be derived, as shown in Fig.2 e T s is the equivalent one-step sampling delay in the SRF. A feed forward technique is also employed, which in Fig.2, is noted as e ∧ dq . This is a common practice to improve disturbance rejection of the current loop from the grid voltage [2], [6], [8], [10], [14], [25]. Although the effectiveness of this method can be deteriorated by the one-sampling delay G + d (z), the amplitude of the disturbance from the grid voltage is dramatically reduced with the help of e ∧ dq , which is certainly valid for sags and swells found in a practical power network. It should however be mentioned that in case of grid imbalance or distortion, theoretically, the disturbance of negative-sequence and high-order harmonic voltage can not be totally rejected with the employment of positive-sequence current regulator in Fig.2, as G + cPI (z) provides infinite open-loop gain only for the positive sequence of fundamental frequency. This can be solved with the employment of double synchronous reference frame control (DSRFC) or resonant controllers (RCs), which is out of the scope of this paper and will not be elaborated.  The parameter of the GCC studied is illustrated in Table 1. Then the root locus of Fig.2 can be obtained, as shown in Fig.3, which is plotted by varying the excitation frequency ω e from 0 Hz to 800 Hz with a step of 100 Hz. Through the inspection of pole/zero distribution of different excitation frequencies, some observations noted can be explained as follows: • The damping ratio of the poles from C to D and E to F are near unity, and the magnitude of poles from E to F is much larger than that of poles from C to D. • On the other hand, the poles and zeros from A to B are almost overlapped for low excitation frequencies, i.e. ω e < 600π. Therefore, an over damped system with monotonic-rising step response can be expected for these cases.
• However, with ω e increasing, the poles and zeros from A to B deviate from each other. This deviation gets more distinct for high excitation frequencies, i.e. ω e ≥ 600π, resulting in an oscillatory and even unstable response. To solve this problem, an alternative approach is to design the current controller in the discrete-time domain directly. This can be done by following the similar procedure of cPI which is derived in the continues-time domain [19], [35], beginning with the equivalent of (4) in the SRF, which is expressed as follows: To achieve pole/zero cancellation in the discrete-time domain, the expression of DcPI can be expressed as follows: In this manner, the complex plant pole of (6) is directly cancelled by a matching zero provided by DcPI in the numerator of (7). The term of e j·ω e ·T s is to cancel the excitation frequency dependent term of e −j·ω e ·T s in G + d (z), which is, theoretically, equivalent to a delay compensation technique studied in [28] and [31]. Also, the term (z−1) in the denominator of (7) provides infinite open-loop gain for the dc signal in the SRF, so that non-steady state tracking error is achieved for the ac signal varying at ω e in the stationary reference frame.
With G + cPI (z) replaced by G + DcPI (z) in Fig.2, the open-loop transfer function can easily be derived, which is expressed as follows: The corresponding root locus of different excitation frequencies can be obtained, as shown in Fig.4. It can be noted that pole/zero cancellation is always valid, irrespective of excitation frequency ω e . As a result, the challenge of degraded performance for high excitation frequencies faced by cPI is avoided. Performance independency from pulse ratio is thus achieved, which is, conceptually, the main advantage of DcPI compared to that of cPI.

III. TUNING OF DcPI BASED ON CRITICAL DAMPING IN THE DISCRETE-TIME DOMAIN
With G + PL (z) and G + DcPI (z) now defined, the next step is to determine the optimum gain of the controller, i.e. k in (7), to obtain the highest level of performance for current regulation, which in this work, is realized through the discrete root locus analysis. Firstly, it is necessary to establish the relationship of the damping ratio of a close-loop pole in the z-domain with its correspondence in the s-domain, beginning with (9) for representing a general pole p s cl in the s-domain where a, b, ω 0 , ξ are the real part, imagery part, magnitude and damping ratio of p s cl , respectively. It should be mentioned that a < 0, b > 0 is assumed here, which means p s cl is at the left half part of s-plane, and hence stable.
Noting that z = e s·T s , which upon combined with (9), gives rise to Therefore, expression for relating the magnitude characteristic of a closed-loop pole in the z-domain and its correspondence in the s-domain can be derived from (10), which is given as follows: Further noting that a = −ξ ·ω 0 , which combines with (11), yields On the other hand, expression related to phase characteristic of (10) can be derived as follows: Finally, expression related to ξ can be derived from the combination of (12) and (13), which is expressed as follows: Similarly, the root locus of current loop, which is plotted by varying the controller gain k in (8), can be obtained, as shown in Fig.5(a). The two trajectories initiated from p 1,2 ol , are noted as 1 and 2 , respectively. It can be observed that with the increasing of k, trajectories 1 and 2 meet at the point of ''A'' and then depart in the opposite direction, before which the system is over damped.
To better understand these features, the closed-loop poles p 1,2 cl can further be substituted into (11) and (14). In this manner, the plots of ξ vs. k and p z cl vs. k can be obtained, as shown in Figs.5(b) and (c), respectively, where the controller gain related to ''A'' is noted as k opt . Some observations noted can be explained as follow: • As shown in Fig.5(b), damping ratio of both close-loop poles p 1,2 cl are exactly the same. In particular, ξ = 1 is valid for k ≤ k opt , which means an over damped system with no overshoot can be expected. Also, p 2 cl p 1 cl for k ≤ k opt can be appreciated from Fig.5(c). Therefore, p 1 cl is the dominant pole and a slow transient response results, especially for lower values of k.
• For the case of k opt , ξ = 1 and p 1 cl = p 2 cl can be noted from Figs.5(b) and (c). If k > k opt , ξ decreases sharply, which is related to the part approaching to the unit circle in Fig.5(a). Also, the closed-loop poles will eventually lie outside of the unit circle, which in Figs.5(b) and (c), is represented by the part that k > k max .
• Although, to some extent, the magnitude of p 1,2 cl still increases for k opt < k < k max . This increase is however not distinct. In particular, unity damping ratio with the possible highest p z cl are both achieved for the case of k = k opt . Consequently, the current loop is critically damped with k opt employed, and the minimum settling time and zero overshoot for the transient response can be achieved simultaneously, as shown in Fig.5(d) for the case of k opt . VOLUME 8, 2020 For subsequent analysis, the tuning method proposed in [33], which aims to achieve the maximum possible bandwidth, is employed for comparison with the one developed in this work. The expression for controller tuning presented in [33] is given as follows: where ω c(max) is the maximum bandwidth, and T d = 1.5T s = 3 (2f s ) is the total delay related to digital implementation and PWM modulation, while φ m is the desired phase margin and 40 deg is suggested for it in [33], [36]. In this manner, the controller gain k BW max = 29.1 can be determined for the case of Table 1, which in Fig.5, is noted as '' ''. It can be observed that, in this case, the magnitude of close-loop poles have been increased slightly, but the damping ratio ξ is reduced dramatically to about 0.3. Therefore, a highly oscillatory step response can be expected with k BW max employed, as shown in Fig.5(d) for the case of k BW max . These effects can be better appreciated from the settling time vs. overshoot diagram, as shown in Fig.6(a), which is plotted by extracting the settling time and overshoot from the step response for the controller gain k varying from 0 → +∞. It should be noted again that ''•'' and '' '' represent the case for k opt and k BW max , respectively. An immediate observation noted that the settling time for k opt is certainly less than that for k BW max , which is valid for all the three sampling frequencies evaluated. Also, a negligible overshoot is achieved with k opt employed, which is, on the contrary, as high as 40% for the case of k BW max , as shown in Figs.5(d) and 6(a). From the inspection of the bottom-left corner of Fig.6(a), it seems that there are alternative solutions to achieve a further reduced setting time compared to that of k opt . This part is zoomed and depicted in Fig.6(b). It can be noted that the settling time is indeed reduced for the case of k 1 cmp , which in Fig.6(b) is noted as '' * ''. This is however only valid under the condition that the limit of the tolerance band used for the settling time satisfies σ >= 2%; otherwise, the merit of shorten settling time retained by k 1 cmp will be deteriorated.
This can be explained from the inspection of Fig.6(c), where the step response of current loop with k opt and k 1 cmp employed are both illustrated. It can be noted that for the case of δ = 2%, the settling time t 2% for k 1 cmp is indeed less than that for k opt . On the other hand, if the tolerance band is reduced to 0.5%, then k 1 cmp is not the optimum choice to achieve the shortest settling time, due to the overshoot above the upper limit line of δ = 0.5%. In fact, with regard to δ = 0.5%, the optimum gain is k 2 cmp , which in Fig.6(b), is noted as '' ''. Also, the corresponding step response is depicted in Fig.6(d), where it can be noted that the settling time t 0.5% for k 2 cmp is reduced compared to that of k 1 cmp . As a consequence, regarding either k 1 cmp or k 2 cmp , the characteristic of achieving the minimum settling time depends greatly on δ. Alternatively, k opt , which almost does not depend on δ, can be indeed considered to be the optimum choice of DcPI for current regulation in terms of settling time and overshoot, which is certainly much better in this sense than k BW max , as shown in Figs.5(d) and 6(a). What's more, the avoidance of close-loop anomalous peaks for the developed tuning method is also evaluated. As shown in Fig.7, some observations noted can be expressed as follows: 50548 VOLUME 8, 2020 • As shown in Fig.7(a), for the case of k opt , the minimum distance of the Nyquist diagram to the critical point, i.e. η = min |1 + G OL (z)|, is 0.71. Therefore, the stability requirement of η ≥ 0.5 suggested in [31] is well met, resulting in a good tradeoff between stability improvement and avoidance of close-loop anomalous peaks. As shown in Fig.7(b), no close-loop anomalous peaks have been found for the case of k opt . • On the other hand, η is reduced to 0.38 with k BW max employed, which certainly, fails to satisfy the requirement of η ≥ 0.5. As a result, anomalous peaks as high as 1.82 can be noted at the frequency of 1320 Hz, for both positive and negative sequences, which is also the frequency that leads to the minimum value of η = 0.38 in Fig.7(a) for the case k BW max .

IV. EXPERIMENTAL RESULTS
The experimental setup is depicted in Fig.8. The main circuit is a three-phase three-level VSC with an output L filter connected to the grid. The IGBT is infineon F3L100R12W2H3 and the corresponding gate-driver is MORNSUN QP12W05S-37. The capacitance for dc-link voltage support is 2200µF, while the relays and switches are for controlling the converter's connected/disconnected from the grid. The digital controller is mainly made of a DSP (TMS320C28346), an FPGA (EP3C25), and other auxiliary circuits for signal conditioning, analog to digital conversion and communication. Typically, the signal sampling is performed at both peaks and valleys of the triangular carrier signal, which means the sampling frequency is twice of the switching frequency. Other parameters of the setup are the same as those shown in Table 1. Measuring equipment include an oscilloscope, three fluke i3000s current probes, and two ETA 5002 differential probes for voltage measurement. In particular, the oscilloscope is set as follow: 1) CH1: grid voltage e ab with 500V/div; 2) CH2:  dc-link voltage V dc with 200V/div; 3) CH3: grid current i a with 10A/div.
To begin with, the regulation of dc-link voltage step up from 540 V related to the diode rectifier to the reference value of 800 V is examined. As shown in Fig.9(a), there is a large current flicker at the beginning of regulation, which is, conceptually, related to the insufficient stability margin of Fig.7(a) for the case of k BW max . This phenomenon is, however, disappeared with k opt employed, as shown in Fig.9(b), due to the critical damping characteristic of the current loop.
This kind of feature is further evaluated in Fig.10, where the results of the step response with the reference current of i ref q (0 → 10A) are illustrated. It can be noted that there is also a large flicker at the moment of current rising. The corresponding i q in SRF is depicted in Fig.10(b), which is plotted by saving the data in Code Composer Studio and loading it to the Matlab. It can be observed that a large overshoot about 40% appears, which is, in theory, in accordance with the analytical plots provided in Figs.5 and 6. On the other hand, for the case of k opt , the step response has no overshoot and the settling time is certainly less than that of k BW max , which can be observed from Fig.10(b) and (d). This characteristic of transient performance for current regulation fits well with the aforementioned theoretical findings.
Transient response for the case of i ref q (10 → 0A) is also studied. As shown in Fig.11(a), when the reference of i q is set to zero, a noticeable current peak related to overshoot can be noted for k BW max . On the contrary, a much improved performance with no overshoot can be noted with k opt employed, as shown in Fig.11(b).

V. CONCLUSION
In this work, the current regulation for GCCs in the SRF has been addressed. It turns out that the continues-time-derived controller cPI achieves pole/zero cancellation in the s-domain, but fails in the z-domain. Therefore, the discretized equivalent of cPI has been shown reduced performance compared to that of the continues-time controller, resulting in an oscillatory and even unstable response.
On the other hand, DcPI cancels the complex plant pole in the z-domain directly with a matching zero provided by the controller. It has been proved that pole/zero cancellation of the discrete complex proportional integral controller is always valid, regardless of the variation of the excitation frequency. An important feature of performance independence from the pulse ratio is thus achieved. To achieve the possible highest performance, a tuning method based on critical damping is developed for DcPI, so that the minimum settling time and negligible overshoot for transient response can be achieved, along with the most enhanced stability and avoidance of closed-loop anomalous peaks. BAOJIAN JI received the B.S. degree in automation engineering from Nanjing Normal University, Nanjing, China, in 2002, the M.S. degree in electrical engineering from the Nanjing University of Aeronautics and Astronautics, Nanjing, in 2007, and the Ph.D. degree from Southeast University, Nanjing, in 2012.
In 2017, he was an Associate Professor with Nanjing Tech University, Nanjing, where he is currently the Head of the Department of Electrical Engineering. In 2018, he became an Associate Professor with the Nanjing University of Science and Technology, Nanjing. His research interests include the digital control technique and the development of grid-tied inverters for renewable energy.
JIANFENG ZHAO received the B.S. degree in electrical engineering from the Huainan Mining Institute, Anhui, China, in 1995, the M.S. degree in automation from the Nanjing University of Aeronautics and Astronautics, Nanjing, China, in 1998, and the Ph.D. degree in electrical engineering from Southeast University, Nanjing, in 2001.
In 2001, he joined the Faculty of the School of Electrical Engineering, Southeast University, where he has been a Professor, since 2008. He has been teaching and researching in the field of high-power electronics and has been serving as the Dean of the School of Electrical Engineering, Southeast University, since 2014. He has authored more than 100 technical articles. He currently holds 50 Chinese patents and two U.S. patents. His main research interests are utility applications of power electronics in smart grids, such as solid-state transformers, active filters for power conditioning, flexible ac transmission system devices, multilevel ac motor drivers, and efficient energy utilization.