Novel Digital Radio Over Fiber (DRoF) System With Data Compression for Neutral-Host Fronthaul Applications

Digital radio-over-fibre transmission has been studied extensively as a way of providing seamless last-mile wireless connectivity by carrying digitised radio frequency (RF) services over broadband optical infrastructures. With the growing demand on wireless capacity and the number of wireless services, a key challenge is the enormous scale of the digital data generated after the digitisation process. In turn, this leads to optical links needing to have very large capacity and hence, high capital expenditure (CAPEX). In this paper, we firstly present and then experimentally demonstrate a multiservice DRoF system for a neutral-host fronthaul link where both forward and reverse links use data compression, multiband multiplexing and synchronisation algorithms. The effect of a novel digital automatic gain control (DAGC) is comprehensively analysed to show an improved RF dynamic range alongside bit rate reduction. In this case, the system allows all cellular services from the three Chinese mobile network operators (MNOs) to be converged onto a single fiber infrastructure. We successfully demonstrate 14 wireless channels over a 10Gbps 20km optical link for indoor and outdoor wireless coverage, showing a minimum error value magnitude (EVM) of < 8% and >60dB RF dynamic range. It is believed that the technology provides an ideal solution for last-mile wireless coverage in 5G and beyond.


I. INTRODUCTION
The increasing demand for wireless capacity and coverage for 5G mobile communications to provide ''access anywhere to data services over wireless networks'' is a major goal [1]- [4]. Particular attention has been on the development of radio access networks (RAN) to provide excellent cost-effectiveness, energy-efficiency and flexibility in management, transmission and Quality of Service (QoS) [5]. Both analogue and digital radio over fiber (ARoF and DRoF) solutions have been studied to provide the last-mile The associate editor coordinating the review of this manuscript and approving it for publication was Rui Wang . wireless coverage [6]- [8]. As there is a growing need for network convergence and QoS assurance, current solutions include using DRoF fronthaul links, such as defined in the common public radio interface (CPRI), to extend wireless coverage in a Cloud-RAN (C-RAN) architecture where services are distributed from a centralised baseband unit (BBU) pool is more popular [9], [10]. This centralised architecture comes with many advantages, such as enabling resource and infrastructure sharing, extensive computation power, easy self-optimisation as well as reduction of maintenance and cost [11], [12]. ARoF based systems also suffer from chromatic dispersion, nonlinearity and losses in the optical sources, detectors, links and other passive or active components. As a result, the performance significantly degrades along the network. Corresponding strategies, such as optical single side band (OSSB) modulation [13], photonic downconversion, digital predistortion (DPD) technique and injection locking [6], [14], are proposed to overcome these limits. But all these approaches require relatively complex setups based on expensive low-noise devices. DRoF system can completely remove these effects on the analogue carrier for long-distance transmission by conveying digital bits which present the radio frequency (RF) carriers over optical fiber with an error-free transmission till bit error rate (BER) is intolerable [7]. However, compared with the ARoF systems, the excessive data rate per service required by CPRI leads to a major drawback in widespread implementation of the C-RAN architecture, especially at a time when both the bandwidth and the number of services are growing exponentially [15], [16]. Meanwhile, the convergence of multiple wireless and wired services over a single transport platform or infrastructure in a neutral host (i.e. multiservice, multi-carrier and service agnostic) manner has shown significant improvement in cost-effectiveness by sharing infrastructure among different service providers. A new radio over Ethernet (RoE) concept has also been introduced in the IEEE 1904.3 standard aiming to combine the CPRI based interface with the standard Ethernet protocol so that existing Ethernet infrastructures can be reused for RF transmission [17]. To reduce the CPRI bandwidth, a series of new functional splits between the BBU and remote radio unit (RRU) are proposed to redefine the DRoF architecture [18]. For 5G deployment, a threetier RAN architecture including central unit (CU), distribution unit (DU) and active antenna unit (AAU) is designed to reduce the expense in last mile wireless coverage [19], as shown in Fig. 1. However, this leads to a reduction in flexibility due to vendor specific information being required at higher splits, preventing the implementation of a neutralhost and infrastructure-sharing objective. Moreover, the last drop still relies on the CPRI under the current circumstances. In order to maximise the benefits brought by the neutral-host RAN paradigm, in this work, we firstly propose a neutral-host fronthaul concept to deliver the benefits of both centralisation and infrastructure-sharing in a DRoF system, which aims to create an open, cost-effective, flexible platform for conveying multiple wireless and wired services from different service providers. We also design processing algorithms with data compression and a novel fronthaul interface protocol to allow low-cost combination of multiple wireless carriers. The protocol can optimise link efficiency on top of conventional digital baseband, analogue RF, CPRI and other digital/analogue inputs. This is particularly important for the growing numbers of neutral-host companies and virtual network operators to enhance their profitability so as to benefit the QoS for end users in 4G and 5G scenarios.
To increase the link efficiency, several previous studies suggested baseband in-phase (I) and quadrature (Q) compression technics for CPRI [20], [21]. These solutions effectively compressed the data rate up to 3 times without causing severe degradation of the EVM performance at optimised input power. However, a degradation of dynamic range is shown. We designed a new algorithm incorporating a novel digital automatic gain control (DAGC) to perform lossy compression at both IF and baseband stages. The total dynamic range which is mainly limited by the quantisation bits of the analogue to digital converter (ADC) is increased by applying the algorithm. Moreover, the algorithm has a fast response and the total system latency is kept below only a couple of microseconds.
The DRoF system is experimentally demonstrated by taking 14 wireless inputs from three major Chinese mobile network operators (MNOs) as input signal sources which are digitally processed and then transmitted over a 20km 10Gbps single mode fiber (SMF) link. We believe this is the first demonstration of this kind in terms of number of services, data rate and transmission distance. To allow successful communication in the system, the downlink and uplink signals being transmitted must conform to the modulation accuracy of the wireless standard as specified by the 3rd Generation Partnership Project (3GPP) [22]- [26]. Dynamic range is a figure of merit showing the modulation accuracy, illustrated by the error value magnitude (EVM), of a DRoF system in dynamic RF environment. In this paper, the figure is tested as a main indicator of the system performance.
In a nutshell, the contributions of this paper are as follows: 1) We propose a compact multiservice DRoF system for neutral-host fronthaul transmission, which allows all cellular services from the three Chinese MNOs to be converged onto a single fiber infrastructure. 2) We design a sequence of novel digital signal processing technics and algorithms for the DRoF system, including data compression with new dual-loop DAGC processing, data packetisation using a new fronthaul protocol and multiband multiplexing on both forward and reverse link of the system for system cost reduction. The effect of the algorithms is comprehensively analysed to show an improved RF dynamic range alongside bit rate reduction. 3) An experimental testbed is built and experimental results demonstrate error-free transmission for the simultaneous transmission of the 14 services (including 5G) from three MNOs over a 10Gbps 20km optical link for indoor and outdoor wireless coverage. VOLUME 8, 2020 The remainder of this paper is organized as follows. In Section II, we introduce the system architecture and describe the data processing including data compression, novel dual-loop DAGC, new fronthaul-link protocol and multiband multiplexing scheme. We verify the proposed algorithm and evaluate its performance in Section III. Finally, we conclude our works.

II. THEORY AND SYSTEM PROPOSAL A. SYSTEM ARCHITECTURE
As depicted in Fig. 2, the DRoF architecture is composed of three components: a) a CU connected with mobile services in forms of the digital baseband signal, RF signal or digitised RF signal generated by MNOs, creating a signal source pool which contains BBUs, remote radio heads (RRHs) and CPRI/digital equipment; b) a fronthaul optical link connecting the CU with the distributed remote units (RUs); and c) multiple RUs for wireless coverage. In this system, centralised RF services are digitised and compressed to a lower bit rate as proposed by Li et al. [27] and a DAGC module which controls the gain of the system is added to enhance the RF dynamic range before the ADC and data compression stages [28]. Novel gain estimation and rescaling algorithms are designed to optimise the system performance with lossy compression.
As shown in Fig. 3, multiple wireless services generated from MNOs are fed into the CU where a corresponding number of RF front end modules convert them to intermediate frequencies (IFs). At the RF front end, amplification modules, including a series of fixed gain amplifiers (FGAs) are used to compensate the wireless loss. They are followed by RF digital automatic attenuators (ATTs) which are used to automatically adjust the gain by varying the attenuation level. The ATT is a 6-bit RF digital step attenuator with high linearity, covering an attenuation range of 31.5dB. The FGA is a wideband amplifier with a gain of more than 14dB. An ATT control loop is used to stabilise the input power and increase the dynamic range of the following ADC by controlling the attenuation value of the ATT dynamically. A unique gain estimation and control algorithm with fast settling speed and accurate control result is designed and then performed on the field programmable gate array (FPGA). Detailed design of the ATT control is described in section II-C. To meet the requirement of input dynamic range specified by MNOs, selection of ADC is a crucial step. ADCs with high resolution and sampling rate are preferred [29]. However, this will inevitably induce high data rate generated at the ADC output. If the ADC with 14-bit resolution and 153.6MHz sampling rate is used, as Fig. 4 shows, the line transfer rate induced by 14 channels will be 30.106Gbps (=14 * 14bit * 153.6MHz). In the process of IF digitisation, careful selection of the system IF frequency (f IF ) and ADC sampling frequency (f s ) can optimise the design of analogue frontend, reduce the complexity of following digital signal processing in the FPGA and thus reduce the processing latency. We choose the IF to be located at the centre of the second Nyquist Zone (f IF = (3/4) * f s ), so that this low-IF bandpass-sampling technique allows flexible design of the front-end circuitry without degradation of the RF performance.
The following FPGA algorithm plays a vital role in digitally compressing the data rate without causing dynamic range degradation. The processing algorithm is elaborated in section II-B. To ensure the successful recovery of the signal at the RU, the digital data streams and the control messages (CMs) from ARM are packetised using a userdefinable frame structure as explained in section II-D before transportation over the optical link.
In the RU, the received data frames are depacketised and recovered by an FPGA, where signal streams are then decompressed and carefully combined before the digital to analogue converter (DAC). Unlike CU, RU needs to be kept as simple as possible. Therefore, zero-IF architecture [30] is employed at the RF front end of the RU as this is an effective solution in terms of size and cost by using the commercially off-the-shelf (COTS) chipset. To further reduce the complexity of RUs, a multiband multiplexing algorithm is designed to combine several RF streams onto a carrier before up conversion by a single zero-IF chip. The design is presented in detail in section II-E.

B. DIGITAL SIGNAL PROCESSING AND DATA COMPRESSION
After the digitisation of the RF inputs, digital signal processing is performed in five main stages -gain rescaling, IF data compression, digital down conversion (DDC), baseband data compression and packetisation, as shown in Fig. 4. The purpose of the digital down conversion stage is to down covert the signal to baseband and reduce the spectral bandwidth by applying careful filtering. To compress the digital data, two stages of lossy compression by decreasing sampling rate and removing quantisation levels is performed on the FPGA. Unlike the previous design, a gain rescaling mechanism is added before IF data compression stage to control and rescale the input signal levels, which allows the removing of repetitive most significant bits (MSBs) and least significant bits (LSBs) that represent the signals with no impact on the dynamic range of system.  Compared with nonlinear quantisation methods such as µ-law algorithm [31], this solution offers wide dynamic range as well as fast response on the input dynamics. The IF data compression also saves the FPGA resources by using low bit width DDC design. In the DDC, compressed IF signals are multiplied with two sinusoidal waves generated from a numerical controlled oscillator (NCO), with 90 degree out of phase. A 150-tap root raised cosine (RRC) filter using finite impulse response (FIR) architecture is designed to suppress the spectral redundancy, enabling down-sampling of the signal at a lower clock rate.
In order to further compress the baseband data after the DDC, IQ sampling rate is reduced by careful down sampling of the IQ data stream at a lower clock rate with optimised sampling offsets [32]. The sampling rate must conform to the Nyquist criteria, i.e. it must be greater than two times of the highest frequency component of the input signal [27]. As described earlier, the RRC filter in the DDC carefully filtered out the spectral redundancy without causing any aliasing. Furthermore, as the fixed-point multiplication used for the mixing and filtering process increases the IQ bit width, the same quantisation compression mechanism as described in the IF compression stage is applied by truncating the MSBs and removing the LSBs in a nonlinear manner. Then the compressed baseband data is encapsulated into frames as described in section II-D.

C. NOVEL DUAL-LOOP DAGC
As illustrated in Fig. 5, a novel dual-loop DAGC which simultaneously adjusts the gain in the RF domain and performs the gain rescaling in the digital domain is introduced. The DAGC consists of two gain stages: which are automatic ATT control which attenuates the signal power at the RF chain and digital gain rescaling (DGR) which applies additional digital gain on the digitised signal. The automatic ATT control performs a preliminary coarse gain adjustment with large gain steps to reduce the variance of the analogue input power and avoid saturating and damaging in the ADC. The DGR loop with refined gain steps effectively provides extra gain control before IF data compression to keep the level of the signal within a certain range for maintaining a wide input power dynamic range. The ATT control loop precedes the DGR loop in the architecture while both the loops are using the same gain estimation logic which is composed of three stagesmeasuring the power, determining its state and calculating the required level of control. In this case, the design significantly improves the gain control accuracy, extends ADC dynamic range and makes full use of the available quantisation bits by adjusting the input data to a certain binary range. In this case, a higher data compression ratio can be realised by applying a nonlinear quantisation mechanism. The detailed design of the architecture is described as follows. VOLUME 8, 2020 As shown in Fig. 5, the relationship between the output signal y(n) and the input signal x(n) is where G(n) is the sum of the gain (G a (n)) in the RF domain and that (G b (n)) in the digital domain.
Taking the previous signal into consideration, trapezoidal discrete time integrator used to measure the value of output IF signal with high stability and fast timing response can be expressed as where y(n) is the output IF signal value currently collected, y(n − 1) is the output IF signal value collected last time, R(n) is the measured value of the current signal, R(n − 1) is the measured value of the last signal, f s is the data sampling frequency, K is the coefficient which represents the effect of the new input on the output. Moreover, the system dynamic range is maintained using the loop-control algorithm. A new gain control will be processed to adjust the gain of the system if the measured power is out of range. We use a control period T D to decide how long the decision process should take. The gain is updated only when the number of the signal sources exceeding the thresholds (low/up) in the control period is greater than the decision factors (ϕ). Otherwise, the target gain remains the same so that the gain jitter which may be caused by signal instability can be avoided.
The gain coefficient is positively correlated with the logarithm of the signal strength error between the measured signal value and the reference value, and the relationship between the updated gain and the initial gain can be written as below: 10 lg G(n + 1) − 10 lg G(0) = 10µ(lg(ref 2 /R 2 (n))), (3) where µ is a self-defined parameter which determines the speed of gain adjustment, 10lgG(n + 1) and 10lgG(0) represent the updated gain value and the initial gain value in dB format respectively, ref is the reference value. And the right side of the equation is the ratio between the reference value and measured signal value in dB format. Therefore, the updated gain value can be determined according to the comparison result.
When µ is defined as 1, we can infer from (3) that, if up =(10 0.5 ) * ref 2 , we can get 10lgG(n + 1)−10lgG(0) = 10µ(lg(ref 2 /up)) = −5dB. So when R 2 (n) > up, the gain value should be reduced by at least 5dB. And the cases are similar if R 2 (n) < low. Moreover, unlike the conventional single threshold comparison, the threshold comparator adopts a comparison mechanism based on multi-threshold in order to reduce the gain adjustment times. In the DGR loop, the measured power range higher than high-threshold (up a ) is divided into 7 different levels, and the measured power range lower than low-threshold (low a ) is also divided into 7 different levels. And in the ATT control loop, the measured power range lower than low-threshold (low b ) is divided into 2 different levels. Moreover, in a single threshold condition of the DGR loop, for example, up a < R 2 (n) ≤(10 0.5 ) * up a , the gain (G a (n+1)) of IF signal is adjusted up to 10 times with 10 gain control words. At the same time, in a single threshold condition of the ATT control loop, the gain (G b (n + 1)) is adjusted only once with one gain control word which is used to adjust the gain of RF front end. This allows the output signal to quickly converge to the appropriate range which is equivalent to the measured power range between low-threshold (low a ) and high-threshold (up a ). This method shortens the settling time for the input signal in different power ranges drastically.
The output IF signal is firstly passed through the low pass filter module and then the control logic module. After that, the updated gain values of RF front end and digital gain amplifier are triggered by gain control words from the control logic module. In the ATT control loop, the gain of the downlink RF front end mainly comes from a serial RF digital ATT and a serial FGA. The ATT control loop dynamically adjusts the RF gain (G b (n + 1)) by controlling the attenuation value of the ATT. In the digital gain amplifier module of the DGR loop, the input signal is multiplied by the gain coefficient, and the multiplied signal is shifted according to the updated gain value (G a (n + 1)) to complete the gain adjustment function. Table 1 lists the algorithm parameters and descriptions.

D. TDMA-BASED FRONTHAUL-LINK PROTOCAL
Besides the baseband data streams, CMs from the NXP LPC2368 ARM need to be transmitted between the CU and RU, including operation command messages and warning messages. After the DAGC and data compression, a packetisation mechanism encapsulates the low bit rate digital data streams and CMs into frames before transmission over the fiber link. At the RU, individual data streams are recovered and depacketised into multiple baseband channels (IQs). Fig. 6 shows the proposed user-definable fronthaul protocol where the number of channels and throughput rate can be modified based on time division multiple access (TDMA). In the basic frame structure, we aggregate the IQ bits and CMs of each channel, which have different data throughput rates (α) according to number of aggregated services, followed by control word in the time domain. Some CMs that have a low real-time requirement are down-sampled by a factor (β). Meanwhile, frame synchronisation bits (Sync) are inserted with periodic training symbols for synchronisation of each basic frame, and the rest of bits are reserved for functional split information required for eCPRI/RoE inputs allowing vendor specific interfaces to be integrated in the same system for 5G fronthaul scenarios. To ensure the timing and integrity of the data transmission when the protocol is used, IQ bits and CMs need to be buffered by first input first output module (FIFO) according to different throughput rate of each channel. Since clock synchronisation is performed between the CU and RU, the depth of the FIFO can be very small, which brings little impact on the processing latency.

E. MULTIBAND MULTIPLEXING SCHEME
In the RU, after depacketisation and decompression, a multiband multiplexing scheme is employed to combine several channels into one single band as shown in Fig. 3. The purpose of the scheme is to reduce the number of zero-IF chips (including DAC) needed at the RUs. As this allows simpler hardware design for multiple services, the approach improves system reliability and lowers system hardware debugging efforts. By performing the multiple digital baseband combination, RUs do not need sophisticated and high-speed up-converters, and only a single-stage analogue quadrature modulator device is required. In comparison with digital IF processing, the wide-band zero-IF approach is a much more cost-effective solution for RUs.
Suppose that we have N IQ channels IQ 1 , IQ 2 , . . . , IQ N , the medium signal spectrum R m (t) after up-conversion can be represented by where f m is the NCO frequency of the module which is defined as where F m is the RF service centre frequency, and f IF denotes the medium centre frequency. The frequency spectrum of the up-converted medium signal spectrum R m (t) is located near the medium centre frequency whose amplitude can be adjusted by multiplying corresponding coefficient e m as depicted in (6). We then combine the processed multiservice signals and obtain a wide baseband signal as below Based on this method, the multiband multiplexing module offers a promising alternative solution by combining multiple RF service signals in the digital domain rather than using multiple parallel RF chains. To reconstruct the original multi-baseband signals at lower frequency precisely and prevent spectral aliasing, the number of channels is restricted by the receiver bandwidth of the zero-IF chip at the RF terminal. For example, if a 100MHz-bandwidth zero-IF chip is used, up to four 20MHz LTE channels can be multiplexed with careful filtering. If we add more zero-IF chips, the number of channels supported by the system is increased. Fig. 7 demonstrates the multiband combination of N separate baseband signals using the multiband multiplexing algorithm.

A. EXPERIMENTAL SETUP
Based on the neutral-host RAN scheme in the Section II, a multiservice DRoF system for the neutral-host RAN is experimentally demonstrated as illustrated in Fig. 8. The system supports all 14 inputs of 9 cellular services from the three Chinese MNOs as shown in table 2. Note that, although not all services are LTE, multiple input and multiple output (MIMO) channels are included for service 2, 3, 4, 7 and 8 to allow future implementation of LTE MIMO in those bands. Thus, the transmitted bandwidth for GSM 1800 and WCDMA 2100 is much larger than that is required by the service itself. In fact, the system is able to support a total of 411MHz bandwidth, which is equivalent to over 20 LTE inputs if the spectrum is fully utilised.
To test the 4G performance, an LTE downlink signal is generated by a Rhode and Schwarz (R&S) SMW200A vector signal generator (VSG). The LTE test model (TM) 3.1 (64QAM modulation) is used for this experiment in order to test the inputs with highest modulation format. The signal is then digitised by the Linear Technology LTC2152-14 14-bit ADC before the data processing is carried out using the FPGA. As explained in section II-B, we adopt the f IF = (3/4) * f s sampling architecture where the IF frequency is set to 115.2MHz, and the sample rate of the ADC is set to 153.6MHz. A Xilinx Kintex 7 XC7K325T FPGA is used for real-time implementation of the digital signal processing algorithms. It has 16 regular transceiver channels supporting data rates up to 10.25Gbps per channel.
The data compression algorithm is able to reduce the digital IF bit width to 8-bit without sacrificing dynamic range performance. The resampling rates for each service provided by the three MNOs are shown in table 2, a 6-bit LSB truncation is performed for all data samples. As a result, the line transfer rate is up to 7.455Gbps (= 465.92M * 8bits * 2(I/Q)). The compressed output serial digital data is modulated using a small form-factor pluggable plus (SFP+) optical transceiver module with an integrated distributed feedback laser (DFB) laser operating at wavelength of 1310 nm. The digital RF signal is directly modulated onto an optical carrier using intensity modulation [33]. The optically modulated signal is subsequently transmitted over 20km of SMF. At the receiver, the optical carriers are converted back to electrical signal by a p-i-n diode enclosed in the SFP+ module and the received serial digital stream is converted to a set of parallel data containing the IQ information of each input service. The baseband IQ is then multiplexed digitally as described in section II-E and subsequently fed into the RF front end with a series of zero-IF chips to reconstruct the RF signal for wireless coverage. The corresponding services from the reconstructed signal are measured by the R&S FSW vector signal analysis (VSA). Inputs signals are switched to other wireless standards in order to test all services required.

B. EXPERIMENTAL RESULTS AND ANALYSIS
As the DAGC module plays a vital role in maintaining a wide input signal dynamic range after data compression, the EVM test is performed to demonstrate the dynamic range improvement with the algorithm. Specified by 3GPP, the EVM requirement for LTE signal with 64 QAM which is the highest modulation format defined is 8% [34], [35]. Taking the 40686 VOLUME 8, 2020  GSM1800/LTE Frequency Division Duplexing (FDD) 1.8G channel as an example, quantisation compression is applied by removing the 6 LSBs. Based on statics and analysis of the compressed signal, The DAGC module parameters are listed as shown in table 3. The initial attenuation value of the ATT is set as -21dB. The minimum gain step of the ATT control loop is 10.5dB which can reduce the variance of the analogue input power. And the minimum gain step of the DGR loop is 0.5dB which can keep the level of the signal within a certain range and maintain a wide input power dynamic range. Fig. 9 shows the EVM performance as a function of input power level at a line transfer data rate of 7.455Gbps. As shown, a 32dB dynamic range is demonstrated for an EVM below 8%. When the novel DAGC module which includes ATT control loop and the DGR loop is added before the data compression, as shown in Fig. 9, the algorithm is able to add at least 40dB to the total dynamic range.
At the transmitter, a TDMA-based fronthaul-link protocol aggregation of 14 baseband signals, as well as their CMs, is performed in the FPGA. And the frame structure of the user-defined protocol is shown in Fig. 10. In the basic frame, the ratio between the CM bits and the IQ bits is 1:32 and each IQ sample has 32 bits. Thus there is 1 CM bit per IQ sample. As explained previously, the aggregated digitised and compressed baseband signals of 14 channels are sent  at 7.455Gbps. The aggregated baud rate for the CMs is 7.455Gbps * 1/32 * 1/5 = 46.59Mbps, where 1/5 is the total down-sample rate (β) of CMs. Thus, the total line rate is 7.5Gbps when sync and control word symbols are also added in the frame to recover and depacketise the data at the RU.
At the RU, the three-channel digital baseband IQs are combined as described in section II-E before upconversion by a single zero-IF chip. Fig. 11 depicts the RF spectrum of the three downlink signals (TM3_1_20M) produced by the   VSG at the carrier frequencies of 2126.5MHz, 2147.5MHz and 2168.5MHz respectively. Based on the frequency and bandwidth of the input signal of each channel, the parameters of the multiband multiplexing scheme are listed as shown in Table 4.
The power spectrum at the output of the zero-IF chip that processes the multiplexed signals is shown in Fig. 12. We can see that the central frequencies of the three recovered signals are 2126.5MHz, 2147.5MHz and 2168.5 MHz respectively.   13 shows the measured EVM against the input power when using the digital multiplexing scheme with the channel spacing fixed at 1MHz for the three carriers. As shown, all the three channels maintain a low EVM level for inputs between 13dBm and -50dBm. The EVM curve of Ch.1 follows almost identical trend as that of Ch.3. Moreover, the EVM of both side channels (Ch.1 and Ch.3) are lower than that of the central channel (Ch.2). This is due to the extra intermodulation distortion in Ch.2 compared with the two adjacent channels.  Table 5 lists the EVM results of the three channels in the DRoF link with and without multiplexing the signals in the digital domain when the system input power is fixed at -10 dBm. The EVM results for Ch.1 and Ch.3 are both 2.1% when digital multiplexing is applied. Compared to the 2.05% EVM with no multiplexing in the digital domain, not much RF performance is sacrificed in exchange of much greater capital expenditure (CAPEX) in the RF circuit design through saving the number of zero-IF chipsets needed. And for Ch.2, the digital channel multiplexing has shown an improvement of the EVM (from 3.4% to 2.41%) by reducing the nonlinear distortion caused by inter-channel mixings in the analogue domain.
As displayed in Fig. 14 (a), we tested the system EVM results for all the cellular services provided by the three MNOs in China while the results of the second MIMO channel for the services are shown in Fig. 14 (b). As seen, the input signal dynamic range <8% EVM are over 60dB for all the services, including a 5G compatible signal, which is well above the requirement specified by MNOs. We also measure the one-way processing latency (1.89us) for an input of LTE FDD at 1.8GHz as an example. Compared to the 5us requirement specified by CPRI, this demonstrates that the system offers a sufficient latency budget for fronthaul transmission and demonstrates its feasibility of implementing real-life neutral-host RAN architectures. Note that the 5G test is carried out by transmitting a 3.5GHz 20MHz RF signal modulated by 64QAM format over the DRoF system due to the lack of fully compatible 5G RF frontend module and testing equipment. Once available, the 5G service card can be hot-pluggable into the CU to complete the industry-level conformation testing for MNOs. We expect that the increased line rate with the existence of 5G from three MNOs is up to 30Gbps for 100MHz bandwidth 5G inputs. For future millimetre-wave (mmW)-based 5G services, a hybrid ARoF and DRoF frontend design process is undergoing to investigate an optimised system solution for extreme high-frequency (EHF) wide-band service integration over the underlined system architecture demonstrated in this paper.

IV. CONCLUSION
In this paper, we have presented a compact multiservice DRoF system for neutral-host fronthaul transmission, which supports the transmission of multiple wireless channels at low-bit rates as well as realises multiservice multi-operator signal coverage using a miniaturised radio unit. The system performs a novel data compression technic to increase the spectral efficiency in a given optical fiber infrastructure and uses a DAGC algorithm to maintain the dynamic range and EVM performance of the system after data compression. We also have proposed a flexible fronthaul link protocol based on TDMA, supporting the IQ data and CMs transmission of the signals from the three MNOs, which are multiplexed together using a multiband multiplexing algorithm to deliver the services through a single RF link. The use of a multiband multiplexing algorithm allows a full centralisation of all type of signal sources and the reduction of overall power consumption. The experimental results have shown error-free transmission for the simultaneous transmission of the 14 services of the three MNOs over a 20km 10Gbps link with low processing latency (<2us one-way delay). A 60 dB dynamic range for an EVM below 8% is also demonstrated, showing its feasibility of providing future wide-band and multiservice wireless coverage in a cost-effective and energy-efficient manner. XUEFENG WANG received the bachelor's degree from Wuhan University, Wuhan, China, in 1997, and the Ph.D. degree from the Chinese Academy of Sciences, Shanghai, China, in 2002. He is currently the Director of the R&D Center, Beijing Institute of Aerospace Control Device. His research interests mainly include fiber optics and optoelectronic sensors. He has published more than 50 articles, and received a National Award, in 2010. VOLUME 8, 2020