Investigation of Inverse Piezoelectric Effect and Trap Effect in AlGaN/GaN HEMTs Under Reverse-Bias Step Stress at Cryogenic Temperature

The inverse piezoelectric effect and trap effect in GaN HEMTs under the high electric field by reverse-bias step stress at cryogenic temperature (CT, 77K) have been investigated. It is found that the inverse piezoelectric effect is suppressed while the trap effect is enhanced at CT. Due to the lower tensile stress in the as-grown AlGaN barrier at CT, the amplitude of the critical voltage related to inverse piezoelectric effect increases from 75V at 300K to 100V at CT, mitigating the irreversible degradation of the devices. The inverse piezoelectric effect dominates the degradation of reverse gate leakage, which is weakened at CT. However, the devices suffer from more degradation of Id (decreases by 94.38%) and Gm, max (decreases by 95.15%) at CT in the dark, induced by the serious trap effect due to the longer emission time. UV-light-assisted stress measurements have been utilized to identify the contribution of the two mechanisms to the degradation of device characteristics at CT. The degradation of Id(Gm, max) is only 0.82% (3.31%) for the piezoelectric effect and 93.56% (91.84%) for trap effect at CT, respectively.


I. INTRODUCTION
GaN exhibits high radiation hardness because of its high bond strength and high threshold displacement energy induced by the large bandgap [1]. As a result, GaN-based RF devices and power devices are perfect candidates for space exploration and satellite communications [2]. In addition to the radiation, the harsh space environment also includes extreme temperature. During the past few decades, the characteristics of devices at high temperature [3] and the reliability [4]- [7] on inverse piezoelectric effect, hot carriers, and electrochemical reaction have been widely investigated. However, the The associate editor coordinating the review of this manuscript and approving it for publication was Jiajie Fan . research on GaN-based devices at low temperature, especially cryogenic temperature, was relatively few.
Up to now, the studies of GaN based devices working at low temperature focus on the following aspects: (1) Enhanced transport properties at low temperature due to the weaker phonon scattering [8], [9]; (2) More excellent DC and RF properties at low temperature [10], [11]; (3) The kink effect associated with impact ionization [12]. Most researches have focused on the characterization of the GaN material and devices at low temperature. However, the low temperature reliability of GaN based HEMTs is lack of investigation [13].
Many reliability issues of GaN HEMTs are related to the high electric field in the AlGaN barrier layer and/or in the channel [14], [15]. Two models under the high electric field in the reverse-bias stress have been proposed. One is the electrons injected from the gate and then trapped in the barrier or at the AlGaN surface, resulting in the recoverable degradation. The trapped electrons would deplete the two-dimensional electron gas through modifying the electrostatics of the channel, which have influence on the characteristics of devices. The other is the inverse piezoelectric effect, resulting in the unrecoverable degradation. The inverse piezoelectric effect connects the high voltage with high mechanical stress in the pseudomorphic AlGaN barrier. The application of high voltage induces the high electric field, which results in the extra tensile stress in the AlGaN barrier. When the stored elastic energy density exceeds the tolerance of the barrier layer, the excessive tensile stress relaxes through the formation of crystallographic defects. This mechanism can be characterized by a critical voltage, beyond which the unrecoverable degradation takes place. Nevertheless, the two mechanisms under reverse-bias stress at low temperature are rarely investigated. And the contribution of different mechanisms to the degradation in devices is ambiguous.
In this paper, the inverse piezoelectric effect and trap effect have been investigated at cryogenic temperature (77K, marked as CT) by reverse-bias step stress. The amplitude of the critical voltage at CT is 25V higher than that at room temperature (RT), which suggests that it is more difficult for the inverse piezoelectric effect and irreversible degradation to take place at CT. However, the degradation of characteristics such as the drain current and the maximum transconductance, is more serious at CT, which is dominated by the trapping effect of electrons injected from the gate. The mechanisms under reverse-bias stress at CT have been investigated by theoretical calculation and experiments. The UV light has been introduced in the study of inverse piezoelectric effect. The quantitative analysis of the degradation due to inverse piezoelectric effect and trap effect has been made. The introduction of UV light, on the one hand, establishes the multiphysically-coupled environment including electricity, temperature and light, and on the other hand, provides a method to distinguish the above two effects.

II. DEVICE FABRICATION AND EXPERIMENTS
The AlGaN/GaN hetero-junction structure was grown by MOCVD on (0001) sapphire substrates. The epitaxial structure was composed of, from the substrate up, a nuclear layer, a 1.3 µm unintentionally doped (UID) GaN layer, a 1nm thick AlN interlayer and a 22 nm thick unintentionally doped Al 0.3 Ga 0.7 N barrier layer. Mesa isolation was performed by Cl 2 -based reactive ion etching (RIE). Ohmic contact was realized by consecutively annealing the e-beam evaporated Ti/Al/Ni/Au stacks at 830 • C for 30 s in nitrogen ambient. It was followed by a 60-nm plasma-enhanced chemical vapor deposition (PECVD) Si 3 N 4 passivation layer. The Si 3 N 4 in the gate area was removed by RIE, and then the metal stacks of Ni/Au/Ni were deposited to form the Schottky contact. The length of the gate was 0.8 µm. The gate-to-source spacing and gate to drain spacing were both 1.6 µm. The structure of devices utilized in this paper is shown in Fig. 1a. The fresh device shows I d,max of 836 mA/mm, V th of −3.64V and G m,max of 217 mS/mm. The off-state drain leakage current is approximately equal to the gate leakage current. The stress experiments were carried out as the procedure in Fig.1b. The gate voltage was stepped from −10V to −100V in the step of 5V while keeping V s = 0V and V d = 0V. The device was stressed for 5min at each step and the stress currents were monitored simultaneously. At the end of each step, the gate stress voltage was removed. And then transfer characteristics at V d = 10V and I g − V g curves (V s = 0 and drain floating) were measured in a short time and the next voltage step was applied immediately. This cycle at a certain frequency was repeated until the end of the stepstress experiments. The step-stress experiments in the dark and under the UV light (380nm) were both carried out at CT and RT, respectively.

III. RESUITS AND DISCUSSION
This section focuses on the results and discussion on the degradation of devices under reverse-bias step stress. Two mechanisms including inverse piezoelectric effect and trap effect will be discussed at cryogenic temperature, whose contribution to the degradation of device characteristics will be investigated in detail.   Fig. 2 shows the gate stress current in the reverse-bias step stress experiments performed at RT and CT in the dark and under 380nm UV light, respectively. The gate stress current at RT is higher than that at CT. This is because that the reverse gate leakage current is found to be dominated by Frenkel-Poole emission (a trap-assisted process), and Fowler-Nordheim tunneling (an electric-field-dominated process) [16], [17]. In this paper, for the devices with Lg = 0.8µm under large reverse-bias voltage, the electric field increases faster at the edge of the gate than that under the center of the gate. At the lower reverse gate voltage bias, the gate leakage mechanism both at the edge and under the center of the gate electrode are dominated by F-P emission. And then, when reverse gate voltage bias increases, at the gate edge the gate leakage mechanism is dominated by F-N tunneling due to the higher reverse electric field; while under the center of the gate electrode, the gate current is still dominated by F-P emission [18]. As the voltage continues increasing, both the two regions of the gate electrode are dominated by the F-N tunneling mechanism. Frenkel-Poole emission would be enhanced by high temperature and electric field. Since trap emission is also enhanced by UV light, the gate stress current under UV light is higher than that in the dark.

A. INVERSE PIEZOELECTRIC EFFECT
The high electric field at the edge of the gate is one of the main factors of devices failure [19], where the inverse piezoelectric effect tends to occur. The critical voltages, beyond which irreversible degradation takes place due to inverse piezoelectric effect, are −75V at RT and −100V at CT in the dark, as shown in Fig. 2. That is to say, it is more difficult for the inverse piezoelectric effect to take place at the lower temperature. As shown in Fig.2, when −100V is applied, the gate stress current under UV light becomes higher than that in the dark. Before the inverse piezoelectric effect takes place, the electrons are injected from gate into the AlGaN barrier by the high electric field. And the injected electrons could be trapped in the barrier in the dark. After the critical voltage, the electrons detrapped from the traps in the barrier contribute to the gate stress current along the newly formed leak path, which results in that the gate stress current in the dark increases more quickly and slightly larger than that under the UV light at V gstress = −100V. The gate stress current increases more quickly after critical voltage at CT than that at RT. This is because that at CT the inverse piezoelectric effect occurs at a larger bias and more electrons are trapped in the barrier before critical voltage, and then more trapped electrons contribute to the gate stress current at CT after critical voltage.
In the following, the reason for the higher amplitude of the critical voltage at CT will be discussed. As mentioned in section I, electrons could be injected from the gate to the AlGaN surface by high electric field. The trap states at the AlGaN surface are identified as donor-like traps. If electrons are trapped at the surface, the 2DEG concentration is reduced due to the electrostatic balance. It has been reported that the surface trapping effect could relieve the electric field peak at the gate edge to some extent [20]. To eliminate the surface trapping effect and focus on the main influence of the temperature on the piezoelectric effect, the UV light was utilized. As shown in Fig. 2, the critical voltages under the UV light are the same as those in the dark, which indicates that the surface charging has little influence on the inverse piezoelectric effect.
As mentioned in section I, the inverse piezoelectric effect connects the high voltage with the mechanical stress (usually tensile stress) in the AlGaN barrier. For GaN-based HEMTs, due to the existence of lattice mismatch, the AlGaN barrier suffers from the tensile stress, which would be enhanced under the reverse-bias voltage. To further investigate the difference of inverse piezoelectric effect between CT and RT, the tensile stress in the AlGaN barrier need to be calculated.
Firstly, the lattice mismatch at different temperature is calculated. S 0 denotes the as-grown lattice mismatch between AlGaN and GaN, which remains unchanged even with additional electric field, and can be given as follows [21]: where a GaN and a AlGaN represent the lattice constants of GaN and AlGaN, respectively. The temperature dependence of a can be described as where a 0 is the lattice constant at RT [21] and T 0 is 300K. The calculation results of S 0 are shown in Fig. 3a.  Then the total tensile stress (T total ) in the AlGaN barrier is given by Joh [20].
where the elastic constant C and the piezoelectric tensor e are listed in Table 1, and E denotes the additional electric field. The effect of temperature on the parameters (C and e) is so small that it will be ignored. [22], [24] Ts represents the as-grown tensile stress without additional electric field, which decreases as temperature decreases, as shown in Fig. 3a. The Ts at CT is 0.038GPa lower than that at RT. The tensile stress induced by additional electric field is expressed as Te. At CT, Ts is lower, and then the higher electric field is required to achieve the tolerance of the barrier layer leading to the occurrence of the inverse piezoelectric effect, as shown in Fig. 3b. As a result, the amplitude of the critical voltage related to the inverse piezoelectric effect at CT is larger than that at RT (Fig. 2). To verify the accuracy of the calculation, the vertical electric fields at critical voltage have been simulated by Silvaco Atlas. For a fixed T total corresponding to the onset of the inverse piezoelectricity, the difference in the electric field between RT and CT is 0.498MV/cm, as shown in Fig. 3b. The simulated peak electric field at critical voltage (V g = −75V) at RT is 4.30MV/cm, and 4.86MV/cm for critical voltage (V g = −100V) at CT. The difference in the simulated peak electric fields between RT and CT is 0.56MV/cm, which is close to the calculated result, indicating that the calculated results agree with the experimental results in Fig.2 (25V difference of critical voltage between RT and CT).

B. TRAP BEHAVIOR OF ELECTRONS INJECTED FROM THE GATE
The transfer characteristics of the devices before and after stress are shown in Fig.4. The off-state current increases after V gstress = −100V both in the dark and under the UV light, due to the inverse piezoelectric effect. The on-state current decreases in the dark, which is more serious at 77K. To investigate the degradation of the devices, trap behavior has been considered. The electrons are injected into the traps both in the AlGaN barrier and at the interface of SiN/AlGaN VOLUME 8, 2020 by the high electric field under the reverse-bias stress [25], as shown in Fig. 7b. The trapped electrons could be detrapped by thermal activation at the intervals of alternating stress. The emission time of traps (τ T ) is given by where σ T is the capture cross section of the trap, N c is the density of states in the conduction band, ν T is the average thermal velocity of the carriers and E T is the trap state activation energy. When the temperature drops to CT, the electrons can hardly release from the traps by thermal activation. In other words, the τ T increases as the temperature decreases.
In order to further investigate the degradation of devices during the stress procedure, typical characteristic parameters, e.g. n s , V th and I d , are analyzed. The threshold voltage (V th ) is determined as the gate voltage corresponding to the drain current of 1mA/mm. As shown in Fig. 5a, as the stress voltage increases, the V th shifts positively firstly and then tend to saturation at CT in the dark. For RT, the V th shifts positively first, then reaches saturation and finally shifts negatively. The positive drift of V th would be induced by the electrons trapped in the AlGaN under the gate. However, After −75V reverse-biased gate stress at RT, the off-state characteristics (including the gate leakage current, drain leakage current and subthreshold swing) are degraded due to the inverse piezoelectric effect, as shown in Fig.8. In this work, V th is determined as the gate voltage corresponding to the drain current of 1mA/mm. Due to the poor off-state characteristics after critical voltage, more negative gate voltage is required to reduce the drain current below 1mA/mm. Therefore, the V th shifts negatively at RT after −75V reverse-biased gate stress along with drastically increased off-state drain leakage current and subthreshold swing.
To investigate the trap effect under the gate, C-V characteristics were measured during the step stress in the dark. AlGaN/GaN schottky diodes were used to study the C-V characteristics, which consisted of a circular gate contact of a diameter of 130 µm and a surrounding ohmic contact with an Ohmic-Schottky separation of 30 µm. In the experiments, the procedure was the same with that described in section II (Fig. 1b), except that the monitoring parameters were C-V related characteristics. The C-V curves before and after the step stress are shown in Fig. 5b, which shift positively as the stress voltage increases. Then the 2DEG density (n s ) can be calculated by integrating the C-V curves as follows [26]: where q represents the magnitude of electronic charge, V is the voltage, and the pinch-off voltage (V pinch−off ) is defined as the maximum gate voltage for capacitance smaller than 10nF/cm 2 , the on-state voltage V on is defined as the gate voltage for the electron concentration reaching the peak value. The n s as a function of the reverse-bias step stress is shown in Fig. 5c. The n s decreases firstly as the increase of stress voltage and tends to be saturated both at RT and CT. What's more, the reduction of n s at CT is larger than that at RT. This phenomenon can be explained as follows: at the beginning of the stress experiment, as the stress voltage increases gradually, electrons are injected into the traps in the AlGaN barrier and the n s is partly depleted by the trapped electrons, due to the electrostatic balance, at both RT and CT. As mentioned above, the electrons could be detrapped by thermal activation at the intervals of alternating stress. Namely, the electrontrapping and electron-detapping process can both take place during the experiments. Then in fact, the n s is influenced by the net trapped electrons in the AlGaN barrier. When the number of electrons trapped and detrapped reaches dynamic balance, the net trapped electrons tend to be saturated and the n s reaches its minimum value. It is noticed that the detapping process relies on the τ T as mentioned in (4). Since τ T at CT is larger than that at RT, the detrapping process at CT is difficult to occur, then the net number of trapped electrons is larger, as a result, the reduction of n s is larger.
As shown in Fig. 5d, V shifts positively as the increasing of stress voltage and then tends to saturation both at RT and CT, which can be easily explained from (6), considering the variation of n s . V = q × n s /C (6) where q represents the magnitude of electronic charge, and C is the unit area capacitance. The variation of V resulted from the variation of n s is consistent with the drift of V th in the dark before critical voltage. The variation of V th under the UV light is shown in the Fig.5e. The V th shifts negatively slightly before critical voltage because the electrons are detrapped in the barrier by the UV light. The V th shifts more negatively after critical voltage due to the poor off-state characteristics, for the same reason in the dark as mentioned above. The C-V characteristics in AlGaN/GaN schottky diodes before and after stress under the UV light are shown in the Fig. 5f. The C-V curves shifts negatively slightly, which means that the n s under the gate during the stress under the UV light changes little. Therefore, the V th shifts slightly under the UV light due to nearly unchanged n s . As to the degradation of Id, the extraction methods from the transfer characteristics are generally two types. One is the Id corresponding to a fixed gate voltage. And the other is the Id corresponding to a varying gate voltage with Vth correction [27]. As mentioned above, the V th shifts during the step stress. Hence, the degradation of Id at Vg = V th + 5V is shown in Fig. 6a, to exclude the influence of Vth drift. The Id decreases by 28.95% and the Gm, max decreases by 28.15% at the end of the step stress at RT in the dark, while the reduction of which is 94.38% and 95.15% at CT, respectively. For experiments under UV light, the Id decreases by 1.11% at RT and 0.82% at CT, respectively. The Gm, max reduces by 6.66% at RT and 3.31% at CT, respectively. The shaded areas of Fig. 6 are induced by trap effect, which will be discussed in section C.
The whole trap behavior during the step stress experiments can be illuminated in Fig. 7. Generally, the possible distribution of the traps in the fresh devices can be simply presented in Fig. 7a. When the reverse-bias voltage is applied to the devices, the electrons are injected into the traps in the AlGaN barrier and at the SiN/AlGaN interface by the high electric field, as shown in Fig. 7b. The trapped electrons at the SiN/GaN interface form a ''virtual gate'', which would deplete the access region channel and result in the degradation of I d and G m,max . The length of ''virtual gate'' increases as the reverse-bias voltage increases, which results in more severe degradation.
The trap behavior also happens in the AlGaN barrier, which has similar influence on the I d and G m,max . The trapped electrons could be detrapped partly by thermally activation at RT. However, the longer τ T at CT induces more serious degradation of I d and G m,max , and a similar phenomenon is described in the above C-V measurements in the dark. And the trapped electrons would be activated by the UV light. That is to say, the trapping process is almost eliminated by the UV light.
Finally, the gate reverse current (I g ) at V gs = −10V extracted from the Ig-Vg curves during the stress experiments is shown in Fig. 8a. The off-state drain current (I doff ) @V gs = −6V extracted from transfer characteristics during the stress experiment is shown in Fig. 8b. The same trend of the I g and I doff during the stress suggests that their degradation is dominated by the same mechanism. The I g and I doff decrease firstly as the increase of stress voltage, then remain constant and finally increase rapidly after critical voltage in the dark. However, the I g and I doff under the UV light stay at a stable value until the critical voltage. This is because of the trap effect in the AlGaN barrier under the gate. The trapped electrons in the barrier lift the conduction band and suppress the following electrons-injection-process from the gate [28], resulting in the decrease of I g and I doff both from Poole-Frenkel emission and Fowler-Nordheim tunneling [29]. For experiments under the UV light, the constant I g and I doff before critical voltage are due to the elimination of trapping process by light activation. When the stress voltage increases to the critical voltage, new path leakage in the barrier occurs, and the I g and I doff increases rapidly [30]. The SS extracted from the Id-Vg curves during the stress experiments is also presented in Fig. 8c, which increases after critical voltage and is closely related to the off-state current (dominated by gate reverse current).

C. CONTRIBUTION OF DIFFERENT MECHANISMS
To further analyze the contribution of different mechanisms to the degradation of device characteristics, the characteristics after stress in the dark and under UV light are compared in detail. The related mechanisms in the experiments are trap behavior under the gate and in the access region, and permanent structure damage caused by inverse piezoelectric effect.
When the UV light is applied, the characteristics of devices remain unchanged before critical voltage. After critical voltage, the I g and SS increases rapidly, while the I d and G m,max decrease slightly.
The UV light is applied to eliminate the trap effect during the stress. And the degradation of characteristics after critical voltage under the UV light is induced only by the permanent structure damage, namely inverse piezoelectric effect. From Fig. 6 and Fig. 8, the inverse piezoelectric effect induces serious degradation of I g , I doff and SS, but has little impact on I d and G m,max .
The contribution of these two mechanisms can be described by Parameter pe = Parameter UV Parameter te = Parameter dark − Parameter UV (7) where Parameter represents the degradation of device characteristics including I d and G m,max . The subscripts pe and te refer to the inverse piezoelectric effect and the trap effect, respectively. The drift of V th is related to the trap behavior under the gate. The degradation of I d derived at V g = V th +5V excludes the impact of V th . That is to say, the degradation of I d induced only by the trap effect in the access region, as shown in the shaded areas of Fig. 6. The G m is connected with the intrinsic transconductance (G m,i ) and the resistance between source and gate (R gs ). Since G m,i and R gs are mostly affected by the traps under the gate and in the access region, respectively, the trap behavior in the both regions has impact on the degradation of G m,max . The detailed degradation of I d and G m,max is shown in Fig. 9a and b, respectively.

IV. CONCLUSION
The degradation of AlGaN/GaN HEMTs under reverse-bias step stress at CT and RT is investigated. The amplitude of critical voltage related to the inverse piezoelectric effect at CT is higher than that at RT, for the smaller tensile stress in the AlGaN barrier at CT without additional voltage. The UV light has little impact on the inverse piezoelectric effect. It is the temperature instead of the traps that dominates on the critical voltage, which has been verified by the theoretical calculations and simulation results. The contribution of the two mechanisms to the degradation of device characteristics is distinguished by UV light experiments. The inverse piezoelectric effect induces the increase of I g at V gs = −10V, and has little impact on I d and G m,max . Trapping behavior dominates the positive V th drift and the decrease of I d and G m,max . Devices at CT suffer more serious degradation of I d and G m,max due to the longer τ T at lower temperature. The quantitative analysis of the degradation of characteristics due to different mechanisms provides more explicit guidance for the process optimization of the devices and is more meaningful for the practical application of devices. The results presented in this paper are meaningful for reliability analysis of GaN-based power devices in the cryogenic-temperature environment, and provides reference for their application in deep space exploration.