High-Precision Adaptive Slope Compensation Circuit for DC-DC Converter in Wearable Devices

This paper presents a high precision adaptive slope compensation circuit for for DC-DC converter in wearable devices. Compared with the traditional adaptive slope compensation circuit, the comparator is used to sample the output voltage and input voltage, which greatly improves the accuracy.In this paper, the circuit is designed in UMC 0.18-<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS Technology and verified by Virtuoso Spectre Circuit Simulator. The simulation results show that the accuracy of the adaptive slope compensation circuit in this paper can reach more than 96%.

control the ratio of turn-on and turn-off of semiconductor switching devices and stabilize the output voltage [6], [7]. In these switching mode power supplies, the control mode of the system mainly includes current mode and voltage mode. The voltage control mode has only one control loop, which adjusts the loop by monitoring the change of the output voltage, but its response speed is slow and complex compensation is needed. The current control mode contains two control loops, and the changes of voltage and current change at the same time to be adjusted in the loop, so the response speed is relative [9] faster. Because of the existence of the current feedback loop, the compensation structure of the circuit system is greatly simplified. Current control mode is widely used in DC-DC converters nowadays because of its fast response and simple compensation structure [10], [11]. In practical application, the appropriate slope compensation should be given according to the specific switching power circuit, otherwise, when the compensation amount of the slope compensation is too large, which means overcompensation, it will deteriorate the transient response and the load capacity of the whole system. On the contrary, if the compensation is insufficient, there may be under-compensation, which can not completely eliminate the defects of peak current control mode, and can not reliably guarantee the work of the whole circuit. Since the slope compensation of the DC-DC converters need to consider the input and output signals, it is therefore necessary to adjust adaptively changed according to the slope of the input-output voltage [12]. The adaptive slope compensation circuit designed in this paper is used in Buck type DC-DC converter, which adopts peak current control mode. Although the circuit system has a fast response to the transient response, when the duty cycle is more than 50%, it is prone to sub harmonic oscillation, and the chip stability is seriously affected. Therefore, in order to ensure the stability of the system, the slope compensation circuit must be added [13]. Slope compensation refers to adding slope compensation current to the current control loop of DC-DC converter to reduce the sub-harmonic oscillation caused by inductance current fluctuation [14], [15].

II. BASIC PRINCIPLE OF SLOPE COMPENSATION A. BUCK SWITCHING MODE POWER SUPPLY
The average output voltage of Buck switching mode power supply V O is always less than the input voltage V I [16]. Fig. 2 (a) is the circuit structure of the Buck SMPS. When the power switching transistor MP is on, the current of the inductance increases and the electric energy is stored in the inductance in the form of magnetic energy; the freewheeling diode D is in the cut-off state; the capacitor C provides the energy for the load R. When the power switching transistor MP cutoff, the current of the inductance decreases, but it cannot be altered. The voltage reverse of the both ends of the inductance makes the freewheeling diode D on, the inductance releases the magnetic energy through the freewheeling diode D and recharges the load capacitor [17].
The following analysis ignores the equivalent resistance of the inductor, the conduction voltage of the switching transistor and the conduction voltage of the freewheeling diode.
When 0< t≤T ON , the power switching transistor MP is in the conducting status, here T ON is the conduction time of the switching transistor, and the equivalent circuit of the main circuit in the conducting status is shown in Fig. 2 (b). At this point, the inductive current increases linearly, and the amount of increase is: When T ON < t≤T, the power switching transistor MP cuts off, here T OFF is the conduction time of the switching transistor, and the equivalent circuit of the main circuit in the non-conducting status is shown in Fig. 2 (c). At this time, the inductance current decreases linearly. The amount of decrease is: In steady state, I L keeps constant at the end and beginning of each cycle, so: The relationship between output voltage and input voltage and duty ratio can be obtained as follows:

B. PEAK CURRENT CONTROL MODE
In general,current control mode includes uniform inductive current control mode and peak inductive current control mode. Due to the complexity of sampling and control circuit of the uniform inductive current control mode, it is seldom used. The peak inductive current control mode is selected in this design [18]. Its principle is shown in Fig. 3. As shown in Fig. 3, the peak current mode is to add a current control loop above the voltage control mode, thus realizing the sampling and control of the output voltage and inductive current. The sample of output voltage V FB is achieved by the resistor divider, then feedback voltage V FB and the reference voltage V REF are compared in the error amplifier, whose output is the error signal V C . When the current signal obtained by sampling and the compensation signal produced by the slope compensation circuit is summed and compared with V C in the comparator, the PWM control signal is obtained. The PWM control signal determines the duty ratio of the system and realizes the regulation and stability of the output voltage [18], [19].

C. TRADITIONAL SLOPE COMPENSATION PRINCIPLE
Conventionally, the compensation signal is one-time slope compensation, that means, a slope compensation current with constant slope is added into the current control loop to eliminate the influence of inductance current disturbance.
During the CCM peak current control mode, when duty ratio D>50% and without slope compensation, the inner current loop will be unstable, and a disturbance with small inductance current will produce greater disturbance after several cycles. As shown in Fig. 4, the red line represents the inductance current I L , I 0 represents the disturbance on the inductance current, and the blue line represents the inductance current with the interference I L . During the CCM current mode, when a small disturbance I 0 appears in the inductance current, If duty ratio D is less than 50% (D<50%), the inductance  current disturbance I 0 will be attenuated to I 1 in the next cycle and the current will recover to the original value after a number of periods. and the inductance current I 0 disturbance is automatically eliminated [12], [13], [15]. In another case, if the duty ratio D>50%, then the inductance disturbance current I 0 will be increased to I 1 in the next period, and gradually increase in the following cycles exponentially, thereby the system will oscillate. It is assumed that the slope of the increase in inductance current is m 1 , the slope of reduction is m 2 , and the slope compensation signal slope is K.
By analogy, through N cycles: Because m 2 m 1 = D 1−D , so: Equation (7) shows that: when the duty ratio is D< 50%, the fluctuation of the inductance current is weakened in turn, and the system is recovered after N periods. While when considering the case of duty ratio D> 50%, the inductance current disturbance I 0 will be increased continuously, and the system will eventually oscillate [20]. Finally, slope compensation is to add a current with a slope of −K in the inner loop, as shown in Fig. 6. Even if the duty ratio D is larger than 50%, the inductance current disturbance I 0 will be weakened gradually and recovered to the stability value [21].
At this point, the system will be stable in the case of 0 < Finally, the slope compensation slope must satisfy: As long as the slope compensation slope K satisfies the equation (9), the DC-DC converter system will maintain stability. Although the traditional slope compensation technique can keep the DC-DC converter stable, overcompensation usually occurs because the compensation slope needs to be smaller than the maximum duty ratio D to keep stability. Overcompensation slows down the chip's transient response and degrades the performance to drive load, so a piecewise linear slope compensation circuit is proposed [20], [21].
In order to avoid excessive compensation, adaptive slope compensation is proposed where the slope of the slope current will change with the duty ratio D, which means different duty ratio corresponds to different compensation slope K, avoiding the generation of overcompensation effectively.

III. ARCHITECTURE DESIGN
According to the principle of switching mode power supply and slope compensation, an adaptive slope compensation circuit is designed for peak current control mode Buck DC-DC converter in Fig. 3. The circuit uses voltage sampling module and current mirror to generate a current which is proportional to the difference between input and output voltage. Once the current charges a capacitor and obtains the slope compensation voltage, the relationship between duty ratio and compensation slope is established, and the slope adaptive regulation is realized. In this section, each important basic sub-block of the circuit is analyzed and designed, including voltage sampling module, pulse generation circuit, etc.

A. VOLTAGE SAMPLING
According to the theoretical analysis of adaptive slope compensation, it is necessary to sample the input voltage and output voltage as feedback control signal to achieve closedloop stability so as to stabilize the output voltage. Therefore, the voltage sampling sub-block is an important part of the adaptive slope compensation circuit.
In general, comparators are operational amplifiers operating in open-loop or positive feedback. Fig. 7 shows the voltage sampling technique proposed in this work. The short pulse signal P controls the turn-off of transistor M4. When M4 is turned on, the voltage V o3 is set to 0 to ensure that V o3 is lower than V s . The comparator output controls M5. When V o3 is lower than V s , M5 is turned on, and charges the capacitor C. Owing to the delay of the comparator, an overshoot (V o3 > V s ) occurs. At this time, M5 is turned off and the capacitor is discharged through R 3 . Eventually the whole system tends to be stable, that is, V o3 = V s . The accuracy of this scheme is very high, and when the input voltage V i3 changes, the output voltage V o3 changes with the input voltage and can always satisfy V o3 = V s [7].

B. PULSE GENERATION CIRCUIT
Slope compensation waveform is characterized by rising slowly but falling rapidly, that is, most of the time, it has been in a rising status, so a narrow pulse signal is needed to control on and off status of switch, and then control the rising and falling of the slope compensation signal. When the power transistor is just turned on, the voltage at the both plates of the charging capacitor is set to 0. Considering the superposition of the peak detection voltage, the narrow pulse should be generated at the falling edge of the system clock [18], [19].
As shown in Fig. 8, the pulse generation circuit is realized by inverting the system clock after delay, and then doing NOR computing with the original clock to obtain the required narrow pulse. At the same time, the pulse width can be adjusted by adjusting the value of capacitor. The pulse signals with different pulse widths as shown in Fig. 9 can be obtained. VOLUME 8, 2020

C. DESIGN OF SLOPE CURRENT GENERATION CIRCUIT
In order to maximize the transient response speed and drive load capacity of the system, an adaptive slope compensation circuit slope compensation circuit is designed. As the duty cycle changes, the compensation slope also changes accordingly.
In order to meet the stability and have fast dynamic response time, it is necessary to adjust the slope compensation current dynamically. That is, when the input voltage and output voltage change, an appropriate compensation slope must be generated. Obviously, the system can remain in stable status as long as equation (9) is satisfied.Thus, the input may be employed in accordance with the change of the output voltage of the different compensation slope, i.e., the duty ratio is small at a small slope compensation may be employed to reduce or eliminate excessive impact compensation. A slope compensation circuit with self-calibration compensation slope is designed based on standard CMOS technology. The circuit can produce proper slope compensation along with the variation of input and output signals. As shown in Fig. 10, the voltage sampling sub-block 1 is used so that the current of transistor MP2 is determined by the voltage V 1 and the resistor R 3 .
The cascode current mirror composed of the transistors MP1 and MP2, MP3 and MP4 respectively, width to length ratio of MP3 and MP4 are set to be to A times that of MP1 and MP2 respectively, then the current I MP4 is equal to: Similarly, setting the width to length ratio of MP9 and MP10 to E times that of MP11 and MP12 respectively, the network formed by the voltage sampling sub-block 2, R 4 , MP9, MP10, MP11, and MP12 lead the current of I MP10 can be expressed as: MN3 and MN5, MN4 and MN6 constitute current mirror respectively, width to length ratio of MN5 and MN6 are set to be B times that of MN3 and MN4 respectively, then I MN 5 is: Width to length ratio of MP7 and MP8 are set to be D times that of MP5 and MP6 respectively, the current which charge capacitor C 2 is: The voltage across the capacitor is the slope compensation voltage V slope , and the slope of the voltage K is: ) (16) In this design, MN7, MN8 and C 2 constitute a slope compensation circuit. When MN7 or MN8 is turned on, capacitor C 2 voltage is pulled low to zero potential. When MN7 and MN8 are turned off, I slope charges capacitor C2 to generate a slope compensation signal [12], [13], [15], [20], [21]. The slope of slope compensation which satisfies equation (9) can be obtained by setting the width to length ratio of each transistor reasonably. In this design, the parameters of the equation (16) are A = B = D = E = 1. On the other hand, the relationship between short pulse P1 and P2 satisfies: P2 has a slightly wider pulse width than P1, voltage V 1 and V 2 has a period for stability, once V 1 and V 2 have been built completely, then transistor MN8 is turned on to charge the capacitor C 2 . Fig. 4 shows that when duty cycle is less than 50%, the fluctuation of inductance current will gradually decrease to zero. Therefore, when duty cycle is less than 50%, slope compensation current is in sleep mode. Therefore, Ctrl signal is generated as shown in Fig. 9 to control whether the slope current is generated or not. When V os < V is , CTRL is high, the control transistor MN7 is turned on, and the V slope is pulled low to zero potential, which ensures no slope compensation is inserted when the duty ratio is small.

A. SUB-BLOCK SIMULATION
According to the theoretical analysis of adaptive slope compensation, it is necessary to sample the input voltage and output voltage as feedback control signal to achieve closed-loop stability. Therefore, the voltage sampling is an important subblock of the adaptive slope compensation circuit, as shown in Fig. 7. The simulation results of voltage sampling based on comparator are shown in Fig. 11. In Fig. 11, when the input voltage v s changes from 1.5V to 2.5V, the output voltage v o3 will be equal to the input voltage v s after a short setup time, therefore, voltage sampling has been realized.   In this design, it is necessary to generate a narrow pulse signal to control the switch on and off. Fig. 12 shows the simulation results of the pulse generating circuit in Fig. 8. Fig. 12 shows that the narrow pulse is generated at the falling edge of the system clock, and the duty ratio is small, which can meet the specification of the system design. Through the above simulation analysis, each sub-blocks of the adaptive slope compensation circuit has achieved the expected performance, and can meet the requirements of the whole system.

B. WHOLE CIRCUIT SIMULATION
When the input voltage is 5V and the output voltage is 4V, the simulation results at tt corner with different temperatures are shown in Fig. 13. When the temperature changes from −40 • C to +100 • C, the peak value of slope compensation fluctuates only about 10mV, the fluctuation of the slope compensation is only about 1% and the accuracy is up to 97%.
Simulation results of 5 corners (ff, fnsp, snfp, ss, tt) are shown in Fig. 14, which show that the fluctuation of the slope compensation is only about 3% and the accuracy is up to 95%.
When the output voltage is fixed and the input voltage changes, the simulation results of slope compensation circuit are shown in Fig. 15. Table 1 and Table 2 conclude the accuracy of the compensation slope. Here, k and k(set) represent the compensation slope and the expected change    amount, respectively. k represents the actual change amount of the slope, and ( k) represents the difference between the actual change amount and the expected change amount. Finally, ( k)/ k(set) is used to indicate the accuracy of the slope compensation. When the input voltage is fixed and the output voltage changes, the simulation results of the slope compensation circuit is shown in Fig. 16. Table 1 concludes and the accuracy of the slope. Table 1 shows that when V out is fixed and the V in is changing between 4∼5 V, the slope compensation accuracy can reach more than 96%. Similarly,    Table 2 shows that when the V in is fixed and the V out is changing between 3∼4V, the accuracy of slope compensation can reach more than 96%. Fig. 17 shows a self-adaptable slop compensation technique proposed in [22], but the accuracy of the slope compensation signal can only reach about 88%. Table 3 and Table 4 conclude the simulation results of self-adaptable slop compensation technique proposed in [22]. Compared with Table 1 and  Table 3, compared with Table 2 and Table 4, it is obvious that the accuracy of the circuit design proposed in this paper is higher.

VI. CONCLUSION
Adaptive high-precision slope compensation is often used in DC-DC converter products. In this paper, the important modules of the circuit are analyzed and simulated in this design, the slope compensation signal can be generated adaptively and the accuracy of slope compensation can reach more than 96%, so it can meet the requirements of high precision and high stability of today's wearable devices. In recent five years, he has authored more than 500 articles such as the IEEE TRANSACTIONS ON POWER ELECTRONICS, the IEEE TRANSACTIONS ON ANTENNAS AND PROPAGATION, the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, and the IEEE ANTENNAS AND WIRELESS PROPAGATION LETTERS, among which more than 300 were registered by SCI and EI. His current research interests include integrated circuits design, RFID technology, embedded system, wireless communications, antennas and propagation, microwave and millimeter-wave technology, smart information processing, electromagnetic compatibility, and RF/microwave devices and materials. Dr. Feng has been honoured as the Excellent Expert and the Leader of Science and Technology of Sichuan Province owing to his outstanding contribution. Since July 2000, he has been with Chengdu Sino Microelectronic Science and Technology Co., Ltd. His research interests include high-resolution high speed A/D and D/A converter and power management designs.