The Research on Additional Errors of Voltage Transformer Connected in Series

The series summation method is an important method in the calibration of the voltage coefficient (VC) of the standard voltage transformers (VTs), in which the key step is connecting a fully-insulated VT and a semi-insulated VT in series, and comparing them with the third VT under test. Caused by the imperfect electrical shielding of the serially-wound VTs, additional errors are introduced in the calibration. By analyzing the cause of the additional errors in the serial connection of the VTs, two methods were designed in this paper to measure the additional errors. The proposed methods were harnessed to measure the additional errors for a serial connection of a 35 kV fully-insulated two-stage voltage transformer (TSVT) and a 35 kV semi-insulated TSVT. The results show that the two methods give a consistency of better than <inline-formula> <tex-math notation="LaTeX">$1.0\times 10^{-6}$ </tex-math></inline-formula> in ratio error and <inline-formula> <tex-math notation="LaTeX">$2.0~\mu $ </tex-math></inline-formula>rad in phase displacement, respectively. The accurate measurement of the series additional errors and the correction of them significantly improve the accuracy of the VC measurement of a <inline-formula> <tex-math notation="LaTeX">$110/\sqrt {3} $ </tex-math></inline-formula> kV TSVT based on the series summation method. Furthermore, the VC measurement result is verified by the consistency of the series summation method with the series additional errors corrected and the high-voltage standard capacitor method.


I. INTRODUCTION
Electric energy trade and the loss measurement traceability of electric power transformers, reactors, etc. require a 10 −6level accuracy and the traceability of power frequency high voltage ratio standards. For example, a loss measurement of an accuracy of 1% for the 0.001 power factor means an overall accuracy of 0.001% [1]. The voltage coefficient (VC) of the voltage transformer (VT) refers to the voltage dependence of the transformer error, that is, the variation in ratio error and phase displacement of the transformer with the voltage, which is the most important technical index to ensure the accuracy of transformer ratio. The usual way to measure the VC is by comparing VT with a compressed gas highvoltage standard capacitor (HVSC) and a gas-filled parallelplates capacitor through a current-comparator-based bridge The associate editor coordinating the review of this manuscript and approving it for publication was Wuliang Yin .
(C-tanδ bridge) [2] (called the HVSC method). However, limited by the sensitivity of the C-tanδ bridge, the VC calibration uncertainties of these two-stage voltage transformers (TSVTs) were not as good as they were expected, and were mainly beneath 30% of the rated voltage.
The summation method is another important method for calibrating VTs, which was proposed by scholars from PTB [3]- [6]. This method was proposed for VT ratio traceability, which is the absolute determination of the errors of voltage transformers with parallel-series step-up method or with a summation method via intermediate transformers or capacitive divider. The summation method was improved in 1990s for easier operation [7]. Reference [7] presented a voltage series summation circuit by connecting two single-stage voltage transformers (SSVTs) in series to determine the VC of a third VT, the method is used to calibrate the VC of the transformer (called the series summation method). Instead of the primary in series and the secondary grounding in the Zinn's circuit, the series summation method does not need to accurately adjust the voltage balance between the upper and lower of the boosting transformers, which greatly reduces the difficulty of manufacturing and measurement.
However, limited by the severe nonlinearity and repeatability of the single-stage transformers, the calibration accuracy are not sufficient. Moreover, the changes of the ratio winding potential of the full insulation transformer introduced an unquantifiable error because of its imperfect electrical shielding. Furthermore, in the VC measurement of VT with higher accuracy and higher voltage level, the influence of these two problems is more obvious and cannot be ignored [8], [9].
The key step of the series summation method is to connect the fully-insulated VT and the semi-insulated VT in series, and then compared them with the third VT under test [7]- [9]. Caused by the imperfect electrical shielding of the serieswound VTs, the additional errors are inevitably introduced when the leakage current of the VTs are changed in the calibration. Obviously, in the measurement of VT with higher accuracy and higher voltage level, the influence of the additional errors would be more significant and cannot be ignored. In order to reduce the influence of the additional errors on measurement, a straightforward method is to measure these errors and correct them in the data processing of the series summation method.
In this work, we evaluated the additional errors in the serial connection of the voltage transformers. By analyzing the cause of the additional errors in the serial connection of the VTs, two new measurement methods were proposed and designed to measure the additional errors in the paper. We implemented the proposed methods in the additional errors measurement in the serial connection of a 35 kV fully-insulated two-stage voltage transformer (TSVT) and a 35 kV semi-insulated TSVT. Furthermore, the effectiveness of the two additional errors measurement methods is verified by an indirect comparison: the VC of the 110/ √ 3 kV two-stage voltage transformers with low-voltage excitation (LVE-TSVT) was measured with the series summation method presented in [7] with a replacement of SSVTs with TSVTs, including the additional errors in the serial connection are ignored or corrected. And then the results were compared with the HVSC method [2].

II. THE ADDITIONAL ERRORS CAUSED BY THE VTS CONNECTED IN SERIES
In the principle of the series summation method [7], the key step is the fully-insulated SSVT and the semi-insulated SSVT connected in series, as shown in Fig. 1(a), where T 1 is a semi-insulated SSVT, and T 23 is a combined SSVT, which is composed of a fully-insulated VT T 2 , and a high voltage isolation transformer (HVIT) with 1:1 ratio. The function of T 3 is to convert the output voltage of T 2 from the high floating voltageu 2 into a low floating voltageu 23 .
However, it should be noticed that the potential of the low terminals X 0 and x 0 of T 23 in Fig.1 (a) were different from those in solely used. Any imperfect electrical shields between the primary and secondary windings may introduce an error shift, and the leakage current changes between grounding and floating situations for the terminals of X 0 and x 0 may also introduce an incalculable error [10].
In order to more concisely analyze the source of additional error in series, the T 23 was re-drawn in Fig.1(b), where, E p and E s are potentials to ground of terminals X 0 and x 0 , respectively. I L is current entering terminal x 0 . C is the stray capacitance of the electrical shields of T 3 to ground. z s1 and z s3 are the internal impedance of the secondary winding of the T 1 and T 3 respectively. A change in the operating potentials of the windings will cause a variation in the distribution of capacitance currents within the transformer. This, in turn, may affect the magnetization of the core causing a shift in the transformer error.
Furthermore, the effect of leakage current I L is not only on T 23 but also on T 1 . Fig.2 shows the variation of leakage current I L in the measurement loop of the semi-insulated transformer T 1 in series. TTS is a commercial available transformer test set, I L(T1) is the leakage current from T 1 , and I L(T23) is the leakage current from T 23 . For the semiinsulated transformer T 1 , leakage currents I L(T23) and I L(T1) both flow through the ratio winding of T 1 , and then a voltage drop is generated across the winding impedance z s1 . When the leakage current I L changes, it will cause the ratio output voltage to change, resulting in the ratio error change. Among them, I L(T23) is greatly affected by E s , and the I L(T23) not only forms a voltage drop on the winding impedance z s3 of the fully-insulated transformer T 23 but also as the load of T 1 and T 23 , resulting in load error. The leakage current, I L(T1) + I L(T23) , changed about 1 mA in the experiment of T 23 and T 1 in the serial connection in the Section B of Chapter IV.
The effect of E p , E s and I L on T 23 and T 1 were the main reasons for the additional errors introduced in the serial connection of the transformer. Furthermore, as the voltage level increases or the VC of the measured voltage transformer is evaluated at 10 −6 -level, the errors with E p , E s and I L must be considered in the series summation method.

Let the errors of T 1 and T 23 under a voltageU beβ
represent the additional errors respectively caused by the T 1 and T 23 connected in series (from its low voltage terminals being grounded to floating by connecting with T 1 in series), where errors may accordingly change for imperfect electrical shields, and leakage current changes etc. Then according to Fig.1 (a), it haṡ Therefore, the additional errors respectively caused by the T 1 and T 23 connected in series (theẽ T1 andẽ T23 ) cannot be ignored when the VC of the measured voltage transformer is evaluated at 10 −6 -level, especially for high voltage. However, theẽ T1 andẽ T23 could be measured and corrected.

III. THE MEASUREMENT METHOD OF THE ADDITIONAL ERRORS OFẽ T1 ANDẽ T23
To demonstrate the presence and the influence ofẽ T1 andẽ T23 , two additional error measurement methods were designed. One is to carry out measurements directly by the transformer test set (TTS), that is, the errors are directly read from the TTS (called direct measurement method). The other is based on the third standard VT. The SSVTs, in series or solely used, are compared with the third standard VT, and the errors introduced in serial connection are calculated (called comparative measurement method).
The direct measurement circuit was designed as shown in Fig.3. In Fig.3 (a), T 1 and T 23 are connected in series and a voltage ofU and 0 V were applied respectively, that is, the high and the low ends of primary windings of T 23 were connected to the high-voltageU . Then, TTS measures the U orẽ T23 , of the secondary voltage of T 23 against to theU ref of the secondary voltage of T 1 . Theẽ T1 could be determined in the similar method asẽ T23 , as shown in Fig.3 (b).
The second measurement method of the additional errors e T1 andẽ T23 is comparative measurement. Taking the measurement ofẽ T23 as an example, the comparative measurement circuits were designed as shown in Fig.4, and the comparative measurement circuit ofẽ T1 is the same with thẽ e T23 and is omitted. In Fig.4, the semi-insulated SSVT T 1 is compared with the third standard voltage transformer T 0 in series and solely used respectively. And then calculated the errors introduced in serial connection, that is, the change of the error of the measured SSVT T 1 between two comparison experiments.
Take the additional errors measurement in the serial connection of a 35 kV fully-insulated TSVT and a 35 kV semiinsulated TSVT as an example, in the experiment, the two measured methods on the additional errors ofẽ T1 andẽ T23 gave a well agreement of ratio error and phase displacement, respectively (detailed in Table 1 of Chapter IV).

IV. THE MEASUREMENT AND VERIFICATION OF THE ADDITIONAL ERRORS OFẽ T1 ANDẽ T23
In the process of the series summation method based on SSVTs, the nonlinearity and repeatability of the SSVTs also contribute some uncertainties. To achieve better uncertainty, the LVE-TSVTs were used instead of SSVTs. In order to 3 kV LVE-TSVT T 0 , a new 35 kV fully-insulated LVE-TSVT T 23 was developed for the series summation method, by connecting in series with the 35 kV semi-insulated LVE-TSVT T 1 . It should be declared that this paper, in sections IV.A, reuses some content from thesis [11] with permission.

A. THE 35 kV FULLY-INSULATED LVE-TVST
Similar to the semi-insulated LVE-TSVT in [12], the structure of the HVIT T 3 and the fully-insulated LVE-TSVT T 2 are both made of two overlapped toroidal cores, S1 and S2. A low-voltage excitation TSVT T 20 (T 30 ) and an auxiliary transformer T 2C (T 3C ) are also involved. Fig. 5(a) presents the structure of the HVIT (T 3 ) with 1:1 ratio, including the layout of the cores, the windings, as well as the shields. The difference between the HVIT and the semi-insulated LVE-TSVT in [12] was that an insulation layer I s1 (I sp ) and an electrostatic shield E.S.0 were added between the primary ratio winding N 1 (N 1p ) and the secondary ratio windings N 2 (N 2p ) of the transformer T 30 (T 3c ) in T 3 . E.S.0 was electric connected with the terminal X 0 of N 1 . Fig. 5 (b) shows the structure of the fully-insulated LVE-TSVT T 2 . The difference between T 2 and the semi-insulated LVE-TSVT in [3] is that the electrostatic shields E.S.1 and E.S.2 of T 2 are generally connected to the terminal X 0 (X) of N 1 (N 1p ) and x 0 (x) of N 2 (N 2p ) respectively, rather than directly grounded. Fig. 5 (c) presents the circuits of T 23 , the combination of T 2 and T 3 , with electrostatic shields and insulation layers omitted for convenience. The upper dashed box presents the HIVT T 3 , and the lower dashed box presents the fullyinsulated LVE-TSVT T 2 . The terminals (A 0 , A) and (X 0 , X) of T 20 and T 2C in T 2 were led out within two bushings for high voltage connection. VOLUME 8, 2020

B. THE ERROR MEASUREMENTS OFẽ T1 ANDẽ T23 IN THE SERIAL CONNECTION OF A NEW 35 kV FULLY-INSULATED LVE-TSVT AND A 35 kV SEMI-INSULATED LVE-TSVT
Measuring the additional errors ofẽ T23 andẽ T1 caused by the new 35 kV fully-insulated LVE-TSVT and the 35 kV semiinsulated LVE-TSVT connected in series, schematic diagram of measuring circuits as shown in Fig.3 and Fig.4, where SSVTs are replaced with LVE-TSVTs in the measurement. Table 1 lists theẽ T23 andẽ T1 in condition of corresponding voltages. In Fig.4, the standard VT is a 110/ √ 3 kV semiinsulated LVE-TSVT (T 0 ) [13]. A 8-dial two-stage inductive voltage divider (IVD) was cascaded with the series secondary windings of T 1 and T 23 in order to match the ratios between the 110/ √ 3 kV LVE-TSVT and the series of 35 kV LVE-TSVTs, and the IVD is omitted in Fig.4.
From Table 1, the two measurements on the errors of e T1 andẽ T23 give a consistency of better than 1.0 × 10 −6 in ratio error and 2.0 µrad in phase displacement, respectively.

C. THE APPLICATION OF THE ADDITIONAL ERRORS
The 35 kV fully-insulated LVE-TSVT (T 23 ) and the 35 kV semi-insulated LVE-TSVT (T 1 ) were connected in series to calibrate the VC of the 110/ √ 3 kV semi-insulated LVE-TSVT (T 0 ) based on the series summation method [7]. A 8-dial two-stage IVD was cascaded with the series secondary windings of T 1 and T 23 in order to match the ratios between the 110/ √ 3 kV LVE-TSVT and the series of 35 kV LVE-TSVTs. The photo of experimental site is shown in Fig. 6.
Let the errors of T 0 under a voltageU asα U = f 1 U + j · δ 1 U , in which f 1 U and δ 1 U are the ratio errors and phase displacement, respectively. Based on the three steps of the series summation method mentioned in [7], and considering the error introduced in series, the VC of the measured 110/ √ 3 kV LVE-TSVT (T 0 ) can be expressed as equation (4) and (5).
where,ε 1 (2U ) is the error of T 0 at the voltage of 2U by taking T 1 and T 23 in series as the reference.ε 2 (U ) andε 3 (U ) are the errors of T 0 at the voltage ofU by taking T 1 and T 23 as the reference respectively. Let the errors obtained from the three comparative measurement experiments as and δ ε1 (2U ), δ ε2 (U ), δ ε3 (U ) are the TTS readings in ratio errors and phase displacement, respectively. Table 2 lists the measured data in condition of corresponding voltages of the three comparative measurement experiments.
The table 4 lists the VC of the 110/ √ 3 kV LVE-TSVT obtained when the additional errors are corrected according to Table 2 or ignored. In order to further verify the additional errors measurement method, we measured the VC of the 110/ √ 3 kV LVE-TSVT in the next section by another commonly methods.

V. DISCUSSION AND VERIFICATION
A few attentions are given for the above measurements.

A. TTS AND SECONDARY LOOP GROUNDING
In the error measured circuits, U U ref was measured by a commercial available TTS. Basically, it was a specially designed Phase-Lock-Amplifier (PLA) with higher input voltage up to 120 V in its reference channel, and high floating and differential input voltage for U . In order to prevent any leakage current load or introduce any error voltage in the secondary voltage loop, all the low terminals x 0 of the semi-SSVTs should be connected to a single grounding point on the PLA-based TTS.

B. THE DISCUSS ON ADDITIONAL ERRORS MEASUREMENT WITH THE DIRECT MEASUREMENT METHOD
As analyzed in Section II, the effect of leakage current I L is not only on T 23 but also on T 1 , that is, as the load of T 1 , T 23 and resulting in load error. Based on third standard VT T 0 , the load errors of T 1 when used in serial connection with T 23 can be measured, as shown in Figure 7. The T 1 , in series or solely used, is compared with the standard VT T 0 , and the load errors introduced in serial connection are calculated.

FIGURE 7.
Comparative measurement of the load errors of T 1 with a standard VT T 0 , the difference from Figure 4 is that the output of T 1 when used in series is measured here (a 0 of T 1 ), instead of the output of T 1 serial connection with T 23 (a 0 of T 23 ) in Figure 4. The T 1 and T 23 are represented with single stage for convenience.
The load errors of the 35 kV semi-insulated TSVT when used in serial connection with the 35 kV fully-insulated TSVT were measured. And the comparison of experimental data indicated that the load errors of the 35 kV semi-insulated TSVT is less than 0.5 × 10 −6 in ratio error and 0.6 µrad in phase displacement respectively. It is due to the better load-carrying capacity of the TSVT of this semi-insulated structure. Therefore, when the additional errors are measured with the direct measurement method, the load errors of T 1 can be ignored.
There is the same load effect on T 23 from T 1 . However, the x 0 of T 23 is nearly the ground potential, as shown in Fig.3 (a). So the load errors of T 23 can be ignored too. Another commonly method for measuring the VC of the 110/ √ 3 kV LVE-TSVT is by comparing it with a gascompressed HVSC through an AC current comparator from 30% to 120% of the rated voltage [2]. The principle diagram of calibration system between standard capacitor and LVE-TSVT is shown in Fig.8, which mentioned in [2].
The C-tanδ bridge was a modified commercial available one based on AC current comparator principle. In the bridge, seven dials for capacitive ratio and dissipation were designed, and an external phase-lock-amplifier was attached as a null indicator to obtain a 1 × 10 −7 adjustment. The current dependence of the fixed ratio of this C-tanδ bridge was checked better than 3 × 10 −7 by comparing two capacitors with negligible voltage coefficient [13].   3 kV LVE-TSVT with the HVSC method (#1) and the series summation method, including the additional errors ignored (#2) and corrected (#3). By comparing method #2 with method #3, when ignoring the additional errors will introduce about 14.6 × 10 −6 in ratio error and -10.3 µrad in phase displacement respectively at the point of 120% of the rated voltage.
Based on the consistency of the measurement results of the VC of the 110/ √ 3 kV LVE-TSVT of the method #1 with method #3 in Table 5(gave an agreement of 2.4 × 10 −6 in ratio error and 3.8 µrad in phase displacement respectively), the accuracy of the additional errors measurement and correction for the series summation method was indirectly verified. And the accurate measurement of the additional errors may effectively improve the accuracy of the measurement when measuring the VC of the transformer with the series summation method.

VI. CONCLUSION
By analyzing the cause of the additional errors in the serial connection of the VTs, two new measurement methods were proposed and designed to measure the additional errors in the paper.
The proposed methods were implemented in the additional errors measurement in the serial connection of a 35 kV fullyinsulated TSVT and a 35 kV semi-insulated TSVT, where the two methods gave an agreement of better than 1.0 × 10 −6 in ratio error and 2.0 µrad in phase displacement respectively.
The accurate measurement of the series additional errors and the correction of them significantly improve the accuracy of the VC measurement based on the series summation method. The consistency of the series summation method with the series additional errors corrected and the HVSC method is better than 2.4 × 10 −6 in ratio error and 3.8 µrad in phase displacement respectively, in the measurement of the VC of the 110/ √ 3 kV LVE-TSVT. The comparison of experimental data indicated that the additional errors of the VTs connecting in series can be measured accurately, and the accurate measurement of the additional errors may effectively improve the accuracy of the measurement when measuring the VC of the transformer with the series summation method.
At the same time, the accurate measurement of the series additional errors also provided valuable technical supports and guidelines for the design of the fully-insulated transformer, such as how to properly design shielding to reduce the influence of leakage current. Future work will involve the verification of the measurement of the additional errors in the serial connection on voltage transformers with higher voltage level ratings.