A High-Speed 130-nm SiGe BiCMOS Integrated Duobinary Driver for Data Rate Capacity Enhancement in VCSEL-Based Optical Links

Circumventing the data rate bottleneck due to the bandwidth limitation of optical devices is an imperative for today’s fiber-optic communication systems. This paper investigates a two-stage laser driver consisting of a precoder and an encoder stage, capable of applying duobinary modulation to a bandwidth-limited vertical-cavity surface-emitting laser (VCSEL). Thus, the transmitter’s data rate capacity per cycle of bandwidth is significantly increased. By employing a cross-coupled architecture for the precoder stage, the output data rate of the driver is doubled with respect to the input data rate. Electro-optical measurements of the driver bonded to a VCSEL with inherent bandwidth of 20 GHz yielded duobinary eye diagrams at data rates up to 56 Gb/s, which represents a significant speed enhancement with regard to the laser’s own bandwidth. To the best of the authors’ knowledge, this is the fastest integrated duobinary VCSEL driver reported so far, as well as the first chip-to-chip integration of such an electrical driver with a VCSEL device.


I. INTRODUCTION
The exponential increase of information exchanged between the nowadays devices and systems poses new demands on the intra-and inter-data center communication.Therefore, there is a high demand on transmitting techniques for short-range optical interconnects that allow bandwidth-, power-as well as cost-efficient data transfer.An attractive approach for realizing electro-optical transmitters fulfilling the aforementioned requirements is the direct modulation of vertical-cavity surface-emitting lasers (VCSEL).
In an electro-optical communication system, the VCSEL is a popular choice for the conversion of electrical signal into optical signal, due to its low manufacturing costs and low power dissipation [1], [2].Nevertheless, since the bandwidth of available VCSELs is limited, multi-level modulation The associate editor coordinating the review of this manuscript and approving it for publication was Dušan Grujić .
formats such as pulse-amplitude modulation (PAM) or duobinary are used, in order to increase the number of bits per second that can be transmitted for the same bandwidth.Therefore, the spectral efficiency is enhanced compared to the traditional non-return-to-zero (NRZ) modulation format [3], [4].
The duobinary modulation of a bit stream is realized by combining the current bit with the previous one in a time-interleaved manner, thereby creating a controlled inter-symbol interference (ISI) [4].Similarly to PAM-4, it doubles the data rate capacity per cycle of bandwidth with regard to the conventional NRZ format [5].However, compared to the four-signal level PAM-4, which demands three decision thresholds, the duobinary modulation format features only three signal levels, thus requiring only two decision thresholds.Therefore, the requirements regarding the signal-to-noise ratio (SNR) are considerably relaxed.
In [6] it was shown that while PAM-4 requires a 7-dB higher SNR in order to achieve the same bit error rate as NRZ, the duobinary modulation requires only a 2-dB higher SNR compared to NRZ.
A further advantage of the duobinary modulation scheme is the fact that the maximum transition between two consecutive symbols is limited to only one signal level, whereas for PAM-4, abrupt transitions from the lowest to the highest signal level and vice-versa can occur.Therefore, the relative crosstalk sensitivity of duobinary is considerably reduced with respect to PAM-4 [7].
In fiber-optic communication systems, the duobinary modulation format represents a particularly attractive solution, since it shows a high tolerance to chromatic dispersion in the optical fiber -thanks to the enhanced spectral efficiency -as well as robustness to nonlinearities [8].
An electro-optical duobinary transmitter can be realized either by indirectly modulating a continuously-emitting laser source through an electrically-driven optical modulator, or by directly modulating a laser by means of a laser driver.For each of the two implementation methods, several optical duobinary transmitter designs were reported in the scientific literature.In [9] and [10], two high-speed duobinary transmitters were presented, each of them reaching data rates up to 100 Gb/s.While the transmitter in [9] uses a Mach-Zehnder modulator (MZM) for the conversion of electrical data into optical data, the transmitter in [10] employs an electro-absorption modulator (EAM) copackaged with a distributed feedback laser (DFB).However, the two transmitters are not integrated designs, but laboratory assemblies consisting of testboards for the driver circuits, external RF amplifiers and optical modulators, everything being connected by means of coaxial cables and microwave probes.A fully integrated solution was proposed in [11], where a duobinary driver circuit is monolithically integrated with a ring modulator on the same silicon chip.While being a compact and low-power design, the data rate of the transmitter is nevertheless limited to 5 Gb/s.In [12], a traveling-wave duobinary modulator driver was presented, able to reach data rates up to 64 Gb/s.Nevertheless, the work does not show electro-optical measurements together with an optical device.Moreover, the driver design occupies a large chip area due to the long transmission lines of the travelingwave architecture.
The realization of duobinary transmitters using optical modulators shows a series of disadvantages.The works from the literature mentioned so far use either MZMs, EAMs or ring modulators for the electro-optical data conversion.Due to their low optical bandwidth, both the EAMs and the ring modulators are sensitive to process and temperature variations and exhibit chirping [13], [14].Silicon or lithium niobate MZMs compensate these drawbacks, however at the cost of a large chip footprint or high requirements regarding the output voltage swing of the driver [15].
An alternative way of realizing electro-optical duobinary transmitters is by directly modulating a laser device.In [16], an integrated and compact electrical transmitter consisting of a duobinary encoder and a VCSEL driver is proposed.To the best of our knowledge, this is the only duobinary VCSEL driver reported so far in the literature.Nevertheless, the circuit was neither assembled nor measured together with a VCSEL device.Moreover, the maximum data rate of the design is limited to 5 Gb/s.
In this paper, we present the first duobinary laser driver design featuring chip-to-chip integration with a VCSEL, operating at data rates above 50 Gb/s.The duobinary modulation is performed by means of a two-stage architecture of the electrical driver, namely a precoder and an encoder stage.The driver was realized in a 130-nm SiGe BiCMOS technology with copper back end of line, featuring a performance of f T /f max ≈ 350/450 GHz.At the driver's output, duobinary eye diagrams up to 65 Gb/s were measured.The chip-to-chip integration with the VCSEL was performed by means of wire bonding.Although the VCSEL's inherent 3-dB bandwidth is limited to 20 GHz, the data rate at the laser's output was enhanced up to 56 Gb/s, thus proving the concept of applying duobinary modulation to a VCSEL device and thereby extending the speed of the overall electro-optical transmitter.
The paper is structured as follows.Section II describes the circuit design of the laser driver and its assembly and connection with the VCSEL.Section III presents the experimental measurement results of both the standalone driver and the driver-laser assembly and shows a comparison with state-ofthe-art works in the literature.Finally, Section IV summarizes this paper and draws the conclusions.

II. CIRCUIT DESIGN
A driver for duobinary modulation usually consists of two units, namely a precoder and an encoder, as depicted in Fig. 1.The precoder ensures that the incoming data at the receiver side depends only on the current bit (and not simultaneously on the previous bit as well), thus preventing the propagation of bit errors within the duobinary system and reducing the complexity of the receiver design [17], [18].As shown in Fig. 1, a basic precoder consists of an XOR cell and a D flipflop, where the output of the XOR is fed back to the input with a delay of one bit (realized by the D flip-flop).The role of the encoder is to generate the three-level duobinary modulated signal that drives the optical device.The encoding process is done by adding the bit stream with its one-bit delayed copy.In the following subsections, the design of the two stages of the proposed laser driver -the precoder and the encoderis explained, as well as the realization of the electro-optical transmitter consisting of the laser driver and the VCSEL.

A. PRECODER
The precoder of the laser driver was designed as a two-branch cross-coupled architecture, in order to double the data rate at the precoder output with respect to the input [19].The diagram of the circuit is depicted in Fig. 2.This topology uses two different input bit streams with half-bit delay between each other.The bit streams are fed into two parallel branches consisting of XOR cells and D-latches, where the output of each D-latch is fed back to the input of the corresponding XOR cell in the parallel branch.Next, the two branches are combined within a multiplexer (MUX) and subsequently amplified.
For achieving a high-speed performance, the XOR, D-latch and MUX cells were realized as differential current mode logic structures triggered by a clock signal [20].To this end, the single-ended input bit streams first need to be converted to differential signals by means of single-ended to differential amplifiers (SDC).The external single-ended clock signal is converted to a differential signal as well and subsequently amplified by means of an on-chip clock amplifier.In order to provide simultaneously a smooth clock signal to the different cells of the circuit (XOR, D-latch and MUX), the clock amplifier's output signal is transmitted via 50-transmission lines, which are terminated with 50resistors in order to provide impedance matching at high frequencies (Fig. 2).Furthermore, during layout, special care was given to the design of the interconnections between the cells and especially the long feedback connections between the D-latch output and XOR input, in order to ensure that bit errors do not occur due to excessive time delay and misalignment.To this end, the connections were designed and simulated by means of an electro-magnetic simulation software and their propagation delays were considered during the design process.

B. ENCODER
The encoder generates the three-level duobinary signal by adding the current bit with the previous bit of the data stream.Therefore, the encoder consists of an adder circuit and a D flip-flop cell for the one-bit delay.The encoder's block diagram is depicted in Fig. 3.The D flip-flop is realized by means of two D-latches connected in series (since each D-latch generates a half-bit delay).Just as for the precoder, the D-latches of the encoder are triggered by a clock.Nevertheless, a separate clock signal from that of the precoder is used, since the time delay of the encoder's clock needs to be adjusted independently of the precoder's clock delay.Moreover, since the precoder has a cross-coupled topology and thus doubles the data rate, the encoder requires a clock frequency twice as high as the clock frequency of the precoder.
Fig. 4 depicts the diagram on transistor level of the encoder's output stage.This stage consists of the adder circuit and its current source.The adder is realized by means of two differential pairs equal in size and with equal tail currents.Depending on the polarity of the input voltages V in,1 and V in,2 , the adder can provide three different output current levels, as required by the duobinary modulation format.The VCSEL is a single-ended device and its anode terminal can  be connected to either the collectors of transistors T 1 /T 2 or T 1 '/T 2 '.Assuming that the laser is connected to the collectors of T 1 '/T 2 ', the collector resistor R 1 ', which is in parallel with the laser, is chosen to be higher than R 1 in order to avoid excessive DC-asymmetry at the adder's output.The laser's cathode terminal, V bias,VCSEL , is used for providing the laser's bias voltage (and therefore setting the bias current).Finally, for the current source providing the tail currents to the adder's differential pairs, a cascaded current mirror topology was preferred, with enhanced output impedance and reduced sensitivity to temperature variations.

C. CHIP-TO-CHIP INTEGRATION OF THE DUOBINARY DRIVER WITH THE VCSEL
In this section, the electro-optical chip-to-chip integration of the duobinary laser driver with the VCSEL device is investigated.For the transmitter design presented in this paper, a laser similar to the one described and modeled in [21] was employed.
In order to ensure a clean duobinary eye diagram at the VCSEL's output, i.e. with large vertical eye openings, low rise and fall times, low jitter and amplitude noise, as well as equal eye height for the upper and lower eyes, the laser's operation at different bias currents needs to be studied.To begin with, the relationship between bias current, voltage FIGURE 5. Relationship between bias current, voltage drop (V bias ) and optical power (P out ) of the VCSEL (measured values).The data has been extracted from [21], Fig. 2.
drop and optical power of the laser (also known as the V-I-L characteristic) is depicted in Fig. 5 [21].When choosing the bias current (and while considering the current swing provided by the driver to the laser), several aspects need to be taken into account.First, as shown in [21], not only the laser's bandwidth is considerably reduced for low bias currents, but also ringing occurs at the rising edge, and the laser exhibits a longer fall time compared to the rise time [22].Moreover, if the current drops under the laser's threshold value, the lengthy turn-on times of the laser will significantly impair the transmitter's data rate [2].On the other hand, at high bias currents, the VCSEL exhibits an optical power roll-off, which not only decreases the optical modulation amplitude [23], but also impacts the eye diagram's linearity needed for multi-level modulation formats like duobinary or PAM-4.
In the following, the choice of the bias current for the VCSEL of the proposed duobinary transmitter is investigated.This choice is conditioned by two considerations.First, the laser should not reach its optical power roll-off, since this would lead to a compression of the upper duobinary eye, therefore causing non-linearity.Second, an operation of the laser at low drive currents should be avoided, since at low currents the driver exhibits both reduced bandwidth and ringing, which decrease the vertical opening of the eye diagram.The aforementioned considerations are illustrated in Fig. 6, where the simulated duobinary optical eye diagrams of the VCSEL driven by the encoder's output stage at 56 Gb/s for (a) an excessive and (b) an insufficient bias current are depicted.As it can be seen in Fig. 6 (a), the upper eye is significantly compressed with regard to the lower eye, since the laser operates in the roll-off region.In contrast, in Fig. 6 (b), the lower eye is almost closed, since the VCSEL operating at low drive currents exhibits a reduced bandwidth.
Considering the above insights, a bias current of around 6 mA was chosen for the VCSEL.The bias current as well as the approximate driving range are marked in Fig. 5.It is to be noted that the driving range, given by the output current swing  of the laser driver, is fully adjustable, by means of the tunable reference current I ref of the encoder's output stage (Fig. 4).The simulated duobinary optical eye diagram at 56 Gb/s for optimum bias current is depicted in Fig. 7.As it can be seen, the diagram shows both vertically opened and nearly equal upper and lower eyes.

III. EXPERIMENTAL MEASUREMENTS
In order to prove the design concepts described in the previous section, the duobinary transmitter consisting of the laser driver and the VCSEL was mounted on a printed circuit board (PCB) and experimentally measured in the laboratory.The picture of the complete transmitter assembly is displayed in Fig. 8.While the supply voltage V CC of the driver, the reference current I ref of the encoder's output stage and the ground (gnd) were bonded to the PCB, the driver's RF input (i.e. the two input bit streams, as described in Section II) and the clock signals for the precoder and encoder, respectively, were provided by means of RF probes.The laser input was connected to the driver via wire bonding.The pad providing the bias of the laser was first bonded to wire-bondable decoupling capacitors and subsequently to the PCB, in order to ensure a smooth and ripple-free bias voltage for the VCSEL.Finally, the laser output was coupled by means of a lightwave probe equipped with a fiber-optic pigtail.The wavelength of the VCSEL is around 850 nm [21].
The measurement setup used for the experimental characterization of the transmitter assembly is depicted in Fig. 9. First, the duobinary laser driver alone was measured (electrical measurement), in order to prove its functionality.Subsequently, the VCSEL was bonded to the laser driver and electro-optical measurements were performed.The two measurement scenarios are conceptually illustrated in Fig. 9 by means of a switch symbol.
As input data, two NRZ 2 31 -1 pseudo-random binary sequences (PRBS) generated by a bit pattern generator (SHF 12105A) were used, shifted between each other by half the pattern length.For synchronization, both the reference clock for the bit pattern generator as well as the input clock for the precoder were provided by the same RF signal generator (Keysight E8257D).As previously mentioned in Section II, the alignment between the input data and the clock signals is of particular importance.Therefore, a phase shifter was inserted in the path providing the clock to the precoder, in order to adjust the delay of this signal independently of the bit streams coming from the bit pattern generator.The clock for the encoder was provided from a second RF  signal generator, and its delay was adjusted directly from the generator's interface.

A. ELECTRICAL MEASUREMENTS
For the electrical measurement of the duobinary laser driver, a real-time oscilloscope (Keysight UXR-1004A) was used.While the single-ended output of the circuit was connected to Channel 1 of the oscilloscope, a copy of the driver's input bit streams coming from the bit pattern generator was recorded by Channels 2 and 3, respectively (as depicted in Fig. 9), in order to verify the duobinary precoding and encoding process.
First, the output eye diagram of the laser driver was measured.As it can be seen in Fig. 10 (a)-(d), the driver is able to provide duobinary eye diagrams up to data rates of 65 Gb/s.This was achieved with input data rates of only half the output data rates (i.e. up to 32.5 Gb/s at input), 28348 VOLUME 12, 2024 Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.owing to the cross-coupled architecture of the precoder.Thus, the advantage of the chosen precoder topology in terms of doubling the input bit rate, as described in Section II-A, was proved.Furthermore, the driver maintains a nearly equal vertical opening of the upper and lower duobinary eyes, regardless of the bit rate.The output voltage swing of 300 mV pp , as recorded in the measurements depicted in Fig. 10, can be further increased by increasing the reference current I ref of the encoder's output stage (Fig. 4).
Next, the measured output bit stream of the driver was investigated in order to validate the duobinary precoding and encoding process.To this end, the output stream was recorded as a waveform and used in a simulation testbench representing a duobinary receiver [24], as depicted in Fig. 11.The receiver consists of two ideal comparators, an XOR cell and a demultiplexer (DEMUX).The comparators work as limiting amplifiers and have as reference voltages the thresholds of the upper and lower duobinary eyes, respectively.Next, the outputs of the comparators are fed into the XOR cell, and the resulting signal is demultiplexed in the 1:2-DEMUX.Finally, the two output signals of the DEMUX -representing the recovered inputs -are compared with the initial input bit streams of the driver, whose copies were recorded beforehand by Channels 2 and 3 of the real-time oscilloscope, respectively (Fig. 9).
Fig. 12 depicts a fragment of the compared waveforms, including the measured duobinary output waveform at 65 Gb/s, the initial input bit streams at 32.5 Gb/s used in the measurements, as well as the recovered input streams obtained through simulation.As it can be seen, the recovered input bit streams yielded by the duobinary receiver in Fig. 11 match the initial input streams applied to the driver during the measurements, therefore validating the duobinary precoding and encoding process.

B. ELECTRO-OPTICAL MEASUREMENTS
After the electrical measurements and the confirmation of the functionality of the duobinary laser driver, the VCSEL chip was bonded to the driver.For the electro-optical measurements, the output of the laser was connected to a sampling oscilloscope (Tektronix DSA8300) equipped with a >30-GHz optical module capable of recording optical eye diagrams.
Fig. 13 (a)-(d) depict the measured optical eye diagrams of the transmitter consisting of the duobinary laser driver and the VCSEL.Despite the limited inherent bandwidth of the laser of 20 GHz [21], duobinary eye diagrams up to 56 Gb/s could be achieved.Therefore, the significant speed enhancement of bandwidth-limited devices by means of duobinary modulation, as described in [5], was proved.Moreover, as it can be seen in Fig. 13 (a)-(d), the duobinary modulation provided by the driver yields nearly equal vertical openings of the upper and lower duobinary eyes for the entire range of bit rates.
The electro-optical assembly has an overall DC power of 1.09 W. The precoder, due to its increased amount of logic cells required by the cross-coupled topology, constitutes 64 % of the DC power, whereas the encoder and the VCSEL make up 34.5 % and 1.5 % of the DC power, respectively.

C. COMPARISON WITH THE STATE OF THE ART
Table 1 summarizes the performance of the duobinary transmitter presented in this paper and draws a comparison with the state of the art.To the best of the authors' knowledge, the proposed design represents the fastest VCSEL driver for duobinary modulation reported in the literature, as well as the first chip-to-chip integration of such a laser driver with a VCSEL.The electro-optical transmitter achieved data rates beyond 50 Gb/s, representing a significant speed enhancement when taking into consideration the laser's inherent bandwidth of 20 GHz.The transmitters reported in [9] and [10] achieve high data rates of 100 Gb/s, nevertheless they are not integrated designs, but assemblies built out of separate blocks, i.e. testboards for the modulator drivers, external RF amplifiers providing extra signal amplification, and optical modulators connected by means of either probes or coaxial cables.A fully integrated -on the same silicon chip -electrooptical transmitter is shown in [11], consisting of a duobinary driver and a ring modulator.Nevertheless, the data rate of the transmitter is limited to only 5 Gb/s.A comparable electric data rate with the proposed circuit for a similar DC power is achieved in [12], were a modulator driver realized by means of the distributed amplifier topology is presented.However, the design was not assembled and measured together with an optical modulator.The circuits in [4] and [7] were designed for electrical links (thus featuring no assembly with optical devices) and employ a series of analog and digital cells, similarly to the driver presented in this paper.Although they show a low DC power, their speed is limited to 36 Gb/s and 21 Gb/s, respectively.In [16], the only known up to date duobinary driver for VCSELs is reported.Nevertheless, it achieves a maximum data rate of only 5 Gb/s and the work does not feature electro-optical measurements together with a laser device.

IV. CONCLUSION
In this paper, we showed the first chip-to-chip integration of a duobinary laser driver and a VCSEL capable of achieving data rates beyond 50 Gb/s.The standalone electrical driver yielded output eye diagrams up to 65 Gb/s for input signals with data rates of only half the output data rate -thanks to the cross-coupled architecture of the precoder stage.After the assembly of the laser driver with a bandwidth-limited VCSEL, optical eye diagrams up to 56 Gb/s were achieved at the laser's output.This enhancement in terms of speed -enabled by the duobinary modulation provided by the laser driver -represents a considerable increase of the data rate with regard to the laser's own bandwidth of 20 GHz, thus proving the potential of the duobinary modulation of VCSELs.

FIGURE 6 .
FIGURE 6. Simulated duobinary optical eye diagram of the VCSEL driven by the encoder's output stage at 56 Gb/s for (a) excessive and (b) insufficient bias current.The y-axis is in arbitrary unit (a.u.).

FIGURE 7 .
FIGURE 7. Simulated duobinary optical eye diagram of the VCSEL driven by the encoder's output stage at 56 Gb/s for optimum bias current.The y-axis is in arbitrary unit (a.u.).

FIGURE 11 .
FIGURE 11.Simulation testbench for validating the duobinary precoding and encoding process.

FIGURE 12 .
FIGURE 12.Comparison between the initial input bit streams used during measurements and the recovered input streams obtained through simulation at 32.5 Gb/s NRZ input data rate (corresponding to 65 Gb/s duobinary output data rate).

FIGURE 13 .
FIGURE 13.Measured optical eye diagrams of the transmitter consisting of the duobinary laser driver and VCSEL at (a) 20 Gb/s, (b) 40 Gb/s, (c) 50 Gb/s and (d) 56 Gb/s using 2 31 -1 PRBS input signals for the electrical driver.

TABLE 1 .
Performance Summary and Comparison of State-of-the-Art Duobinary Transmitters from the Scientific Literature.