Adaptive Digital Compensation of Analog Impairments in Frequency Interleaved ADC for Next-Generation High-Speed Communication Receivers

This paper presents an adaptive background compensation technique designed to address analog impairments in frequency-interleaved analog-to-digital converters. Frequency interleaving has been proposed as a solution to the bandwidth bottleneck of data converters in high-speed digital communication receivers, including those deployed in coherent optical transmission systems. The proposed technique combines an adaptive multiple-input multiple-output equalizer with the well-established backpropagation algorithm commonly utilized in machine learning. Unlike previous proposals, the new algorithm ( ${i}$ ) compensates the linear impairments in the analog front-end of the receiver (e.g., mismatches of track-and-hold and trans-impedance amplifier frequency responses, time skews, quadrature imbalance in electrical carriers, etc.), and (ii) maximizes the signal-to-noise ratio at the decision point of the receiver without requiring estimation of the channel parameters. The proposed background compensation scheme is thoroughly investigated in a dual-polarization coherent optical receiver with 16-QAM operating at ~200 GBd (i.e., ~1.6 Tbps). Numerical results show the excellent performance and high robustness of the new background compensation algorithm. These features, combined with its low implementation complexity, will pave the way for the deployment of commercial transceivers with bandwidths of 100 GHz and beyond.


I. INTRODUCTION
The demand for greater speeds in next-generation optical networks is driving research towards higher bandwidth (>100GHz) and sampling rate (>200Gs/s) analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) [1], [2], [3], [4], [5].Although Time Interleaved (TI) data converters are today the solution of choice in high-speed communications [6], [7], they will be insufficient to meet the high bandwidth (BW) requirements of optical communications and other high-speed applications.Frequency Interleaved The associate editor coordinating the review of this manuscript and approving it for publication was Poki Chen .
ADCs (FI-ADCs) have emerged as a promising solution to overcome the bandwidth limitations in high-speed digital communication receivers [8].The fundamental concept behind an FI-ADC is to split the signal bandwidth into multiple narrower sub-bands [9].This partitioning approach alleviates both (i) the bandwidth requirements for each Trackand-Hold (T&H) circuit and (ii) the sampling rates of the ADCs.Fig. 1 shows an example of an FI-ADC architecture with two channels.It is worth noting that the bandwidth at the input of each sub-ADC is one-quarter of the input signal bandwidth.In contrast to a TI-ADC where each sub-ADC operates with different sampling phases, an FI-ADC samples each frequency sub-band simultaneously but at a lower overall rate.This simultaneous sampling of sub-bands at a reduced rate is a highly desirable feature for high-speed ADCs as it helps mitigate their vulnerability to jitter and timing uncertainties [10].Nevertheless, widespread adoption of FI-ADCs in commercial high-speed digital receivers will require effective background compensation for numerous impairments in the FI-ADCs and other components of the Analog Front-End (AFE).These impairments encompass a range of effects, including phase and gain errors in the quadrature mixers, mismatches in T&H circuits, bandwidth limitations, and more.Overcoming these challenges is crucial to ensure optimal performance and maximize the benefits of FI-ADC technology in high-speed digital receivers.The compensation of impairments has been well studied for TI-ADC [7], as well as in architectures that include an in-phase/quadrature direct downconversion prior to the TI-ADC [13], 1 which is used in RF applications.However, only a few articles in the past literature investigate the compensation of impairments in FI-ADCs (e.g., [14], [15], [18]).In [14], the magnitude and phase response of the FI-ADC are compensated in a foreground mode by using digital filters, accompanied by factory calibrations to finely adjust the propagation time differences between electrical paths.A calibration technique for generic mixing, filtering, and processing digitizers with any number of channels has been proposed in [15].The approach utilizes cosine waveforms to compute the responses of the compensation filters, which are subsequently implemented using Finite Impulse Response (FIR) filters.In [16], a single tone signal is used to estimate both the amplitude and phase imbalance of the quadrature mixers, which are then used to implement the compensation filters.Assuming that the parameters of the channel with mismatches are known, a flexible correction framework of FI-ADC impairments using iterative structures has been introduced in [18] and [19].Later, the authors included a system identification algorithm in order to implement a background compensation of the FI-ADC impairments [20].
In the case of TI-ADCs used in digital communication receivers, several authors [21], [22], [23] have shown that compensation of the converter impairments can be achieved by the main receiver equalizer when the latter is located immediately after the TI-ADC.The same technique could, in principle, be applied to FI-ADCs employed in digital receivers.The slicer error carries information about the impairments of the FI-ADC, enabling the equalizer adaptation algorithm to adjust its coefficients to a solution that jointly compensates for the channel and FI-ADC impairments.Unfortunately, in most practical receiver architectures there are signal processing blocks located between the FI-ADC and the equalizer.In the primary application considered in this paper (receivers for coherent optical communications), a typical block located between the ADC and the main equalizer is the Bulk Chromatic Dispersion (BCD) compensation equalizer.Other blocks such as Timing Recovery (TR), Coarse Carrier Recovery (CCR), etc. may also be present [24].These blocks cause signal components associated with different bands of the FI-ADC to combine in a way that makes the use of the main equalizer unsuitable for compensation.This paper introduces a new adaptive background compensation technique that overcomes the aforementioned limitation and is suitable to mitigate the FI-ADC impairments in practical highspeed digital communication receivers.This scheme finds application in various high-speed communication systems, such as optical systems employing Intensity Modulation and Direct Detection (IM-DD) [25], as well as coherent systems [26], [27].The basic idea consists in the use of a dedicated adaptive equalizer, called Compensation Equalizer (CE) to compensate the impairments of the FI-ADC.While the CE effectively addresses the compensation issue, there remains a challenge with its adaptation.This occurs because slicer error components associated with different bands are also combined by signal pre-processing blocks.Consequently, the slicer error cannot be directly utilized for CE adaptation.To solve the adaptation problem, our work introduces a novel approach.We propose adapting the CE by employing a post-processed variant of the receiver slicer error.This post-processing method is based on the backpropagation algorithm [28], [29], a well-established technique extensively utilized in machine learning applications.The key features of the proposed technique are: • It is fully digital and operates in background mode, avoiding the need for auxiliary reference converters or elaborate channel estimation algorithms.Furthermore, the algorithm is capable of adapting and converging from the beginning of the receiver operation without the need to use training symbols.
• It optimizes the performance of the receiver by minimizing the Mean Squared Error (MSE) at the decision point.This is accomplished by employing the error backpropagation algorithm in combination with the Stochastic Gradient Descent (SGD) algorithm to adjust the coefficients of the CE.
• It is capable of compensating not only the impairments in the FI-ADC but also other mismatches in the AFE of the communication receiver.
To make FI-ADCs suitable for high-volume manufacturing of high-speed digital communication transceivers, the compensation algorithms should satisfy the following critical requirements [7]: • Requirement 1 -Background and continuously adaptive operation: The calibration of the FI-ADC should not interfere with the operation of the receiver, even when there are variations in the FI-ADC parameters caused by factors such as temperature, voltage, or environmental changes.In typical communication systems, it is not feasible to interrupt the link for ADC recalibration.While foreground calibration during system startup may be acceptable, it is usually not possible to ensure that recalibration will not be necessary during normal operation, particularly in high-speed systems that employ Quadrature Amplitude Modulation (QAM) such as 16-QAM, 32-QAM, or 64-QAM.This is because such systems are highly sensitive to variations in AFE parameters.The conclusion is that foreground only calibration is insufficient in digital communication receivers.
• Requirement 2 -Global optimization of the receiver SNR: Digital Signal Processing (DSP) algorithms employed in communication receivers, such as equalization and carrier recovery, typically aim to maximize the Signal-to-Noise Ratio (SNR) or minimize the MSE at the decision point or slicer.Under very general conditions, this criterion results in the minimization of the Bit Error Rate (BER).In order to achieve optimal receiver performance, an FI-ADC calibration algorithm should also optimize this criterion.Calibration algorithms based on heuristic criteria cannot guarantee receiver optimality.By aligning the calibration process with the optimization of SNR (or MSE) at the slicer, the FI-ADC calibration algorithm can effectively enhance the overall receiver performance, ensuring superior BER performance in the communication system.
• Requirement 3 -Reduction of complexity: Minimizing the complexity and power consumption is of utmost importance for implementing compensation of FI-ADC in commercial high-speed transceivers.Therefore, background compensation schemes based on an auxiliary reference ADC or elaborate DSP algorithms (such as channel estimation, feedback filtering, 2 etc.) should be avoided.
• Requirement 4 -Joint compensation of the impairments of all FI-ADCs and the AFE: In addition to the gain and phase errors of the analog quadrature mixers, the calibration technique of FI-ADCs should also address frequency-dependent effects such as bandwidth and frequency response mismatches.Furthermore, 2 Parallel processing is used in multi-gigabit optical coherent receivers.The design of parallel architectures for implementing feedback filters, as used in [20], poses significant challenges in reducing complexity. in coherent receivers, it is essential to compensate for errors that affect both the In-phase (I ) and Quadrature (Q) components of the received signal, such as time skew (i.e., I/Q time skew).While it is theoretically possible to compensate for these impairments using algorithms independent of the FI-ADC calibration, joint compensation is highly desirable.This is because it offers lower complexity (as required in the previous point) and enables the global optimization of the receiver SNR.By incorporating these compensations into the calibration process, the receiver performance can be significantly enhanced.Table 1 compares the technique proposed in this paper with others presented in the technical literature in the light of the above requirements.To the best of the authors' knowledge, the FI-ADC impairment compensation technique proposed in this work is the first to meet all of these requirements.The rest of this paper is organized as follows.Section II describes the application of the FI-ADC architecture in a dual-polarization coherent optical receiver.Section III presents the system model of the AFE with impairments.In Section IV, the proposed adaptive background compensation technique based on the backpropagation algorithm is analyzed.Numerical results are included and discussed in Section V. Practical aspects of the implementation of the proposed scheme are discussed in Section VI, while conclusions are drawn in Section VII.A list of abbreviations and acronyms used throughout the paper is given in Table 2.

II. FREQUENCY-INTERLEAVED ADC IN ULTRA HIGH-SPEED DIGITAL COMMUNICATION RECEIVERS
The communication channels of interest in this work encompass various domains, including wireline, wireless, and optical.The primary focus of the backpropagation-based compensation technique for FI-ADC presented in the following sections is on a dual-polarization (DP) coherent optical receiver [26], [27].Nonetheless, with minor modifications, this technique can be applied to any high-speed digital receiver.

A. DP COHERENT OPTICAL TRANSCEIVER
In a DP coherent optical transceiver, two orthogonal polarization states of light (usually referred to as horizontal (H ) and vertical (V ) polarizations) are simultaneously used to transmit independent data streams over single-mode fibers (SMFs) [27].Chromatic Dispersion (CD) and Polarization Mode Dispersion (PMD) are the main linear effects in transmissions over SMF.The optical channel with CD and PMD can be modeled as a 2 × 2 Multiple-Input Multiple-Output (MIMO) complex-valued channel [26].Thus, the input and output of the MIMO channel correspond to the transmitted and received signals in each polarization [26], [27].Fig. 2 illustrates the typical transmit and receive optical front ends and their relationship with the transceiver.On the transmit side, the signal is generated using a continuous wave (CW) laser and split into two components representing the horizontal and vertical polarization vectors.These components are then independently modulated in phase and quadrature using Mach-Zehnder modulators and combined again to generate the transmitted signal.On the receive side, the two polarization components are separated using a Polarization Beam Splitter (PBS).They are mixed with the signal generated by the local oscillator (LO) using 90-degree hybrids and demodulated to baseband.The demodulation process produces four electrical signals at the outputs of the balanced photodetectors (denoted as s (1) (t), s (2) (t), s (3) (t), and s (4) (t)), representing the in-phase and quadrature components of the two polarizations (i.e., s (1) (t)+ js (2) (t) and s (3) (t) + js (4) (t) for polarizations H and V , respectively).These components retain all the amplitude, phase, and polarization information present in the input optical signal.Unlike linear equalization in most other channels, the linear equalization of CD and PMD in coherent optical channels does not lead to noise enhancement.This property, combined with coherent demodulation, allows for effective compensation of CD and PMD, ensuring highquality signal transmission [26].The four electrical signals (or lanes) provided by the optical demodulator (i.e., s (l) (t) with l = 1, . . ., 4) are amplified by external Trans-Impedance Amplifiers (TIAs) and converted to digital by four FI-ADCs.

B. ARCHITECTURE OF THE FI-ADC
Let f c and T s be the bandwidth of the input signals s (l) (t) and the sampling period of the FI-ADC, respectively.We also define f B (T ) as the symbol rate (period) of the coherent optical transceiver.Although our technique is applicable in general, this work primarily focuses on compensating impairments in the AFE with FI-ADC of coherent optical systems that operate at speeds in the range of f B ∼ 200 to 240 Giga-Bauds (GBd).These symbol rates are being considered for next-generation of dual-polarization coherent transceivers with 16-QAM to reach data rates of 1.6 Tbps per wavelength [1].Such systems require ADCs with a bandwidth of f c ≈ f B /2 at least (i.e., ∼ 100 -120 GHz).The current capabilities of CMOS technology allow the fabrication of TI-ADCs with bandwidths ranging from 40 to 50 GHz [6], while bandwidths between 60-70 GHz are expected in the next few years.Therefore, in this work we use an FI-ADC architecture as depicted in Fig. 3.This scheme employs mixers with carrier frequency f 0 = f c /2 (i.e., ω 0 = 2πf 0 ≈ πf B /2) and filtering to split the wideband signal with a bandwidth of f c ≈ f B /2 into two Quadrature Sub-Channels (QSCs) with bandwidth f c /2 (e.g., ∼ 50 GHz).Thus, each QSC can be sampled by two sub-ADCs with half the bandwidth and sampling rate required for the input wideband signal.We assume that the sampling period used in the sub-ADCs (e.g., 2T s ) is  sufficient to avoid aliasing. 3The samples of the QSCs are then upsampled by a factor of two to get x (l) I /Q (kT s ).These digital signals are modulated by a digital quadrature mixer and recombined to obtain a digital representation of the input signal, ŝ(l) [k] (see Fig. 4).

C. ARCHITECTURE OF THE DSP RECEIVER
The discrete time signals provided by the four FI-ADCs are then processed by the receiver DSP blocks (see Fig. 5).The main DSP blocks in a DP coherent optical receiver are [24], [26], and [30]: a) Compensation Equalizer (CE): This block compensates the impairments of the RX front-end including mismatches of TIAs, T&H circuits, gain and phase imbalance of the quadrature mixers, and others.Indeed, 3 Typically, oversampling is used in DSP based receivers for coherent optical communications (i.e., T /T s >1).The proper sampling frequency of the sub-ADCs will depend on the response of the lowpass filtering achieved after the electrical mixers.

III. SYSTEM MODEL OF THE AFE WITH FI-ADC
In the following we present a model for the AFE and the FI-ADC system with impairments. 4Fig. 6-a shows a simplified model of the analog path with impairments for a single component, including the mismatches of the FI-ADC.
The different components of this model are described below.

A. IMPAIRMENTS OF THE AFE AND FI-ADC
To account for the electrical interconnections between the balanced photodetectors of the optical demodulator and the TIAs, the TIA response itself, and any additional components within the signal path leading up to the input of the FI-ADC system, we employ filters with impulse responses denoted Q (t) model the bandwidth limitations at the inputs of the lth quadrature mixer.The electrical carriers utilized in the quadrature mixers may possess unequal amplitudes and may not be precisely 90 degrees out of phase.Thus, the carriers of the l-th mixer are modeled as 1 2 , where ϵ (l) and φ (l) are the gain and phase errors of the l-th quadrature mixer, respectively.The impulse responses d  Q (t) with l ∈ {1, 2, 3, 4} model bandwidth limitations between the mixer outputs up to the input of the corresponding sub-ADC.They include bandwidth limitations of the mixer output and the T&H circuits.Notice that these bandwidth limitations play an important role in the operation of the FI-ADC, as they eliminate (i) the high-frequency images produced by the modulation of the input signal, (ii) the spurious components that arise by mixing the input signal with harmonics of the LO, and (iii) the LO signal that leaks to the Intermediate Frequency (IF) port caused by a poor isolation of the LO-IF port of the mixers [14].Bandwidth and frequency mismatches between c (l) Q (t), as well as the gain and phase errors of the quadrature mixer (ϵ (l) and φ (l) ), generate inaccuracies in the digitizer process of the analog input signal s (l) (t).Furthermore, mismatches between b (1) (t) and b (2) (t) (b (3) (t) and b (4) (t)) may also introduce a time skew (or delay) between the I and Q components of the polarization H (V ).As we shall show later, all these impairments seriously degrade the performance of the receiver.

B. COMPENSATION EQUALIZER IN FI-ADC
In the appendix we show that the model of the analog impairments of Fig. 6-a can be reformulated as an ideal quadrature mixer followed by a 2×2 MIMO real filter defined by the transfer matrix (see Fig. 6-b): .
Then, assuming upsampling of factor 2 with ideal interpolation in the discrete time model of Fig. 6-b, we can derive the equivalent discrete time model of Fig. 7.The discrete time transfer matrix is given by In an ideal scenario, we would have F(l) (e j ) = P(e j )I 2 , where P(e j ) is the frequency response of an ideal discretetime lowpass filter (LPF) with bandwidth c /2 = ω c T s /2, while I 2 is the 2 × 2 identity matrix.Unfortunately, this condition is not satisfied due to the presence of bandwidth limitations and analog impairments (see Appendix).Therefore, we use the digital Compensation Equalizer (CE) defined by a 2 × 2 MIMO real equalizer with transfer matrix: Note that the CE is placed immediately after the sub-ADCs and before the digital quadrature mixer used for the signal reconstruction (see Fig. 7).

IV. ADAPTIVE DIGITAL COMPENSATION EQUALIZER
Since F(l) (e j ) is unknown and can vary over time, an adaptive technique is required to compute the CE response, H (l) (e j ).As we expressed in Section I, elaborate algorithms to estimate F(l) (e j ) should be avoided for implementing in high-speed transceivers.Instead, we propose to adapt H (l) (e j ) by using the LMS algorithm 5 with the error signals generated from the tentative decisions provided by the slicer.
The CE for the l-th lane (see eq. ( 3)) can be implemented in 5 Choosing the LMS algorithm over alternatives such as Recursive Least Squares (RLS) results in simpler implementation and enhanced computational efficiency.While the RLS algorithm may offer better convergence and estimation performance, it demands greater computational complexity and resources.In applications such as optical communications, the LMS algorithm is well-established and widely used in adaptive signal processing.This choice is particularly suitable for scenarios where training data is abundant and convergence with limited training data is not a concern.124860 VOLUME 11, 2023 Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.the time domain with four FIR filters with impulse responses where F −1 {.} denotes the inverse Fourier Transform (FT) and h (l) p,q [k] is the real impulse response of the l-th CE with input q and output p. Fig. 8 shows a block diagram of the proposed receiver architecture with FI-ADC.To adapt the coefficients of the CE (4), the well-known LMS algorithm is used.The error signal used in the adaptation is derived from the slicer.However, the slicer error cannot be directly applied to adapt the CE due to the presence of the receiver DSP blocks placed between the SR block and the slicer (see Fig. 8).The slicer error is preprocessed by the backpropagation algorithm to obtain a representative signal known as the backpropagated error, which is then used to adapt the CE coefficients with the LMS algorithm.Let z (l) n be the T -spaced equalized signal of the l-th lane at the input of the slicer. 6Without loss of generality, in this analysis we consider that the receiver DSP blocks can be modeled as a real time-varying 4 × 4 MIMO T /2 Fractionally Spaced Equalizer (FSE) (i.e., T s = T /2).Note that this Time Variant MIMO FSE (TV-MIMO-FSE) includes all the DSP blocks of the receiver placed between the SR block and the slicers (e.g., CDE, MIMO-PMD-FFE, CR, etc.).We define u,v [k, m] as the oversampled timevarying impulse response of the TV-MIMO-FSE with input v and output u (u, v = 1, 2, 3, 4) at time instant k; m = 0, 1, . . ., L −1 denotes the index of the filter coefficient with L being the number of coefficients.The T -spaced output of the TV-MIMO-FSE, z (l) n = z (l) [2n], can be written as (see Fig. 8) where l = 1, • • • , 4 while ŝ(l) [k] is the l-th oversampled signal at the input of the DSP block (or output of the SR block) given by ŝ(l) [k] = cos( 0 k)y (l) Components y with L h being the number of coefficients of the CE.The slicer is a quantization device that makes the symbol decisions â(l) n (e.g., â(l) n ∈ {±1, ±3} for 16-QAM).Let e (l) n be the slicer error defined as As usual (e.g., see [31]), in the analysis we assume that there are no decision errors, 7 and thus we use the ideal transmit symbol a The total squared error at the slicer at time instant n is defined as Let E{E n } be the MSE at the slicer with E{.} denoting the expectation operator.In this work we iteratively adapt the real coefficients of the CE by using the LMS algorithm, in order to minimize the MSE at the slicer, i.e., where h p,q is the L h -dimensional coefficient vector given by β is the adaptation step, and ∇ h (l) E{E n } is the gradient of the MSE with respect to the coefficient vector h (l) p,q .As usual with the SGD algorithm based adaptation [31], the gradient of the MSE ∇ h (l) p,q E{E n } can be replaced by a noisy estimation The key obstacle to implement ( 13) is the computation of the MSE gradient since E n is not the error at the output of the CE block.To address this problem, we use the backpropagation algorithm, extensively used in machine learning applications [28], [29].By applying this algorithm to the slicer errors, we will be able to generate the error samples needed to adapt the coefficients of the CE.

A. ERROR BACKPROPAGATION
Using the analysis included in the appendix of [32], we can obtain the error at the output of the SR block by backpropagating the slicer error e (l) n through receiver DSP blocks (i.e., the TV-MIMO-FSE).The oversampled backpropagated error at the input of the DSP block can be expressed as where e (l) [k] is the oversampled slicer error given by with e n being the baud-rate slicer error defined in (9).In general, the responses of the CD and PMD equalizers included in u,v [k, m] cannot compensate for the AFE and FI-ADC mismatches.Therefore we can assume that u,v [k, m] and the CE coefficients h (l) p,q [k] are independent.The coefficients of the CE are updated to minimize the instantaneous squared error given by From ( 6) and ( 7) it is simple to show that the gradient of the squared error ( 16) results where α is a certain constant, x (l) while ê(l) Finally, we can derive an all-digital compensation scheme using an adaptive CE with coefficients updated as where µ is the adaptation step-size while ∇ h (l) p,q Ê[k] are given by eqs.( 17)- (20).Fig. 9 shows a simplified block diagram of the error backpropagation process.

V. SIMULATION RESULTS
In order to assess the performance of the proposed compensation technique, a dual-polarization coherent optical transceiver with FI-ADC is simulated using the parameters presented in Table 3.We consider 16-QAM and a symbol rate of 1/T = 192 GBd.Raised cosine filters with roll-off factor 0.10 for transmit pulse shaping are simulated (i.e., the nominal BW of the channel filters is f c = 1.1 × 192 GHz 2 ≈ 106 GHz).The oversampling factor in the DSP blocks is T /T s = 2.The fiber length is 50 km with 10 ps of Differential Group Delay (DGD) and 1000 ps 2 of Second-Order PMD (SOPMD).Rotations of the State of Polarization (SOP) of 4 kHz is included at the transmitter.Please see [33] for a comprehensive description of the aforementioned optical channel parameters.Firstly, we introduce a time delay τ H (τ V ) between the signals s (1) (t) and s (2) (t) (s (3) (t) and s (4) (t)) 124862 VOLUME 11, 2023 Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.to generate I/Q time skew of the complex signal of the polarization H (V ).The responses of the TIAs (i.e., b (l) (t) in Fig. 6-a) are simulated using third-order Butterworth LPFs with nominal BW of 100 GHz.The electrical mixers are modeled according to Fig. 10.An electrical square wave is used as LO.We use first-order Butterworth LPFs with 3dB-BW = 100 GHz to model the bandwidth limitation at the input of the mixer (i.e., c (l) I (t) and c (l) Q (t) in Fig. 6-a).We consider an isolation of 30 dB between the LO and the other ports, and 35 dB between the RF and IF ports.These mixer parameter values, commonly found in microwave mixer topologies [34], were carefully chosen to minimize performance degradation.Gain and phase errors of the lth quadrature mixer (i.e., ϵ (l) and φ (l) ) are also simulated.A nominal resolution of 8 bits for each sub-ADC is selected, which is a common value used in commercial optical coherent receivers [6].Bandwidth limitations due to the T&H circuits and other components placed between the mixer output up to the input of the corresponding sub-ADC (i.e., d where B d is the nominal 3dB-BW (e.g., B d = 48 GHz) and B (l) d is the BW mismatch between d

A. PERFORMANCE OF THE ADAPTIVE CE
Fig. 11 shows the recovered constellations in the presence of impairments in the AFE with FI-ADC for a noiseless backto-back (B2B) channel.We use ϵ (l)  = 10%, φ (l) = 9 • , and τ (l) IB = 1.25 ps for all the lanes.Also, an I/Q time skew of 0.75 ps is added to the two polarizations (i.e., τ H = τ V = 0.75 ps).Fig. 11-a is obtained with the CE turned off.We can observe the strong distortion caused by the impairments of the AFE and FI-ADC.Fig. 11-b depicts the constellation with the proposed adaptive CE turned on.The excellent compensation of the impairments can be verified.Next we focus on the optical signal-to-noise ratio (OSNR) penalty at a BER of 5 × 10 −3 (see [35] for the definition of OSNR).Results with and without the proposed CE are included.Fig. 12 presents the OSNR penalty as a function of the gain (ϵ (l) ) and phase (φ (l) ) errors of the quadrature mixers, I/Q time skew (τ H , τ V ), intraband time skew (τ (l) IB ), and bandwidth mismatches of the T&H circuits (25) ( B d ).Only one effect is exercised in each case.To stress the mismatch effects, the impairments are introduced as follows: a) The affected parameters are swept together.In all cases, we verify that the OSNR penalty caused by the aforementioned impairments can be eliminated with the proposed adaptive CE.

B. CONVERGENCE OF THE CE
Next we investigate the convergence of the adaptive CE in the presence of channel noise and fiber dispersion (see Table 3).We set the OSNR to achieve two BER targets: ∼ 5 × 10 −2 and 1 × 10 −3 .We consider the same set of impairments in the AFE and FI-ADC as used in Fig. 11.The initial convergence of the MIMO-PMD-FFE and CE starts with a blind equalization algorithm known as the Constant Modulus Algorithm (CMA) [36] applied to the MIMO-PMD-FFE.After a certain number of samples, convergence is switched to the traditional Decision-Directed LMS Algorithm.The only change between blind and decision directed adaptation is the way the error is computed.The temporal evolutions of the BER with and without CE are shown in Fig. 13.Analyzing the levels of BER with the CE turned off, note that  a large performance degradation is experienced.Therefore, we verify that the adaptive MIMO-PMD-FFE is not able to compensate the impairments in the AFE with FI-ADC.When the adaptation of the CE is turned on, the BER improves to reach the expected performance without impairments.The performance of the background compensation algorithm in the presence of temporal changes of the mismatches is analyzed.For this, we introduce a linear variation of the gain and the phase errors of the mixers as shown in Fig. 14.Notice that the time variations of the channel parameters can be tracked by the background CE without any impact on the expected performance of the receiver.Fig. 14 also presents the BER evolution when the CE is operating in a foreground fashion (i.e., the coefficients of the CE are frozen after the initial convergence).Since the CE operating in foreground mode is not able to track time variations of the channel parameters, a serious degradation of the receiver performance is experienced.This example demonstrates that the background operation of the CE can be achieved correctly as required in high-speed coherent optical receivers.

C. ROBUSTNESS OF THE CE AND IMPACT OF JITTER
Montecarlo simulations are used to evaluate the robustness of the compensation scheme.We generate 500 different cases with uniformly random variations of all analog impairments as defined in Table 4.The OSNR is set to the level required to achieve a BER of ∼ 1 × 10 −3 without impairments.Fig. 15 shows the histograms of BER obtained with and without CE.In Fig. 15-a, we observe that most of cases suffer a significant performance degradation with BER higher than 10 −2 .Conversely, from Fig. 15-b we verify that the performance with the CE turned on results close to the reference BER.
The impact of the clock jitter is investigated in Fig. 16.Random jitter is modeled as a white Gaussian random variable with standard deviation σ J .This jitter is added to the clocks of the ADC samplers and LO.We consider phase error of φ = 9 • , gain error of ϵ = 0.10, and a bandwidth mismatch of B d = 10%.From Fig. 16 we observe that the performance achieved with the CE turned on, in the presence of impairments, is practically the same as that obtained without impairments.

VI. IMPLEMENTATION CONSIDERATIONS
In this section we discuss some practical aspects of the implementation of the proposed compensation technique for the FI-ADC architecture of Fig. 3.We focus on the two main blocks of the all digital architecture: the compensation equalizer and the error backpropagation block.

A. IMPLEMENTATION OF THE COMPENSATION EQUALIZER
The use of parallel implementation is mandatory in high speed optical communication where parallelism factors on the order of 128 o higher are typical [24].Therefore, feedback filter-based compensation techniques for FI-ADCs, such as [20], should be avoided due to the significant complexity required for their implementation in parallel processing architectures.Instead, the compensation equalizer introduced in this work uses FIR filters, making its parallel implementation straightforward.As described in Section IV, the proposed CE in a dual-polarization optical coherent receiver comprises four 2 × 2 MIMO equalizers, h (l) p,q [k] with l = 1, 2, 3, 4; p, q = 1, 2, and k = 0, • • • , L h − 1 (see Fig. 8).From computer simulations of Section V it was verified that L h = 11 is enough to properly compensate the AFE and FI-ADC impairments.Therefore, a time domain parallel implementation is preferred for the CE.Note that each of these 2 × 2 MIMO equalizers has 4 independent real FIR filters of L h taps.Thus, the resulting filter is equivalent in complexity to a real FIR filter with 4 × L h taps.Notice that the classical RX I/Q skew correction filter already present in current coherent receivers [24] can be eliminated since the proposed CE is able to compensate this effect.

B. IMPLEMENTATION OF THE ERROR BACKPROPAGATION BLOCK
The impairments of the AFE and FI-ADCs change very slowly over time.Therefore, the update of the CE coefficients, as given by eq. ( 24), does not need to be achieved at the full rate.Block processing is widely used for implementing ultra high-speed transceivers [24].Consequently, we can update the CE coefficients performing block decimation over the error samples [7].This approach offers a substantial simplification to the implementation of the error backpropagation algorithm.The latter uses digital filtering and modulation operations.By leveraging data block based processing and operating at a lower frequency, we can achieve significant reductions in both power consumption and implementation complexity.Let N be the block size in samples to be used for implementing the error backpropagation.We also define F D as the block decimation factor.The CE coefficients are updated using only one block of N consecutive samples of the oversampled slicer error (15) every F D blocks, i.e., e (l) [nNF with n integer [7].Fig. 17 shows an example of the temporal evolution of the BER in the presence of combined impairments for different values of F D with N = 8192.Gear shifting is used to reduce the steady-state MSE and speedup the convergence of the algorithm.We verify that the impact of the block decimation on the BER is negligible, allowing for a significant reduction in the implementation complexity of the proposed CE.

VII. CONCLUSION
An adaptive background compensation of impairments in FI-ADCs for application in high-speed communication receivers, has been proposed.The technique uses a MIMO equalizer before the digital signal reconstruction, in combination with the backpropagation algorithm for LMS adaptation.Unlike previous proposals, the new approach (i) maximizes the SNR at the decision point of the receiver without requiring the estimation of the channel parameters, and (ii) compensates all the impairments of the AFE.The proposed background compensation algorithm has been thoroughly investigated in a DP coherent optical receiver with 16-QAM operating at ∼ 200 GBd.Numerical results have shown an excellent performance and robustness of the new background compensation algorithm.These features, combined with its low implementation complexity, will pave the way for the deployment of commercial transceivers with bandwidths of 100 GHz and beyond.
124866 VOLUME 11, 2023 Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.

FIGURE 1 .
FIGURE 1. Architecture of a two-channel FI-ADC system with 4 sub-ADCs.

FIGURE 4 .
FIGURE 4. Analog and digital processing of the FI-ADC shown in Fig. 3.

FIGURE 5 .
FIGURE 5. Main DSP blocks in a coherent optical receiver.SR: Signal Reconstruction block.

FIGURE 6 .
FIGURE 6. a) Model of the receiver AFE with FI-ADC of Fig. 3 in the presence of impairments.b) Equivalent continuous time model (see Appendix).

Q
[k]  are the outputs of the l-th CE:y (l)

FIGURE 9 .
FIGURE 9. Block diagram of the CE adaptation based on the error backpropagation algorithm.

Q
(t) in Fig.6-a) are simulated using fourth-order Butterworth LPFs with 3dB-BW defined by BW 3dB {d

I
(t)  and d

Q
(t).Moreover, we add a time delay τ (l) IB between d

I
(t)  and d

FIGURE 11 .
FIGURE 11.Received 16-QAM constellations in the presence of impairments of the AFE and FI-ADC with a noiseless B2B channel.a) Without CE (uncompensated).b) With CE turned on (compensated).

FIGURE 12 .
FIGURE 12. OSNR penalty at BER = 5 × 10 −3 for a 192 GBd DP-16QAM coherent optical receiver as a function of: a) gain error, b) phase errors, c) I/Q time skew, d) intraband time skew, and e) bandwidth mismatch of T&Hs.

FIGURE 14 .TABLE 4 .
FIGURE 14. BER evolution in the presence of time variations in the gain and phase errors of the analog mixers.BER targets= 1 × 10 −3 and 5 × 10 −2 .

FIGURE 17 .FIGURE 18 .
FIGURE 17. Convergence of the CE in the presence of impairments for different block decimation factors F D with N = 8192.BER target= 10 −3 .

Fig. 6 -
b.The signals at the input of the ADCs can be expressed as (see Fig.6-a)x (l) I (t) = r

I
(t) ⊗ d

TABLE 1 .
Summary and comparison with other state-of-the-art techniques.

TABLE 2 .
List of acronyms and abbreviations.
This block is used to compensate for chromatic dispersion.During the start-up procedure, the CDE estimates the length of the fiber link.This estimation is then employed to compute the frequency response of the CDE.
d) Adaptive MIMO PMD Feed-Forward Equalizer (MIMO-PMD-FFE): This block performs the polarization demultiplexing and the compensation of the polarization mode dispersion.The MIMO-PMD-FFE is adaptive to track the temporal variations of the optical fiber channel.e) Carrier Recovery (CR): The CR is key to the coherent receiver performance.It should be capable of compensating the frequency error between the TX and local oscillator lasers, as well as tracking high-frequency laser phase noise, nonlinear phase noise, and short-term frequency instabilities of the lasers.f) Slicer: This block generates tentative decisions of the transmitted symbols, which are subsequently utilized to obtain error signals.The error signals can then be employed to adapt the MIMO-PMD-FFE using the well-known Least Mean Square (LMS) algorithm.

TABLE 3 .
General system parameters.